#include "AArch64Disassembler.h"
#include "AArch64ExternalSymbolizer.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "Utils/AArch64BaseInfo.h"
#include "llvm-c/Disassembler.h"
#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#include <algorithm>
#include <memory>
#include "AArch64GenDisassemblerTables.inc"
#include "AArch64GenInstrInfo.inc"

Include dependency graph for AArch64Disassembler.cpp:

Macros
#define	DEBUG_TYPE "aarch64-disassembler"

#define	Success MCDisassembler::Success

#define	Fail MCDisassembler::Fail

#define	SoftFail MCDisassembler::SoftFail

Typedefs
using	DecodeStatus = MCDisassembler::DecodeStatus

Functions
static DecodeStatus	DecodeFPR128RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR128_loRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR16RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFPR8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPR64commonRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPR64spRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeGPR32spRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeQQRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeQQQRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeQQQQRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeDDRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeDDDRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeDDDDRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeZPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeZPR_4bRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeZPR_3bRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeZPR2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeZPR3RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeZPR4RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodePPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodePPR_3bRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFixedPointScaleImm32 (MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFixedPointScaleImm64 (MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodePCRelLabel19 (MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeMemExtend (MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeMRSSystemRegister (MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeMSRSystemRegister (MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeThreeAddrSRegInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeMoveImmInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeUnsignedLdStInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeSignedLdStInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeExclusiveLdStInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodePairLdStInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeAddSubERegInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeLogicalImmInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeModImmInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeModImmTiedInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeAdrInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeAddSubImmShift (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeUnconditionalBranch (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeSystemPStateInstruction (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeTestAndBranch (MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeFMOVLaneInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeVecShiftR64Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftR64ImmNarrow (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftR32Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftR32ImmNarrow (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftR16Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftR16ImmNarrow (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftR8Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftL64Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftL32Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftL16Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftL8Imm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeWSeqPairsClassRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeXSeqPairsClassRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeSVELogicalImmInstruction (llvm::MCInst &Inst, uint32_t insn, uint64_t Address, const void *Decoder)

template<int Bits>
static DecodeStatus	DecodeSImm (llvm::MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder)

template<int ElementWidth>
static DecodeStatus	DecodeImm8OptLsl (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeSVEIncDecImm (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)

static bool	Check (DecodeStatus &Out, DecodeStatus In)

static MCDisassembler *	createAArch64Disassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)

static MCSymbolizer *	createAArch64ExternalSymbolizer (const Triple &TT, LLVMOpInfoCallback GetOpInfo, LLVMSymbolLookupCallback SymbolLookUp, void DisInfo, MCContext Ctx, std::unique_ptr< MCRelocationInfo > &&RelInfo)

void	LLVMInitializeAArch64Disassembler ()

static DecodeStatus	DecodeVectorRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder)

static DecodeStatus	DecodeVecShiftRImm (MCInst &Inst, unsigned Imm, unsigned Add)

static DecodeStatus	DecodeVecShiftLImm (MCInst &Inst, unsigned Imm, unsigned Add)

static DecodeStatus	DecodeGPRSeqPairsClassRegisterClass (MCInst &Inst, unsigned RegClassID, unsigned RegNo, uint64_t Addr, const void *Decoder)

Variables
static const unsigned	FPR128DecoderTable []

static const unsigned	FPR64DecoderTable []

static const unsigned	FPR32DecoderTable []

static const unsigned	FPR16DecoderTable []

static const unsigned	FPR8DecoderTable []

static const unsigned	GPR64DecoderTable []

static const unsigned	GPR32DecoderTable []

static const unsigned	ZPRDecoderTable []

static const unsigned	ZZDecoderTable []

static const unsigned	ZZZDecoderTable []

static const unsigned	ZZZZDecoderTable []

static const unsigned	PPRDecoderTable []

static const unsigned	VectorDecoderTable []

static const unsigned	QQDecoderTable []

static const unsigned	QQQDecoderTable []

static const unsigned	QQQQDecoderTable []

static const unsigned	DDDecoderTable []

static const unsigned	DDDDecoderTable []

static const unsigned	DDDDDecoderTable []

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "aarch64-disassembler"

Definition at line 32 of file AArch64Disassembler.cpp.

◆ Fail

#define Fail MCDisassembler::Fail

Definition at line 241 of file AArch64Disassembler.cpp.

Referenced by adjustDuplex(), DecodeL4RSrcDstSrcDstInstruction(), DecodeMoveHRegInstruction(), llvm::GVNExpression::Expression::dump(), getDecoderTable(), getDPPOp(), logger(), mapBinOpcode(), llvm::sys::RetryAfterSignal(), SafeToMergeTerminators(), and sinkLastInstruction().

◆ SoftFail

#define SoftFail MCDisassembler::SoftFail

Definition at line 242 of file AArch64Disassembler.cpp.

Referenced by AddThumb1SBit().

◆ Success

#define Success MCDisassembler::Success

Definition at line 240 of file AArch64Disassembler.cpp.

Referenced by AddThumb1SBit(), adjustDuplex(), CC_MipsO32_FP64(), llvm::CodeViewDebug::CodeViewDebug(), createOrdering(), DecodeMoveHRegInstruction(), llvm::AMDGPUAsmPrinter::EmitEndOfAsmFile(), FindAllMemoryUses(), llvm::IRTranslator::getAnalysisUsage(), getCompoundInsn(), getCondCode(), llvm::ConstantRange::getEquivalentICmp(), getOffsetFromIndices(), GetRMWLibcall(), getShiftAmountTyForConstant(), llvm::HexagonAsmPrinter::HexagonProcessInstruction(), llvm::DWARFVerifier::DieRangeInfo::intersects(), isCopyFeedingInvariantStore(), isLocalCopy(), LLVMInitializeHexagonDisassembler(), logger(), LowerCMP_SWAP(), llvm::SystemZTargetLowering::LowerOperationWrapper(), llvm::AArch64CallLowering::lowerReturn(), makeCombineInst(), operator<<(), performMaskedAtomicOp(), llvm::SymbolRemappingReader::read(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::LiveDebugVariables::splitRegister(), llvm::DWARFContext::verify(), and llvm::raw_fd_ostream::~raw_fd_ostream().

Typedef Documentation

◆ DecodeStatus

using DecodeStatus = MCDisassembler::DecodeStatus

Definition at line 35 of file AArch64Disassembler.cpp.

Function Documentation

◆ Check()

static bool Check	(	DecodeStatus &	Out,
		DecodeStatus	In
	)

static

Definition at line 222 of file AArch64Disassembler.cpp.

References llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.

Referenced by llvm::LoopAccessInfo::addRuntimeChecks(), expandBounds(), llvm::SCEVExpander::expandUnionPredicate(), llvm::FileCheckString::FileCheckString(), llvm::LoopVersioning::getNonVersionedLoop(), isLoadConditional(), isSupportedGuardInstruction(), llvm::LoopVersioning::prepareNoAliasMetadata(), llvm::RuntimePointerChecking::printChecks(), and llvm::LoopPredicationPass::run().

◆ createAArch64Disassembler()

static MCDisassembler* createAArch64Disassembler	(	const Target &	T,
		const MCSubtargetInfo &	STI,
		MCContext &	Ctx
	)

static

Definition at line 244 of file AArch64Disassembler.cpp.

Referenced by LLVMInitializeAArch64Disassembler().

◆ createAArch64ExternalSymbolizer()

static MCSymbolizer* createAArch64ExternalSymbolizer	(	const Triple &	TT,
		LLVMOpInfoCallback	GetOpInfo,
		LLVMSymbolLookupCallback	SymbolLookUp,
		void *	DisInfo,
		MCContext *	Ctx,
		std::unique_ptr< MCRelocationInfo > &&	RelInfo
	)

static

Definition at line 272 of file AArch64Disassembler.cpp.

Referenced by LLVMInitializeAArch64Disassembler().

◆ DecodeAddSubERegInstruction()

static DecodeStatus DecodeAddSubERegInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1496 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.

◆ DecodeAddSubImmShift()

static DecodeStatus DecodeAddSubImmShift	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1660 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().

◆ DecodeAdrInstruction()

static DecodeStatus DecodeAdrInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1641 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().

◆ DecodeDDDDRegisterClass()

static DecodeStatus DecodeDDDDRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 765 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeDDDRegisterClass()

static DecodeStatus DecodeDDDRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 742 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeDDRegisterClass()

static DecodeStatus DecodeDDRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 719 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeExclusiveLdStInstruction()

static DecodeStatus DecodeExclusiveLdStInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1279 of file AArch64Disassembler.cpp.

References DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.

◆ DecodeFixedPointScaleImm32()

static DecodeStatus DecodeFixedPointScaleImm32	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 775 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeFixedPointScaleImm64()

static DecodeStatus DecodeFixedPointScaleImm64	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 784 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeFMOVLaneInstruction()

static DecodeStatus DecodeFMOVLaneInstruction	(	MCInst &	Inst,
		unsigned	Insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 832 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeGPR64RegisterClass(), and llvm::MCDisassembler::Success.

◆ DecodeFPR128_loRegisterClass()

static DecodeStatus DecodeFPR128_loRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 317 of file AArch64Disassembler.cpp.

References DecodeFPR128RegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeFPR128RegisterClass()

static DecodeStatus DecodeFPR128RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 306 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeFMOVLaneInstruction(), DecodeFPR128_loRegisterClass(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeFPR16RegisterClass()

static DecodeStatus DecodeFPR16RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 377 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeFPR32RegisterClass()

static DecodeStatus DecodeFPR32RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 356 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeFPR64RegisterClass()

static DecodeStatus DecodeFPR64RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 335 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeModImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeFPR8RegisterClass()

static DecodeStatus DecodeFPR8RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 398 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeGPR32RegisterClass()

static DecodeStatus DecodeGPR32RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 463 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeGPR32spRegisterClass()

static DecodeStatus DecodeGPR32spRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 474 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), and DecodeLogicalImmInstruction().

◆ DecodeGPR64commonRegisterClass()

static DecodeStatus DecodeGPR64commonRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 419 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeGPR64RegisterClass()

static DecodeStatus DecodeGPR64RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 430 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeGPR64spRegisterClass()

static DecodeStatus DecodeGPR64spRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 441 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeExclusiveLdStInstruction(), DecodeLogicalImmInstruction(), DecodePairLdStInstruction(), DecodeSignedLdStInstruction(), and DecodeUnsignedLdStInstruction().

◆ DecodeGPRSeqPairsClassRegisterClass()

static DecodeStatus DecodeGPRSeqPairsClassRegisterClass	(	MCInst &	Inst,
		unsigned	RegClassID,
		unsigned	RegNo,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 1767 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.

Referenced by DecodeWSeqPairsClassRegisterClass(), and DecodeXSeqPairsClassRegisterClass().

◆ DecodeImm8OptLsl()

template<int ElementWidth>

static DecodeStatus DecodeImm8OptLsl	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 1832 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

◆ DecodeLogicalImmInstruction()

static DecodeStatus DecodeLogicalImmInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1553 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR32spRegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and llvm::MCDisassembler::Success.

◆ DecodeMemExtend()

static DecodeStatus DecodeMemExtend	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 807 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeModImmInstruction()

static DecodeStatus DecodeModImmInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1584 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeFPR64RegisterClass(), DecodeVectorRegisterClass(), llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.

◆ DecodeModImmTiedInstruction()

static DecodeStatus DecodeModImmTiedInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1623 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeVectorRegisterClass(), and llvm::MCDisassembler::Success.

◆ DecodeMoveImmInstruction()

static DecodeStatus DecodeMoveImmInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 987 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), and llvm::MCDisassembler::Success.

◆ DecodeMRSSystemRegister()

static DecodeStatus DecodeMRSSystemRegister	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 814 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeMSRSystemRegister()

static DecodeStatus DecodeMSRSystemRegister	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 824 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodePairLdStInstruction()

static DecodeStatus DecodePairLdStInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1362 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.

◆ DecodePCRelLabel19()

static DecodeStatus DecodePCRelLabel19	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 791 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().

◆ DecodePPR_3bRegisterClass()

static DecodeStatus DecodePPR_3bRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 610 of file AArch64Disassembler.cpp.

References DecodePPRRegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodePPRRegisterClass()

static DecodeStatus DecodePPRRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 600 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodePPR_3bRegisterClass().

◆ DecodeQQQQRegisterClass()

static DecodeStatus DecodeQQQQRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 698 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeQQQRegisterClass()

static DecodeStatus DecodeQQQRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 675 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeQQRegisterClass()

static DecodeStatus DecodeQQRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 652 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeSignedLdStInstruction()

static DecodeStatus DecodeSignedLdStInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1081 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.

◆ DecodeSImm()

template<int Bits>

static DecodeStatus DecodeSImm	(	llvm::MCInst &	Inst,
		uint64_t	Imm,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1817 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::tgtok::Bits, llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

◆ DecodeSVEIncDecImm()

static DecodeStatus DecodeSVEIncDecImm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 1844 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeSVELogicalImmInstruction()

static DecodeStatus DecodeSVELogicalImmInstruction	(	llvm::MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1799 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeZPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and llvm::MCDisassembler::Success.

◆ DecodeSystemPStateInstruction()

static DecodeStatus DecodeSystemPStateInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1713 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), and llvm::MCDisassembler::Success.

◆ DecodeTestAndBranch()

static DecodeStatus DecodeTestAndBranch	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1743 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().

◆ DecodeThreeAddrSRegInstruction()

static DecodeStatus DecodeThreeAddrSRegInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 925 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), LLVM_FALLTHROUGH, and llvm::MCDisassembler::Success.

◆ DecodeUnconditionalBranch()

static DecodeStatus DecodeUnconditionalBranch	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1696 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().

◆ DecodeUnsignedLdStInstruction()

static DecodeStatus DecodeUnsignedLdStInstruction	(	MCInst &	Inst,
		uint32_t	insn,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 1020 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeFPR128RegisterClass(), DecodeFPR16RegisterClass(), DecodeFPR32RegisterClass(), DecodeFPR64RegisterClass(), DecodeFPR8RegisterClass(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPR64spRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().

◆ DecodeVecShiftL16Imm()

static DecodeStatus DecodeVecShiftL16Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 915 of file AArch64Disassembler.cpp.

References DecodeVecShiftLImm().

◆ DecodeVecShiftL32Imm()

static DecodeStatus DecodeVecShiftL32Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 910 of file AArch64Disassembler.cpp.

References DecodeVecShiftLImm().

◆ DecodeVecShiftL64Imm()

static DecodeStatus DecodeVecShiftL64Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 905 of file AArch64Disassembler.cpp.

References DecodeVecShiftLImm().

◆ DecodeVecShiftL8Imm()

static DecodeStatus DecodeVecShiftL8Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 920 of file AArch64Disassembler.cpp.

References DecodeVecShiftLImm().

◆ DecodeVecShiftLImm()

static DecodeStatus DecodeVecShiftLImm	(	MCInst &	Inst,
		unsigned	Imm,
		unsigned	Add
	)

static

Definition at line 861 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().

◆ DecodeVecShiftR16Imm()

static DecodeStatus DecodeVecShiftR16Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 889 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftR16ImmNarrow()

static DecodeStatus DecodeVecShiftR16ImmNarrow	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 894 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftR32Imm()

static DecodeStatus DecodeVecShiftR32Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 878 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftR32ImmNarrow()

static DecodeStatus DecodeVecShiftR32ImmNarrow	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 883 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftR64Imm()

static DecodeStatus DecodeVecShiftR64Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 867 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftR64ImmNarrow()

static DecodeStatus DecodeVecShiftR64ImmNarrow	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 872 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftR8Imm()

static DecodeStatus DecodeVecShiftR8Imm	(	MCInst &	Inst,
		unsigned	Imm,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 900 of file AArch64Disassembler.cpp.

References DecodeVecShiftRImm().

◆ DecodeVecShiftRImm()

static DecodeStatus DecodeVecShiftRImm	(	MCInst &	Inst,
		unsigned	Imm,
		unsigned	Add
	)

static

Definition at line 855 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().

◆ DecodeVectorRegisterClass()

static DecodeStatus DecodeVectorRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 630 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeModImmInstruction(), and DecodeModImmTiedInstruction().

◆ DecodeWSeqPairsClassRegisterClass()

static DecodeStatus DecodeWSeqPairsClassRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 1781 of file AArch64Disassembler.cpp.

References DecodeGPRSeqPairsClassRegisterClass().

◆ DecodeXSeqPairsClassRegisterClass()

static DecodeStatus DecodeXSeqPairsClassRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Addr,
		const void *	Decoder
	)

static

Definition at line 1790 of file AArch64Disassembler.cpp.

References DecodeGPRSeqPairsClassRegisterClass().

◆ DecodeZPR2RegisterClass()

static DecodeStatus DecodeZPR2RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 535 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeZPR3RegisterClass()

static DecodeStatus DecodeZPR3RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 559 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeZPR4RegisterClass()

static DecodeStatus DecodeZPR4RegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 583 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

◆ DecodeZPR_3bRegisterClass()

static DecodeStatus DecodeZPR_3bRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 516 of file AArch64Disassembler.cpp.

References DecodeZPRRegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeZPR_4bRegisterClass()

static DecodeStatus DecodeZPR_4bRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 508 of file AArch64Disassembler.cpp.

References DecodeZPRRegisterClass(), and llvm::MCDisassembler::Fail.

◆ DecodeZPRRegisterClass()

static DecodeStatus DecodeZPRRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 497 of file AArch64Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.

Referenced by DecodeSVELogicalImmInstruction(), DecodeZPR_3bRegisterClass(), and DecodeZPR_4bRegisterClass().

◆ LLVMInitializeAArch64Disassembler()

void LLVMInitializeAArch64Disassembler ( )

Definition at line 280 of file AArch64Disassembler.cpp.

References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().

Variable Documentation

◆ DDDDDecoderTable

const unsigned DDDDDecoderTable[]

static

Initial value:

= {
  AArch64::D0_D1_D2_D3,     AArch64::D1_D2_D3_D4,     AArch64::D2_D3_D4_D5,
  AArch64::D3_D4_D5_D6,     AArch64::D4_D5_D6_D7,     AArch64::D5_D6_D7_D8,
  AArch64::D6_D7_D8_D9,     AArch64::D7_D8_D9_D10,    AArch64::D8_D9_D10_D11,
  AArch64::D9_D10_D11_D12,  AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14,
  AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17,
  AArch64::D15_D16_D17_D18, AArch64::D16_D17_D18_D19, AArch64::D17_D18_D19_D20,
  AArch64::D18_D19_D20_D21, AArch64::D19_D20_D21_D22, AArch64::D20_D21_D22_D23,
  AArch64::D21_D22_D23_D24, AArch64::D22_D23_D24_D25, AArch64::D23_D24_D25_D26,
  AArch64::D24_D25_D26_D27, AArch64::D25_D26_D27_D28, AArch64::D26_D27_D28_D29,
  AArch64::D27_D28_D29_D30, AArch64::D28_D29_D30_D31, AArch64::D29_D30_D31_D0,
  AArch64::D30_D31_D0_D1,   AArch64::D31_D0_D1_D2
}

Definition at line 751 of file AArch64Disassembler.cpp.

◆ DDDDecoderTable

const unsigned DDDDecoderTable[]

static

Initial value:

= {
  AArch64::D0_D1_D2,    AArch64::D1_D2_D3,    AArch64::D2_D3_D4,
  AArch64::D3_D4_D5,    AArch64::D4_D5_D6,    AArch64::D5_D6_D7,
  AArch64::D6_D7_D8,    AArch64::D7_D8_D9,    AArch64::D8_D9_D10,
  AArch64::D9_D10_D11,  AArch64::D10_D11_D12, AArch64::D11_D12_D13,
  AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16,
  AArch64::D15_D16_D17, AArch64::D16_D17_D18, AArch64::D17_D18_D19,
  AArch64::D18_D19_D20, AArch64::D19_D20_D21, AArch64::D20_D21_D22,
  AArch64::D21_D22_D23, AArch64::D22_D23_D24, AArch64::D23_D24_D25,
  AArch64::D24_D25_D26, AArch64::D25_D26_D27, AArch64::D26_D27_D28,
  AArch64::D27_D28_D29, AArch64::D28_D29_D30, AArch64::D29_D30_D31,
  AArch64::D30_D31_D0,  AArch64::D31_D0_D1
}

Definition at line 728 of file AArch64Disassembler.cpp.

◆ DDDecoderTable

const unsigned DDDecoderTable[]

static

Initial value:

= {
  AArch64::D0_D1,   AArch64::D1_D2,   AArch64::D2_D3,   AArch64::D3_D4,
  AArch64::D4_D5,   AArch64::D5_D6,   AArch64::D6_D7,   AArch64::D7_D8,
  AArch64::D8_D9,   AArch64::D9_D10,  AArch64::D10_D11, AArch64::D11_D12,
  AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16,
  AArch64::D16_D17, AArch64::D17_D18, AArch64::D18_D19, AArch64::D19_D20,
  AArch64::D20_D21, AArch64::D21_D22, AArch64::D22_D23, AArch64::D23_D24,
  AArch64::D24_D25, AArch64::D25_D26, AArch64::D26_D27, AArch64::D27_D28,
  AArch64::D28_D29, AArch64::D29_D30, AArch64::D30_D31, AArch64::D31_D0
}

Definition at line 708 of file AArch64Disassembler.cpp.

◆ FPR128DecoderTable

const unsigned FPR128DecoderTable[]

static

Initial value:

= {
    AArch64::Q0,  AArch64::Q1,  AArch64::Q2,  AArch64::Q3,  AArch64::Q4,
    AArch64::Q5,  AArch64::Q6,  AArch64::Q7,  AArch64::Q8,  AArch64::Q9,
    AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14,
    AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
    AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
    AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
    AArch64::Q30, AArch64::Q31
}

Definition at line 296 of file AArch64Disassembler.cpp.

◆ FPR16DecoderTable

const unsigned FPR16DecoderTable[]

static

Initial value:

= {
    AArch64::H0,  AArch64::H1,  AArch64::H2,  AArch64::H3,  AArch64::H4,
    AArch64::H5,  AArch64::H6,  AArch64::H7,  AArch64::H8,  AArch64::H9,
    AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14,
    AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19,
    AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24,
    AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29,
    AArch64::H30, AArch64::H31
}

Definition at line 367 of file AArch64Disassembler.cpp.

◆ FPR32DecoderTable

const unsigned FPR32DecoderTable[]

static

Initial value:

= {
    AArch64::S0,  AArch64::S1,  AArch64::S2,  AArch64::S3,  AArch64::S4,
    AArch64::S5,  AArch64::S6,  AArch64::S7,  AArch64::S8,  AArch64::S9,
    AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14,
    AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19,
    AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
    AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29,
    AArch64::S30, AArch64::S31
}

Definition at line 346 of file AArch64Disassembler.cpp.

◆ FPR64DecoderTable

const unsigned FPR64DecoderTable[]

static

Initial value:

= {
    AArch64::D0,  AArch64::D1,  AArch64::D2,  AArch64::D3,  AArch64::D4,
    AArch64::D5,  AArch64::D6,  AArch64::D7,  AArch64::D8,  AArch64::D9,
    AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14,
    AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19,
    AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24,
    AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29,
    AArch64::D30, AArch64::D31
}

Definition at line 325 of file AArch64Disassembler.cpp.

◆ FPR8DecoderTable

const unsigned FPR8DecoderTable[]

static

Initial value:

= {
    AArch64::B0,  AArch64::B1,  AArch64::B2,  AArch64::B3,  AArch64::B4,
    AArch64::B5,  AArch64::B6,  AArch64::B7,  AArch64::B8,  AArch64::B9,
    AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14,
    AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19,
    AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24,
    AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29,
    AArch64::B30, AArch64::B31
}

Definition at line 388 of file AArch64Disassembler.cpp.

◆ GPR32DecoderTable

const unsigned GPR32DecoderTable[]

static

Initial value:

= {
    AArch64::W0,  AArch64::W1,  AArch64::W2,  AArch64::W3,  AArch64::W4,
    AArch64::W5,  AArch64::W6,  AArch64::W7,  AArch64::W8,  AArch64::W9,
    AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14,
    AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19,
    AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24,
    AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29,
    AArch64::W30, AArch64::WZR
}

Definition at line 453 of file AArch64Disassembler.cpp.

◆ GPR64DecoderTable

const unsigned GPR64DecoderTable[]

static

Initial value:

= {
    AArch64::X0,  AArch64::X1,  AArch64::X2,  AArch64::X3,  AArch64::X4,
    AArch64::X5,  AArch64::X6,  AArch64::X7,  AArch64::X8,  AArch64::X9,
    AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14,
    AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19,
    AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24,
    AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP,
    AArch64::LR,  AArch64::XZR
}

Definition at line 409 of file AArch64Disassembler.cpp.

◆ PPRDecoderTable

const unsigned PPRDecoderTable[]

static

Initial value:

= {
  AArch64::P0,  AArch64::P1,  AArch64::P2,  AArch64::P3,
  AArch64::P4,  AArch64::P5,  AArch64::P6,  AArch64::P7,
  AArch64::P8,  AArch64::P9,  AArch64::P10, AArch64::P11,
  AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15
}

Definition at line 593 of file AArch64Disassembler.cpp.

◆ QQDecoderTable

const unsigned QQDecoderTable[]

static

Initial value:

= {
  AArch64::Q0_Q1,   AArch64::Q1_Q2,   AArch64::Q2_Q3,   AArch64::Q3_Q4,
  AArch64::Q4_Q5,   AArch64::Q5_Q6,   AArch64::Q6_Q7,   AArch64::Q7_Q8,
  AArch64::Q8_Q9,   AArch64::Q9_Q10,  AArch64::Q10_Q11, AArch64::Q11_Q12,
  AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16,
  AArch64::Q16_Q17, AArch64::Q17_Q18, AArch64::Q18_Q19, AArch64::Q19_Q20,
  AArch64::Q20_Q21, AArch64::Q21_Q22, AArch64::Q22_Q23, AArch64::Q23_Q24,
  AArch64::Q24_Q25, AArch64::Q25_Q26, AArch64::Q26_Q27, AArch64::Q27_Q28,
  AArch64::Q28_Q29, AArch64::Q29_Q30, AArch64::Q30_Q31, AArch64::Q31_Q0
}

Definition at line 641 of file AArch64Disassembler.cpp.

◆ QQQDecoderTable

const unsigned QQQDecoderTable[]

static

Initial value:

= {
  AArch64::Q0_Q1_Q2,    AArch64::Q1_Q2_Q3,    AArch64::Q2_Q3_Q4,
  AArch64::Q3_Q4_Q5,    AArch64::Q4_Q5_Q6,    AArch64::Q5_Q6_Q7,
  AArch64::Q6_Q7_Q8,    AArch64::Q7_Q8_Q9,    AArch64::Q8_Q9_Q10,
  AArch64::Q9_Q10_Q11,  AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13,
  AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16,
  AArch64::Q15_Q16_Q17, AArch64::Q16_Q17_Q18, AArch64::Q17_Q18_Q19,
  AArch64::Q18_Q19_Q20, AArch64::Q19_Q20_Q21, AArch64::Q20_Q21_Q22,
  AArch64::Q21_Q22_Q23, AArch64::Q22_Q23_Q24, AArch64::Q23_Q24_Q25,
  AArch64::Q24_Q25_Q26, AArch64::Q25_Q26_Q27, AArch64::Q26_Q27_Q28,
  AArch64::Q27_Q28_Q29, AArch64::Q28_Q29_Q30, AArch64::Q29_Q30_Q31,
  AArch64::Q30_Q31_Q0,  AArch64::Q31_Q0_Q1
}

Definition at line 661 of file AArch64Disassembler.cpp.

◆ QQQQDecoderTable

const unsigned QQQQDecoderTable[]

static

Initial value:

= {
  AArch64::Q0_Q1_Q2_Q3,     AArch64::Q1_Q2_Q3_Q4,     AArch64::Q2_Q3_Q4_Q5,
  AArch64::Q3_Q4_Q5_Q6,     AArch64::Q4_Q5_Q6_Q7,     AArch64::Q5_Q6_Q7_Q8,
  AArch64::Q6_Q7_Q8_Q9,     AArch64::Q7_Q8_Q9_Q10,    AArch64::Q8_Q9_Q10_Q11,
  AArch64::Q9_Q10_Q11_Q12,  AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14,
  AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17,
  AArch64::Q15_Q16_Q17_Q18, AArch64::Q16_Q17_Q18_Q19, AArch64::Q17_Q18_Q19_Q20,
  AArch64::Q18_Q19_Q20_Q21, AArch64::Q19_Q20_Q21_Q22, AArch64::Q20_Q21_Q22_Q23,
  AArch64::Q21_Q22_Q23_Q24, AArch64::Q22_Q23_Q24_Q25, AArch64::Q23_Q24_Q25_Q26,
  AArch64::Q24_Q25_Q26_Q27, AArch64::Q25_Q26_Q27_Q28, AArch64::Q26_Q27_Q28_Q29,
  AArch64::Q27_Q28_Q29_Q30, AArch64::Q28_Q29_Q30_Q31, AArch64::Q29_Q30_Q31_Q0,
  AArch64::Q30_Q31_Q0_Q1,   AArch64::Q31_Q0_Q1_Q2
}

Definition at line 684 of file AArch64Disassembler.cpp.

◆ VectorDecoderTable

const unsigned VectorDecoderTable[]

static

Initial value:

= {
    AArch64::Q0,  AArch64::Q1,  AArch64::Q2,  AArch64::Q3,  AArch64::Q4,
    AArch64::Q5,  AArch64::Q6,  AArch64::Q7,  AArch64::Q8,  AArch64::Q9,
    AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14,
    AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
    AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24,
    AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29,
    AArch64::Q30, AArch64::Q31
}

Definition at line 620 of file AArch64Disassembler.cpp.

◆ ZPRDecoderTable

const unsigned ZPRDecoderTable[]

static

Initial value:

= {
    AArch64::Z0,  AArch64::Z1,  AArch64::Z2,  AArch64::Z3,
    AArch64::Z4,  AArch64::Z5,  AArch64::Z6,  AArch64::Z7,
    AArch64::Z8,  AArch64::Z9,  AArch64::Z10, AArch64::Z11,
    AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15,
    AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19,
    AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23,
    AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27,
    AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31
}

Definition at line 486 of file AArch64Disassembler.cpp.

◆ ZZDecoderTable

const unsigned ZZDecoderTable[]

static

Initial value:

= {
  AArch64::Z0_Z1,   AArch64::Z1_Z2,   AArch64::Z2_Z3,   AArch64::Z3_Z4,
  AArch64::Z4_Z5,   AArch64::Z5_Z6,   AArch64::Z6_Z7,   AArch64::Z7_Z8,
  AArch64::Z8_Z9,   AArch64::Z9_Z10,  AArch64::Z10_Z11, AArch64::Z11_Z12,
  AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z15_Z16,
  AArch64::Z16_Z17, AArch64::Z17_Z18, AArch64::Z18_Z19, AArch64::Z19_Z20,
  AArch64::Z20_Z21, AArch64::Z21_Z22, AArch64::Z22_Z23, AArch64::Z23_Z24,
  AArch64::Z24_Z25, AArch64::Z25_Z26, AArch64::Z26_Z27, AArch64::Z27_Z28,
  AArch64::Z28_Z29, AArch64::Z29_Z30, AArch64::Z30_Z31, AArch64::Z31_Z0
}

Definition at line 524 of file AArch64Disassembler.cpp.

◆ ZZZDecoderTable

const unsigned ZZZDecoderTable[]

static

Initial value:

= {
  AArch64::Z0_Z1_Z2,    AArch64::Z1_Z2_Z3,    AArch64::Z2_Z3_Z4,
  AArch64::Z3_Z4_Z5,    AArch64::Z4_Z5_Z6,    AArch64::Z5_Z6_Z7,
  AArch64::Z6_Z7_Z8,    AArch64::Z7_Z8_Z9,    AArch64::Z8_Z9_Z10,
  AArch64::Z9_Z10_Z11,  AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13,
  AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16,
  AArch64::Z15_Z16_Z17, AArch64::Z16_Z17_Z18, AArch64::Z17_Z18_Z19,
  AArch64::Z18_Z19_Z20, AArch64::Z19_Z20_Z21, AArch64::Z20_Z21_Z22,
  AArch64::Z21_Z22_Z23, AArch64::Z22_Z23_Z24, AArch64::Z23_Z24_Z25,
  AArch64::Z24_Z25_Z26, AArch64::Z25_Z26_Z27, AArch64::Z26_Z27_Z28,
  AArch64::Z27_Z28_Z29, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31,
  AArch64::Z30_Z31_Z0,  AArch64::Z31_Z0_Z1
}

Definition at line 545 of file AArch64Disassembler.cpp.

◆ ZZZZDecoderTable

const unsigned ZZZZDecoderTable[]

static

Initial value:

= {
  AArch64::Z0_Z1_Z2_Z3,     AArch64::Z1_Z2_Z3_Z4,     AArch64::Z2_Z3_Z4_Z5,
  AArch64::Z3_Z4_Z5_Z6,     AArch64::Z4_Z5_Z6_Z7,     AArch64::Z5_Z6_Z7_Z8,
  AArch64::Z6_Z7_Z8_Z9,     AArch64::Z7_Z8_Z9_Z10,    AArch64::Z8_Z9_Z10_Z11,
  AArch64::Z9_Z10_Z11_Z12,  AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14,
  AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17,
  AArch64::Z15_Z16_Z17_Z18, AArch64::Z16_Z17_Z18_Z19, AArch64::Z17_Z18_Z19_Z20,
  AArch64::Z18_Z19_Z20_Z21, AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23,
  AArch64::Z21_Z22_Z23_Z24, AArch64::Z22_Z23_Z24_Z25, AArch64::Z23_Z24_Z25_Z26,
  AArch64::Z24_Z25_Z26_Z27, AArch64::Z25_Z26_Z27_Z28, AArch64::Z26_Z27_Z28_Z29,
  AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0,
  AArch64::Z30_Z31_Z0_Z1,   AArch64::Z31_Z0_Z1_Z2
}

Definition at line 569 of file AArch64Disassembler.cpp.

Macros

Typedefs

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

◆ Fail

◆ SoftFail

◆ Success

Typedef Documentation

◆ DecodeStatus

Function Documentation

◆ Check()

◆ createAArch64Disassembler()

◆ createAArch64ExternalSymbolizer()

◆ DecodeAddSubERegInstruction()

◆ DecodeAddSubImmShift()

◆ DecodeAdrInstruction()

◆ DecodeDDDDRegisterClass()

◆ DecodeDDDRegisterClass()

◆ DecodeDDRegisterClass()

◆ DecodeExclusiveLdStInstruction()

◆ DecodeFixedPointScaleImm32()

◆ DecodeFixedPointScaleImm64()

◆ DecodeFMOVLaneInstruction()

◆ DecodeFPR128_loRegisterClass()

◆ DecodeFPR128RegisterClass()

◆ DecodeFPR16RegisterClass()

◆ DecodeFPR32RegisterClass()

◆ DecodeFPR64RegisterClass()

◆ DecodeFPR8RegisterClass()

◆ DecodeGPR32RegisterClass()

◆ DecodeGPR32spRegisterClass()

◆ DecodeGPR64commonRegisterClass()

◆ DecodeGPR64RegisterClass()

◆ DecodeGPR64spRegisterClass()

◆ DecodeGPRSeqPairsClassRegisterClass()

◆ DecodeImm8OptLsl()

◆ DecodeLogicalImmInstruction()

◆ DecodeMemExtend()

◆ DecodeModImmInstruction()

◆ DecodeModImmTiedInstruction()

◆ DecodeMoveImmInstruction()

◆ DecodeMRSSystemRegister()

◆ DecodeMSRSystemRegister()

◆ DecodePairLdStInstruction()

◆ DecodePCRelLabel19()

◆ DecodePPR_3bRegisterClass()

◆ DecodePPRRegisterClass()

◆ DecodeQQQQRegisterClass()

◆ DecodeQQQRegisterClass()

◆ DecodeQQRegisterClass()

◆ DecodeSignedLdStInstruction()

◆ DecodeSImm()

◆ DecodeSVEIncDecImm()

◆ DecodeSVELogicalImmInstruction()

◆ DecodeSystemPStateInstruction()

◆ DecodeTestAndBranch()

◆ DecodeThreeAddrSRegInstruction()

◆ DecodeUnconditionalBranch()

◆ DecodeUnsignedLdStInstruction()

◆ DecodeVecShiftL16Imm()

◆ DecodeVecShiftL32Imm()

◆ DecodeVecShiftL64Imm()

◆ DecodeVecShiftL8Imm()

◆ DecodeVecShiftLImm()

◆ DecodeVecShiftR16Imm()

◆ DecodeVecShiftR16ImmNarrow()

◆ DecodeVecShiftR32Imm()

◆ DecodeVecShiftR32ImmNarrow()

◆ DecodeVecShiftR64Imm()

◆ DecodeVecShiftR64ImmNarrow()

◆ DecodeVecShiftR8Imm()

◆ DecodeVecShiftRImm()

◆ DecodeVectorRegisterClass()

◆ DecodeWSeqPairsClassRegisterClass()

◆ DecodeXSeqPairsClassRegisterClass()

◆ DecodeZPR2RegisterClass()

◆ DecodeZPR3RegisterClass()

◆ DecodeZPR4RegisterClass()