33 AArch64ELFObjectWriter(uint8_t OSABI,
bool IsILP32);
35 ~AArch64ELFObjectWriter()
override =
default;
43 unsigned Type)
const override;
49AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI,
bool IsILP32)
55 IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
56#define BAD_ILP32_MOV(lp64rtype) \
57 "ILP32 absolute MOV relocation not " \
58 "supported (LP64 eqv: " #lp64rtype ")"
109unsigned AArch64ELFObjectWriter::getRelocType(
MCContext &Ctx,
112 bool IsPCRel)
const {
125 "Should only be expression-level modifiers here");
129 "Should only be expression-level modifiers here");
135 return ELF::R_AARCH64_NONE;
137 return R_CLS(PREL16);
146 "ILP32 8 byte PC relative data "
147 "relocation not supported (LP64 eqv: PREL64)");
148 return ELF::R_AARCH64_NONE;
150 return ELF::R_AARCH64_PREL64;
154 "invalid symbol kind for ADR relocation");
155 return R_CLS(ADR_PREL_LO21);
158 return R_CLS(ADR_PREL_PG_HI21);
162 "invalid fixup for 32-bit pcrel ADRP instruction "
164 return ELF::R_AARCH64_NONE;
166 return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
170 return R_CLS(ADR_GOT_PAGE);
172 return R_CLS(TLSIE_ADR_GOTTPREL_PAGE21);
174 return R_CLS(TLSDESC_ADR_PAGE21);
176 "invalid symbol kind for ADRP relocation");
177 return ELF::R_AARCH64_NONE;
179 return R_CLS(JUMP26);
181 return R_CLS(CALL26);
184 return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
186 return R_CLS(GOT_LD_PREL19);
187 return R_CLS(LD_PREL_LO19);
189 return R_CLS(TSTBR14);
192 "relocation of PAC/AUT instructions is not supported");
193 return ELF::R_AARCH64_NONE;
195 return R_CLS(CONDBR19);
198 return ELF::R_AARCH64_NONE;
202 return ELF::R_AARCH64_NONE;
203 switch (
Fixup.getTargetKind()) {
206 return ELF::R_AARCH64_NONE;
212 ? ELF::R_AARCH64_GOTPCREL32
217 "ILP32 8 byte absolute data "
218 "relocation not supported (LP64 eqv: ABS64)");
219 return ELF::R_AARCH64_NONE;
223 return ELF::R_AARCH64_AUTH_ABS64;
224 return ELF::R_AARCH64_ABS64;
228 return R_CLS(TLSLD_ADD_DTPREL_HI12);
230 return R_CLS(TLSLE_ADD_TPREL_HI12);
232 return R_CLS(TLSLD_ADD_DTPREL_LO12_NC);
234 return R_CLS(TLSLD_ADD_DTPREL_LO12);
236 return R_CLS(TLSLE_ADD_TPREL_LO12_NC);
238 return R_CLS(TLSLE_ADD_TPREL_LO12);
240 return R_CLS(TLSDESC_ADD_LO12);
242 return R_CLS(ADD_ABS_LO12_NC);
245 "invalid fixup for add (uimm12) instruction");
246 return ELF::R_AARCH64_NONE;
249 return R_CLS(LDST8_ABS_LO12_NC);
251 return R_CLS(TLSLD_LDST8_DTPREL_LO12);
253 return R_CLS(TLSLD_LDST8_DTPREL_LO12_NC);
255 return R_CLS(TLSLE_LDST8_TPREL_LO12);
257 return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
260 "invalid fixup for 8-bit load/store instruction");
261 return ELF::R_AARCH64_NONE;
264 return R_CLS(LDST16_ABS_LO12_NC);
266 return R_CLS(TLSLD_LDST16_DTPREL_LO12);
268 return R_CLS(TLSLD_LDST16_DTPREL_LO12_NC);
270 return R_CLS(TLSLE_LDST16_TPREL_LO12);
272 return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
275 "invalid fixup for 16-bit load/store instruction");
276 return ELF::R_AARCH64_NONE;
279 return R_CLS(LDST32_ABS_LO12_NC);
281 return R_CLS(TLSLD_LDST32_DTPREL_LO12);
283 return R_CLS(TLSLD_LDST32_DTPREL_LO12_NC);
285 return R_CLS(TLSLE_LDST32_TPREL_LO12);
287 return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
290 return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
293 "LP64 4 byte unchecked GOT load/store relocation "
294 "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
295 return ELF::R_AARCH64_NONE;
301 "ILP32 4 byte checked GOT load/store relocation "
302 "not supported (unchecked eqv: LD32_GOT_LO12_NC)");
305 "LP64 4 byte checked GOT load/store relocation "
306 "not supported (unchecked/ILP32 eqv: "
307 "LD32_GOT_LO12_NC)");
309 return ELF::R_AARCH64_NONE;
313 return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
316 "LP64 32-bit load/store "
317 "relocation not supported (ILP32 eqv: "
318 "TLSIE_LD32_GOTTPREL_LO12_NC)");
319 return ELF::R_AARCH64_NONE;
324 return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
327 "LP64 4 byte TLSDESC load/store relocation "
328 "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
329 return ELF::R_AARCH64_NONE;
334 "invalid fixup for 32-bit load/store instruction "
335 "fixup_aarch64_ldst_imm12_scale4");
336 return ELF::R_AARCH64_NONE;
339 return R_CLS(LDST64_ABS_LO12_NC);
345 return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
346 return ELF::R_AARCH64_LD64_GOT_LO12_NC;
349 "relocation not supported (LP64 eqv: "
350 "LD64_GOT_LO12_NC)");
351 return ELF::R_AARCH64_NONE;
355 return R_CLS(TLSLD_LDST64_DTPREL_LO12);
357 return R_CLS(TLSLD_LDST64_DTPREL_LO12_NC);
359 return R_CLS(TLSLE_LDST64_TPREL_LO12);
361 return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
364 return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
367 "relocation not supported (LP64 eqv: "
368 "TLSIE_LD64_GOTTPREL_LO12_NC)");
369 return ELF::R_AARCH64_NONE;
374 return ELF::R_AARCH64_TLSDESC_LD64_LO12;
377 "relocation not supported (LP64 eqv: "
378 "TLSDESC_LD64_LO12)");
379 return ELF::R_AARCH64_NONE;
383 "invalid fixup for 64-bit load/store instruction");
384 return ELF::R_AARCH64_NONE;
387 return R_CLS(LDST128_ABS_LO12_NC);
389 return R_CLS(TLSLD_LDST128_DTPREL_LO12);
391 return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
393 return R_CLS(TLSLE_LDST128_TPREL_LO12);
395 return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
398 "invalid fixup for 128-bit load/store instruction");
399 return ELF::R_AARCH64_NONE;
403 return ELF::R_AARCH64_MOVW_UABS_G3;
405 return ELF::R_AARCH64_MOVW_UABS_G2;
407 return ELF::R_AARCH64_MOVW_SABS_G2;
409 return ELF::R_AARCH64_MOVW_UABS_G2_NC;
411 return R_CLS(MOVW_UABS_G1);
413 return ELF::R_AARCH64_MOVW_SABS_G1;
415 return ELF::R_AARCH64_MOVW_UABS_G1_NC;
417 return R_CLS(MOVW_UABS_G0);
419 return R_CLS(MOVW_SABS_G0);
421 return R_CLS(MOVW_UABS_G0_NC);
423 return ELF::R_AARCH64_MOVW_PREL_G3;
425 return ELF::R_AARCH64_MOVW_PREL_G2;
427 return ELF::R_AARCH64_MOVW_PREL_G2_NC;
429 return R_CLS(MOVW_PREL_G1);
431 return ELF::R_AARCH64_MOVW_PREL_G1_NC;
433 return R_CLS(MOVW_PREL_G0);
435 return R_CLS(MOVW_PREL_G0_NC);
437 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
439 return R_CLS(TLSLD_MOVW_DTPREL_G1);
441 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
443 return R_CLS(TLSLD_MOVW_DTPREL_G0);
445 return R_CLS(TLSLD_MOVW_DTPREL_G0_NC);
447 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
449 return R_CLS(TLSLE_MOVW_TPREL_G1);
451 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
453 return R_CLS(TLSLE_MOVW_TPREL_G0);
455 return R_CLS(TLSLE_MOVW_TPREL_G0_NC);
457 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
459 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
461 "invalid fixup for movz/movk instruction");
462 return ELF::R_AARCH64_NONE;
465 return ELF::R_AARCH64_NONE;
472bool AArch64ELFObjectWriter::needsRelocateWithSymbol(
const MCValue &Val,
479AArch64ELFObjectWriter::getMemtagRelocsSection(
MCContext &Ctx)
const {
484std::unique_ptr<MCObjectTargetWriter>
486 return std::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);
#define BAD_ILP32_MOV(lp64rtype)
static bool isNonILP32reloc(const MCFixup &Fixup, AArch64MCExpr::VariantKind RefKind, MCContext &Ctx)
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static VariantKind getSymbolLoc(VariantKind Kind)
static bool isNotChecked(VariantKind Kind)
static VariantKind getAddressFrag(VariantKind Kind)
Context object for machine code objects.
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
void reportError(SMLoc L, const Twine &Msg)
virtual bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym, unsigned Type) const
virtual MCSectionELF * getMemtagRelocsSection(MCContext &Ctx) const
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const =0
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
This represents a section on linux, lots of unix variants and some bare metal systems.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
This represents an "assembler immediate".
uint32_t getRefKind() const
Target - Wrapper for Target specific information.
The instances of the Type class are immutable: once they are created, they are never changed.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_aarch64_pcrel_branch16
@ fixup_aarch64_ldst_imm12_scale4
@ fixup_aarch64_pcrel_call26
@ fixup_aarch64_pcrel_branch26
@ fixup_aarch64_pcrel_branch19
@ fixup_aarch64_ldr_pcrel_imm19
@ fixup_aarch64_pcrel_adr_imm21
@ fixup_aarch64_pcrel_branch14
@ fixup_aarch64_ldst_imm12_scale2
@ fixup_aarch64_ldst_imm12_scale16
@ fixup_aarch64_pcrel_adrp_imm21
@ fixup_aarch64_add_imm12
@ fixup_aarch64_ldst_imm12_scale8
@ fixup_aarch64_ldst_imm12_scale1
@ SHT_AARCH64_MEMTAG_GLOBALS_STATIC
This is an optimization pass for GlobalISel generic memory operations.
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
@ FK_Data_8
A eight-byte fixup.
@ FK_Data_1
A one-byte fixup.
@ FK_Data_4
A four-byte fixup.
@ FK_Data_2
A two-byte fixup.
std::unique_ptr< MCObjectTargetWriter > createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)