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AArch64TargetTransformInfo.h
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1 //===- AArch64TargetTransformInfo.h - AArch64 specific TTI ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// AArch64 target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
18 
19 #include "AArch64.h"
20 #include "AArch64Subtarget.h"
21 #include "AArch64TargetMachine.h"
22 #include "llvm/ADT/ArrayRef.h"
25 #include "llvm/IR/Function.h"
26 #include "llvm/IR/Intrinsics.h"
27 #include <cstdint>
28 
29 namespace llvm {
30 
31 class APInt;
32 class Instruction;
33 class IntrinsicInst;
34 class Loop;
35 class SCEV;
36 class ScalarEvolution;
37 class Type;
38 class Value;
39 class VectorType;
40 
41 class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
43  using TTI = TargetTransformInfo;
44 
45  friend BaseT;
46 
47  const AArch64Subtarget *ST;
48  const AArch64TargetLowering *TLI;
49 
50  const AArch64Subtarget *getST() const { return ST; }
51  const AArch64TargetLowering *getTLI() const { return TLI; }
52 
53  enum MemIntrinsicType {
54  VECTOR_LDST_TWO_ELEMENTS,
55  VECTOR_LDST_THREE_ELEMENTS,
56  VECTOR_LDST_FOUR_ELEMENTS
57  };
58 
59  bool isWideningInstruction(Type *Ty, unsigned Opcode,
61 
62 public:
63  explicit AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
64  : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
65  TLI(ST->getTargetLowering()) {}
66 
67  bool areInlineCompatible(const Function *Caller,
68  const Function *Callee) const;
69 
70  /// \name Scalar TTI Implementations
71  /// @{
72 
74  int getIntImmCost(int64_t Val);
75  int getIntImmCost(const APInt &Imm, Type *Ty);
76  int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
77  int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
78  Type *Ty);
79  TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
80 
81  /// @}
82 
83  /// \name Vector TTI Implementations
84  /// @{
85 
86  bool enableInterleavedAccessVectorization() { return true; }
87 
88  unsigned getNumberOfRegisters(bool Vector) {
89  if (Vector) {
90  if (ST->hasNEON())
91  return 32;
92  return 0;
93  }
94  return 31;
95  }
96 
97  unsigned getRegisterBitWidth(bool Vector) const {
98  if (Vector) {
99  if (ST->hasNEON())
100  return 128;
101  return 0;
102  }
103  return 64;
104  }
105 
107  return ST->getMinVectorRegisterBitWidth();
108  }
109 
110  unsigned getMaxInterleaveFactor(unsigned VF);
111 
112  int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
113  const Instruction *I = nullptr);
114 
115  int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
116  unsigned Index);
117 
118  int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
119 
121  unsigned Opcode, Type *Ty,
127 
128  int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr);
129 
130  int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
131  const Instruction *I = nullptr);
132 
134  bool IsZeroCmp) const;
135 
136  int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
137  unsigned AddressSpace, const Instruction *I = nullptr);
138 
140 
143 
145  Type *ExpectedType);
146 
148 
149  int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
150  ArrayRef<unsigned> Indices, unsigned Alignment,
151  unsigned AddressSpace,
152  bool UseMaskForCond = false,
153  bool UseMaskForGaps = false);
154 
155  bool
157  bool &AllowPromotionWithoutCommonHeader);
158 
159  unsigned getCacheLineSize();
160 
161  unsigned getPrefetchDistance();
162 
163  unsigned getMinPrefetchStride();
164 
166 
167  bool shouldExpandReduction(const IntrinsicInst *II) const {
168  return false;
169  }
170 
171  unsigned getGISelRematGlobalCost() const {
172  return 2;
173  }
174 
175  bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
176  TTI::ReductionFlags Flags) const;
177 
178  int getArithmeticReductionCost(unsigned Opcode, Type *Ty,
179  bool IsPairwiseForm);
180 
181  int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
182  /// @}
183 };
184 
185 } // end namespace llvm
186 
187 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
Type
MessagePack types as defined in the standard, with the exception of Integer being divided into a sign...
Definition: MsgPackReader.h:48
This class represents lattice values for constants.
Definition: AllocatorList.h:23
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
The main scalar evolution driver.
unsigned getRegisterBitWidth(bool Vector) const
F(f)
Base class which can be used to help build a TTI implementation.
Definition: BasicTTIImpl.h:77
unsigned getMaxInterleaveFactor(unsigned VF)
int getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None, ArrayRef< const Value *> Args=ArrayRef< const Value *>())
unsigned getIntImmCost(const APInt &Imm, Type *Ty)
int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)
int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr)
PopcntSupportKind
Flags indicating the kind of support for population count.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
Analysis containing CSE Info
Definition: CSEInfo.cpp:20
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)
unsigned getMinVectorRegisterBitWidth() const
int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp)
int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, unsigned AddressSpace, const Instruction *I=nullptr)
bool useReductionIntrinsic(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const
Returns options for expansion of memcmp. IsZeroCmp is.
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType)
int getIntImmCost(int64_t Val)
Calculate the cost of materializing a 64-bit value.
Flags describing the kind of vector reduction.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader)
See if I should be considered for address type promotion.
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const
int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, const Instruction *I=nullptr)
int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond=false, bool UseMaskForGaps=false)
bool shouldExpandReduction(const IntrinsicInst *II) const
AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
OperandValueProperties
Additional properties of an operand&#39;s values.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
bool areInlineCompatible(const Function *Caller, const Function *Callee) const
int getCostOfKeepingLiveOverCall(ArrayRef< Type *> Tys)
AddressSpace
Definition: NVPTXBaseInfo.h:21
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP)
Class to represent vector types.
Definition: DerivedTypes.h:427
Class for arbitrary precision integers.
Definition: APInt.h:69
amdgpu Simplify well known AMD library false FunctionCallee Callee
int getArithmeticReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm)
unsigned getNumberOfRegisters(bool Vector)
unsigned getGISelRematGlobalCost() const
This class represents an analyzed expression in the program.
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:509
Parameters that control the generic loop unrolling transformation.
#define I(x, y, z)
Definition: MD5.cpp:58
LLVM Value Representation.
Definition: Value.h:73
static const Function * getParent(const Value *V)
const DataLayout & getDataLayout() const
int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, const Instruction *I=nullptr)
OperandValueKind
Additional information about an operand&#39;s possible values.
This pass exposes codegen information to IR-level passes.
Information about a load/store intrinsic defined by the target.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:43
ShuffleKind
The various kinds of shuffle patterns for vector queries.