LLVM  10.0.0svn
Macros | Functions
AMDGPURegisterBankInfo.cpp File Reference

This file implements the targeting of the RegisterBankInfo class for AMDGPU. More...

#include "AMDGPURegisterBankInfo.h"
#include "AMDGPUInstrInfo.h"
#include "AMDGPUSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIMachineFunctionInfo.h"
#include "SIRegisterInfo.h"
#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/Constants.h"
#include "AMDGPUGenRegisterBank.inc"
#include "AMDGPUGenRegisterBankInfo.def"
Include dependency graph for AMDGPURegisterBankInfo.cpp:

Go to the source code of this file.

Macros

#define GET_TARGET_REGBANK_IMPL
 

Functions

static bool isInstrUniformNonExtLoadAlign4 (const MachineInstr &MI)
 
static void setRegsToType (MachineRegisterInfo &MRI, ArrayRef< Register > Regs, LLT NewTy)
 Replace the current type each register in Regs has with NewTy. More...
 
static LLT getHalfSizedType (LLT Ty)
 
static MachineInstrgetOtherVRegDef (const MachineRegisterInfo &MRI, Register Reg, const MachineInstr &MI)
 
static void substituteSimpleCopyRegs (const AMDGPURegisterBankInfo::OperandsMapper &OpdMapper, unsigned OpIdx)
 
static std::pair< Register, unsignedgetBaseWithConstantOffset (MachineRegisterInfo &MRI, Register Reg)
 
static bool isZero (Register Reg, MachineRegisterInfo &MRI)
 
static unsigned extractGLC (unsigned CachePolicy)
 
static unsigned extractSLC (unsigned CachePolicy)
 
static unsigned extractDLC (unsigned CachePolicy)
 
static unsigned regBankUnion (unsigned RB0, unsigned RB1)
 

Detailed Description

This file implements the targeting of the RegisterBankInfo class for AMDGPU.

Todo:
This should be generated by TableGen.

Definition in file AMDGPURegisterBankInfo.cpp.

Macro Definition Documentation

◆ GET_TARGET_REGBANK_IMPL

#define GET_TARGET_REGBANK_IMPL

Definition at line 29 of file AMDGPURegisterBankInfo.cpp.

Function Documentation

◆ extractDLC()

static unsigned extractDLC ( unsigned  CachePolicy)
static

Definition at line 1244 of file AMDGPURegisterBankInfo.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addUse(), llvm::RegisterBankInfo::applyDefaultMapping(), assert(), B, ValueMapping::BreakDown, llvm::MachineIRBuilder::buildAnd(), llvm::MachineIRBuilder::buildAnyExt(), llvm::MachineIRBuilder::buildAShr(), llvm::MachineIRBuilder::buildBitcast(), llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildCopy(), llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildLShr(), llvm::MachineIRBuilder::buildOr(), llvm::MachineIRBuilder::buildSelect(), llvm::MachineIRBuilder::buildSExtOrTrunc(), llvm::MachineIRBuilder::buildShl(), llvm::MachineIRBuilder::buildTrunc(), llvm::MachineIRBuilder::buildZExt(), llvm::MachineIRBuilder::buildZExtOrTrunc(), llvm::MachineInstrBuilder::cloneMemRefs(), llvm::constrainSelectedInstRegOperands(), llvm::Default, llvm::numbers::e, E, llvm::MachineInstr::eraseFromParent(), llvm::MipsISD::Ext, extractGLC(), extractSLC(), llvm::LLT::getAddressSpace(), getHalfSizedType(), llvm::RegisterBank::getID(), llvm::MachineOperand::getImm(), OperandsMapper::getInstrMapping(), llvm::RegisterBankInfo::getInstructionMapping(), llvm::MachineInstr::getIntrinsicID(), OperandsMapper::getMI(), llvm::MachineIRBuilder::getMRI(), OperandsMapper::getMRI(), llvm::AMDGPU::getMUBUFOpcode(), llvm::LLT::getNumElements(), llvm::MachineInstr::getNumExplicitDefs(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::RegisterBankInfo::getOperandsMapping(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineInstrBuilder::getReg(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineFunction::getRegInfo(), llvm::LLT::getScalarSizeInBits(), llvm::LLT::getSizeInBits(), llvm::getSizeInBits(), llvm::MachineRegisterInfo::getType(), getValueMapping(), OperandsMapper::getVRegs(), llvm::MipsISD::Hi, I, isInstrUniformNonExtLoadAlign4(), llvm::MachineOperand::isIntrinsicID(), llvm::MachineOperand::isReg(), llvm::LLT::isScalar(), isZero(), llvm::LegalizerHelper::Legalized, llvm_unreachable, llvm::MipsISD::Lo, AMDGPUAS::LOCAL_ADDRESS, llvm::AMDGPU::lookupRsrcIntrinsic(), llvm::LegalizerHelper::lower(), llvm::make_range(), llvm::MachineInstr::memoperands_begin(), MRI, AMDGPUAS::PRIVATE_ADDRESS, llvm::RegisterBankInfo::PartialMapping::RegBank, AMDGPUAS::REGION_ADDRESS, llvm::report_fatal_error(), llvm::LLT::scalar(), llvm::MachineIRBuilder::setInstr(), llvm::MachineRegisterInfo::setRegBank(), setRegsToType(), Signed, Size, substituteSimpleCopyRegs(), llvm::LLT::vector(), and llvm::LegalizerHelper::widenScalar().

◆ extractGLC()

static unsigned extractGLC ( unsigned  CachePolicy)
static

Definition at line 1236 of file AMDGPURegisterBankInfo.cpp.

Referenced by extractDLC().

◆ extractSLC()

static unsigned extractSLC ( unsigned  CachePolicy)
static

Definition at line 1240 of file AMDGPURegisterBankInfo.cpp.

Referenced by extractDLC().

◆ getBaseWithConstantOffset()

static std::pair<Register, unsigned> getBaseWithConstantOffset ( MachineRegisterInfo MRI,
Register  Reg 
)
static

◆ getHalfSizedType()

static LLT getHalfSizedType ( LLT  Ty)
static

Definition at line 633 of file AMDGPURegisterBankInfo.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::addSuccessor(), assert(), B, llvm::MachineBasicBlock::begin(), llvm::MachineIRBuilder::buildBuildVector(), llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildMerge(), llvm::BuildMI(), llvm::MachineIRBuilder::buildUndef(), llvm::MachineIRBuilder::buildUnmerge(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::SmallSet< T, N, C >::count(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::MachineFunction::CreateMachineBasicBlock(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::tgtok::Def, llvm::MachineInstr::defs(), llvm::SmallSet< T, N, C >::empty(), llvm::MachineBasicBlock::end(), llvm::MachineIRBuilder::getDL(), llvm::LLT::getElementType(), llvm::RegisterBank::getID(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineIRBuilder::getMBB(), llvm::MachineIRBuilder::getMF(), llvm::LLT::getNumElements(), llvm::MachineInstr::getOperand(), llvm::MachineInstrBuilder::getReg(), llvm::MachineOperand::getReg(), getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::LLT::getScalarSizeInBits(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::SIRegisterInfo::getWaveMaskRegClass(), I, llvm::SmallSet< T, N, C >::insert(), llvm::MachineFunction::insert(), llvm::MachineOperand::isUse(), llvm::LLT::isVector(), llvm::GCNSubtarget::isWave32(), llvm::RegState::Kill, llvm::make_range(), Merge, MRI, llvm::SmallVectorTemplateBase< T >::push_back(), llvm::LLT::scalar(), llvm::LLT::scalarOrVector(), llvm::MachineIRBuilder::setInsertPt(), llvm::MachineIRBuilder::setInstr(), llvm::MachineIRBuilder::setMBB(), llvm::MachineOperand::setReg(), llvm::MachineRegisterInfo::setRegBank(), llvm::MachineRegisterInfo::setRegClass(), llvm::MachineRegisterInfo::setSimpleHint(), llvm::MachineRegisterInfo::setType(), llvm::MachineBasicBlock::splice(), llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs(), llvm::MachineInstr::uses(), and llvm::zip().

Referenced by extractDLC().

◆ getOtherVRegDef()

static MachineInstr* getOtherVRegDef ( const MachineRegisterInfo MRI,
Register  Reg,
const MachineInstr MI 
)
static

◆ isInstrUniformNonExtLoadAlign4()

static bool isInstrUniformNonExtLoadAlign4 ( const MachineInstr MI)
static

◆ isZero()

static bool isZero ( Register  Reg,
MachineRegisterInfo MRI 
)
static

◆ regBankUnion()

static unsigned regBankUnion ( unsigned  RB0,
unsigned  RB1 
)
static

◆ setRegsToType()

static void setRegsToType ( MachineRegisterInfo MRI,
ArrayRef< Register Regs,
LLT  NewTy 
)
static

Replace the current type each register in Regs has with NewTy.

Definition at line 625 of file AMDGPURegisterBankInfo.cpp.

References assert(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), and llvm::MachineRegisterInfo::setType().

Referenced by extractDLC().

◆ substituteSimpleCopyRegs()

static void substituteSimpleCopyRegs ( const AMDGPURegisterBankInfo::OperandsMapper &  OpdMapper,
unsigned  OpIdx 
)
static