LLVM  10.0.0svn
AMDGPURegisterInfo.h
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1 //===-- AMDGPURegisterInfo.h - AMDGPURegisterInfo Interface -*- C++ -*-----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// TargetRegisterInfo interface that is implemented by all hw codegen
11 /// targets.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUREGISTERINFO_H
16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUREGISTERINFO_H
17 
18 #define GET_REGINFO_HEADER
19 #include "AMDGPUGenRegisterInfo.inc"
20 
21 namespace llvm {
22 
23 class GCNSubtarget;
24 class TargetInstrInfo;
25 
28 
29  /// \returns the sub reg enum value for the given \p Channel
30  /// (e.g. getSubRegFromChannel(0) -> AMDGPU::sub0)
31  static unsigned getSubRegFromChannel(unsigned Channel, unsigned NumRegs = 1);
32 
33  void reserveRegisterTuples(BitVector &, unsigned Reg) const;
34 };
35 
36 } // End namespace llvm
37 
38 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned Reg
static unsigned getSubRegFromChannel(unsigned Channel, unsigned NumRegs=1)
void reserveRegisterTuples(BitVector &, unsigned Reg) const