LLVM  10.0.0svn
ARCInstPrinter.cpp
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1 //===- ARCInstPrinter.cpp - ARC MCInst to assembly syntax -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class prints an ARC MCInst to a .s file.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "ARCInstPrinter.h"
14 #include "MCTargetDesc/ARCInfo.h"
15 #include "llvm/ADT/StringExtras.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCSymbol.h"
20 #include "llvm/Support/Casting.h"
21 #include "llvm/Support/Debug.h"
23 
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "asm-printer"
27 
28 #include "ARCGenAsmWriter.inc"
29 
30 template <class T>
31 static const char *BadConditionCode(T cc) {
32  LLVM_DEBUG(dbgs() << "Unknown condition code passed: " << cc << "\n");
33  return "{unknown-cc}";
34 }
35 
36 static const char *ARCBRCondCodeToString(ARCCC::BRCondCode BRCC) {
37  switch (BRCC) {
38  case ARCCC::BREQ:
39  return "eq";
40  case ARCCC::BRNE:
41  return "ne";
42  case ARCCC::BRLT:
43  return "lt";
44  case ARCCC::BRGE:
45  return "ge";
46  case ARCCC::BRLO:
47  return "lo";
48  case ARCCC::BRHS:
49  return "hs";
50  }
51  return BadConditionCode(BRCC);
52 }
53 
54 static const char *ARCCondCodeToString(ARCCC::CondCode CC) {
55  switch (CC) {
56  case ARCCC::EQ:
57  return "eq";
58  case ARCCC::NE:
59  return "ne";
60  case ARCCC::P:
61  return "p";
62  case ARCCC::N:
63  return "n";
64  case ARCCC::HS:
65  return "hs";
66  case ARCCC::LO:
67  return "lo";
68  case ARCCC::GT:
69  return "gt";
70  case ARCCC::GE:
71  return "ge";
72  case ARCCC::VS:
73  return "vs";
74  case ARCCC::VC:
75  return "vc";
76  case ARCCC::LT:
77  return "lt";
78  case ARCCC::LE:
79  return "le";
80  case ARCCC::HI:
81  return "hi";
82  case ARCCC::LS:
83  return "ls";
84  case ARCCC::PNZ:
85  return "pnz";
86  case ARCCC::AL:
87  return "al";
88  case ARCCC::NZ:
89  return "nz";
90  case ARCCC::Z:
91  return "z";
92  }
93  return BadConditionCode(CC);
94 }
95 
96 void ARCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
97  OS << StringRef(getRegisterName(RegNo)).lower();
98 }
99 
101  StringRef Annot, const MCSubtargetInfo &STI) {
102  printInstruction(MI, O);
103  printAnnotation(O, Annot);
104 }
105 
106 static void printExpr(const MCExpr *Expr, const MCAsmInfo *MAI,
107  raw_ostream &OS) {
108  int Offset = 0;
109  const MCSymbolRefExpr *SRE;
110 
111  if (const auto *CE = dyn_cast<MCConstantExpr>(Expr)) {
112  OS << "0x";
113  OS.write_hex(CE->getValue());
114  return;
115  }
116 
117  if (const auto *BE = dyn_cast<MCBinaryExpr>(Expr)) {
118  SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
119  const auto *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
120  assert(SRE && CE && "Binary expression must be sym+const.");
121  Offset = CE->getValue();
122  } else {
123  SRE = dyn_cast<MCSymbolRefExpr>(Expr);
124  assert(SRE && "Unexpected MCExpr type.");
125  }
127 
128  // Symbols are prefixed with '@'
129  OS << '@';
130  SRE->getSymbol().print(OS, MAI);
131 
132  if (Offset) {
133  if (Offset > 0)
134  OS << '+';
135  OS << Offset;
136  }
137 }
138 
139 void ARCInstPrinter::printOperand(const MCInst *MI, unsigned OpNum,
140  raw_ostream &O) {
141  const MCOperand &Op = MI->getOperand(OpNum);
142  if (Op.isReg()) {
143  printRegName(O, Op.getReg());
144  return;
145  }
146 
147  if (Op.isImm()) {
148  O << Op.getImm();
149  return;
150  }
151 
152  assert(Op.isExpr() && "unknown operand kind in printOperand");
153  printExpr(Op.getExpr(), &MAI, O);
154 }
155 
156 void ARCInstPrinter::printMemOperandRI(const MCInst *MI, unsigned OpNum,
157  raw_ostream &O) {
158  const MCOperand &base = MI->getOperand(OpNum);
159  const MCOperand &offset = MI->getOperand(OpNum + 1);
160  assert(base.isReg() && "Base should be register.");
161  assert(offset.isImm() && "Offset should be immediate.");
162  printRegName(O, base.getReg());
163  O << "," << offset.getImm();
164 }
165 
166 void ARCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum,
167  raw_ostream &O) {
168 
169  const MCOperand &Op = MI->getOperand(OpNum);
170  assert(Op.isImm() && "Predicate operand is immediate.");
172 }
173 
174 void ARCInstPrinter::printBRCCPredicateOperand(const MCInst *MI, unsigned OpNum,
175  raw_ostream &O) {
176  const MCOperand &Op = MI->getOperand(OpNum);
177  assert(Op.isImm() && "Predicate operand is immediate.");
179 }
bool isImm() const
Definition: MCInst.h:58
This class represents lattice values for constants.
Definition: AllocatorList.h:23
VariantKind getKind() const
Definition: MCExpr.h:344
bool isReg() const
Definition: MCInst.h:57
void printInstruction(const MCInst *MI, raw_ostream &O)
static const char * ARCBRCondCodeToString(ARCCC::BRCondCode BRCC)
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
static const char * ARCCondCodeToString(ARCCC::CondCode CC)
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:169
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:64
raw_ostream & write_hex(unsigned long long N)
Output N in hexadecimal, without any prefix or padding.
const MCExpr * getExpr() const
Definition: MCInst.h:95
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
static const char * getRegisterName(unsigned RegNo)
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
int64_t getImm() const
Definition: MCInst.h:75
This file contains the declaration of the ARCInstPrinter class, which is used to print ARC MCInst to ...
static const char * BadConditionCode(T cc)
bool isExpr() const
Definition: MCInst.h:60
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
static void printExpr(const MCExpr *Expr, const MCAsmInfo *MAI, raw_ostream &OS)
const MCSymbol & getSymbol() const
Definition: MCExpr.h:342
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:179
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:45
Generic base class for all target subtargets.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:332
LLVM_NODISCARD std::string lower() const
Definition: StringRef.cpp:107
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
#define LLVM_DEBUG(X)
Definition: Debug.h:122
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:59