LLVM  10.0.0svn
CombinerHelper.h
Go to the documentation of this file.
1 //===-- llvm/CodeGen/GlobalISel/CombinerHelper.h --------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===--------------------------------------------------------------------===//
8 //
9 /// This contains common combine transformations that may be used in a combine
10 /// pass,or by the target elsewhere.
11 /// Targets can pick individual opcode transformations from the helper or use
12 /// tryCombine which invokes all transformations. All of the transformations
13 /// return true if the MachineInstruction changed and false otherwise.
14 //
15 //===--------------------------------------------------------------------===//
16 
17 #ifndef LLVM_CODEGEN_GLOBALISEL_COMBINER_HELPER_H
18 #define LLVM_CODEGEN_GLOBALISEL_COMBINER_HELPER_H
19 
21 #include "llvm/CodeGen/Register.h"
22 
23 namespace llvm {
24 
25 class GISelChangeObserver;
26 class MachineIRBuilder;
27 class MachineRegisterInfo;
28 class MachineInstr;
29 class MachineOperand;
30 class GISelKnownBits;
31 
33  LLT Ty; // The result type of the extend.
34  unsigned ExtendOpcode; // G_ANYEXT/G_SEXT/G_ZEXT
36 };
37 
39 protected:
44 
45 public:
47  GISelKnownBits *KB = nullptr);
48 
49  /// MachineRegisterInfo::replaceRegWith() and inform the observer of the changes
50  void replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const;
51 
52  /// Replace a single register operand with a new register and inform the
53  /// observer of the changes.
54  void replaceRegOpWith(MachineRegisterInfo &MRI, MachineOperand &FromRegOp,
55  Register ToReg) const;
56 
57  /// If \p MI is COPY, try to combine it.
58  /// Returns true if MI changed.
59  bool tryCombineCopy(MachineInstr &MI);
60  bool matchCombineCopy(MachineInstr &MI);
61  void applyCombineCopy(MachineInstr &MI);
62 
63  /// If \p MI is extend that consumes the result of a load, try to combine it.
64  /// Returns true if MI changed.
65  bool tryCombineExtendingLoads(MachineInstr &MI);
66  bool matchCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo);
67  void applyCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo);
68 
69  bool matchCombineBr(MachineInstr &MI);
70  bool tryCombineBr(MachineInstr &MI);
71 
72  /// Optimize memcpy intrinsics et al, e.g. constant len calls.
73  /// /p MaxLen if non-zero specifies the max length of a mem libcall to inline.
74  bool tryCombineMemCpyFamily(MachineInstr &MI, unsigned MaxLen = 0);
75 
76  /// Try to transform \p MI by using all of the above
77  /// combine functions. Returns true if changed.
78  bool tryCombine(MachineInstr &MI);
79 
80 private:
81  // Memcpy family optimization helpers.
82  bool optimizeMemcpy(MachineInstr &MI, Register Dst, Register Src,
83  unsigned KnownLen, unsigned DstAlign, unsigned SrcAlign,
84  bool IsVolatile);
85  bool optimizeMemmove(MachineInstr &MI, Register Dst, Register Src,
86  unsigned KnownLen, unsigned DstAlign, unsigned SrcAlign,
87  bool IsVolatile);
88  bool optimizeMemset(MachineInstr &MI, Register Dst, Register Val,
89  unsigned KnownLen, unsigned DstAlign, bool IsVolatile);
90 };
91 } // namespace llvm
92 
93 #endif
This class represents lattice values for constants.
Definition: AllocatorList.h:23
constexpr char IsVolatile[]
Key for Kernel::Arg::Metadata::mIsVolatile.
GISelKnownBits * KB
GISelChangeObserver & Observer
MachineIRBuilder & Builder
Abstract class that contains various methods for clients to notify about changes. ...
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Helper class to build MachineInstr.
MachineRegisterInfo & MRI
MachineOperand class - Representation of each machine instruction operand.
MachineInstr * MI
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
Wrapper class representing virtual and physical registers.
Definition: Register.h:19