LLVM  10.0.0svn
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating functions from LLVM IR into
10 // Machine IR.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/CodeGen/Analysis.h"
27 #include "llvm/IR/DataLayout.h"
28 #include "llvm/IR/DerivedTypes.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/Instructions.h"
31 #include "llvm/IR/IntrinsicInst.h"
32 #include "llvm/IR/LLVMContext.h"
33 #include "llvm/IR/Module.h"
34 #include "llvm/Support/Debug.h"
39 #include <algorithm>
40 using namespace llvm;
41 
42 #define DEBUG_TYPE "function-lowering-info"
43 
44 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
45 /// PHI nodes or outside of the basic block that defines it, or used by a
46 /// switch or atomic instruction, which may expand to multiple basic blocks.
48  if (I->use_empty()) return false;
49  if (isa<PHINode>(I)) return true;
50  const BasicBlock *BB = I->getParent();
51  for (const User *U : I->users())
52  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
53  return true;
54 
55  return false;
56 }
57 
59  // For the users of the source value being used for compare instruction, if
60  // the number of signed predicate is greater than unsigned predicate, we
61  // prefer to use SIGN_EXTEND.
62  //
63  // With this optimization, we would be able to reduce some redundant sign or
64  // zero extension instruction, and eventually more machine CSE opportunities
65  // can be exposed.
66  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
67  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
68  for (const User *U : V->users()) {
69  if (const auto *CI = dyn_cast<CmpInst>(U)) {
70  NumOfSigned += CI->isSigned();
71  NumOfUnsigned += CI->isUnsigned();
72  }
73  }
74  if (NumOfSigned > NumOfUnsigned)
75  ExtendKind = ISD::SIGN_EXTEND;
76 
77  return ExtendKind;
78 }
79 
81  SelectionDAG *DAG) {
82  Fn = &fn;
83  MF = &mf;
85  RegInfo = &MF->getRegInfo();
87  unsigned StackAlign = TFI->getStackAlignment();
88  DA = DAG->getDivergenceAnalysis();
89 
90  // Check whether the function can return without sret-demotion.
93 
94  GetReturnInfo(CC, Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
95  mf.getDataLayout());
97  TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());
98 
99  // If this personality uses funclets, we need to do a bit more work.
101  EHPersonality Personality = classifyEHPersonality(
102  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
103  if (isFuncletEHPersonality(Personality)) {
104  // Calculate state numbers if we haven't already.
105  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
106  if (Personality == EHPersonality::MSVC_CXX)
107  calculateWinCXXEHStateNumbers(&fn, EHInfo);
108  else if (isAsynchronousEHPersonality(Personality))
109  calculateSEHStateNumbers(&fn, EHInfo);
110  else if (Personality == EHPersonality::CoreCLR)
111  calculateClrEHStateNumbers(&fn, EHInfo);
112 
113  // Map all BB references in the WinEH data to MBBs.
114  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
115  for (WinEHHandlerType &H : TBME.HandlerArray) {
116  if (const AllocaInst *AI = H.CatchObj.Alloca)
117  CatchObjects.insert({AI, {}}).first->second.push_back(
118  &H.CatchObj.FrameIndex);
119  else
120  H.CatchObj.FrameIndex = INT_MAX;
121  }
122  }
123  }
124  if (Personality == EHPersonality::Wasm_CXX) {
125  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
126  calculateWasmEHInfo(&fn, EHInfo);
127  }
128 
129  // Initialize the mapping of values to registers. This is only set up for
130  // instruction values that are used outside of the block that defines
131  // them.
132  for (const BasicBlock &BB : *Fn) {
133  for (const Instruction &I : BB) {
134  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
135  Type *Ty = AI->getAllocatedType();
136  unsigned Align =
138  AI->getAlignment());
139 
140  // Static allocas can be folded into the initial stack frame
141  // adjustment. For targets that don't realign the stack, don't
142  // do this if there is an extra alignment requirement.
143  if (AI->isStaticAlloca() &&
144  (TFI->isStackRealignable() || (Align <= StackAlign))) {
145  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
146  uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
147 
148  TySize *= CUI->getZExtValue(); // Get total allocated size.
149  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
150  int FrameIndex = INT_MAX;
151  auto Iter = CatchObjects.find(AI);
152  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
153  FrameIndex = MF->getFrameInfo().CreateFixedObject(
154  TySize, 0, /*IsImmutable=*/false, /*isAliased=*/true);
155  MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
156  } else {
157  FrameIndex =
158  MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
159  }
160 
162  // Update the catch handler information.
163  if (Iter != CatchObjects.end()) {
164  for (int *CatchObjPtr : Iter->second)
165  *CatchObjPtr = FrameIndex;
166  }
167  } else {
168  // FIXME: Overaligned static allocas should be grouped into
169  // a single dynamic allocation instead of using a separate
170  // stack allocation for each one.
171  if (Align <= StackAlign)
172  Align = 0;
173  // Inform the Frame Information that we have variable-sized objects.
174  MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
175  }
176  }
177 
178  // Look for inline asm that clobbers the SP register.
179  if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
180  ImmutableCallSite CS(&I);
181  if (isa<InlineAsm>(CS.getCalledValue())) {
182  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
184  std::vector<TargetLowering::AsmOperandInfo> Ops =
185  TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
186  for (TargetLowering::AsmOperandInfo &Op : Ops) {
187  if (Op.Type == InlineAsm::isClobber) {
188  // Clobbers don't have SDValue operands, hence SDValue().
189  TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
190  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
191  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
192  Op.ConstraintVT);
193  if (PhysReg.first == SP)
195  }
196  }
197  }
198  }
199 
200  // Look for calls to the @llvm.va_start intrinsic. We can omit some
201  // prologue boilerplate for variadic functions that don't examine their
202  // arguments.
203  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
204  if (II->getIntrinsicID() == Intrinsic::vastart)
205  MF->getFrameInfo().setHasVAStart(true);
206  }
207 
208  // If we have a musttail call in a variadic function, we need to ensure we
209  // forward implicit register parameters.
210  if (const auto *CI = dyn_cast<CallInst>(&I)) {
211  if (CI->isMustTailCall() && Fn->isVarArg())
213  }
214 
215  // Mark values used outside their block as exported, by allocating
216  // a virtual register for them.
218  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
220 
221  // Decide the preferred extend type for a value.
223  }
224  }
225 
226  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
227  // also creates the initial PHI MachineInstrs, though none of the input
228  // operands are populated.
229  for (const BasicBlock &BB : *Fn) {
230  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
231  // are really data, and no instructions can live here.
232  if (BB.isEHPad()) {
233  const Instruction *PadInst = BB.getFirstNonPHI();
234  // If this is a non-landingpad EH pad, mark this function as using
235  // funclets.
236  // FIXME: SEH catchpads do not create EH scope/funclets, so we could avoid
237  // setting this in such cases in order to improve frame layout.
238  if (!isa<LandingPadInst>(PadInst)) {
239  MF->setHasEHScopes(true);
240  MF->setHasEHFunclets(true);
242  }
243  if (isa<CatchSwitchInst>(PadInst)) {
244  assert(&*BB.begin() == PadInst &&
245  "WinEHPrepare failed to remove PHIs from imaginary BBs");
246  continue;
247  }
248  if (isa<FuncletPadInst>(PadInst))
249  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
250  }
251 
253  MBBMap[&BB] = MBB;
254  MF->push_back(MBB);
255 
256  // Transfer the address-taken flag. This is necessary because there could
257  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
258  // the first one should be marked.
259  if (BB.hasAddressTaken())
260  MBB->setHasAddressTaken();
261 
262  // Mark landing pad blocks.
263  if (BB.isEHPad())
264  MBB->setIsEHPad();
265 
266  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
267  // appropriate.
268  for (const PHINode &PN : BB.phis()) {
269  if (PN.use_empty())
270  continue;
271 
272  // Skip empty types
273  if (PN.getType()->isEmptyTy())
274  continue;
275 
276  DebugLoc DL = PN.getDebugLoc();
277  unsigned PHIReg = ValueMap[&PN];
278  assert(PHIReg && "PHI node does not have an assigned virtual register!");
279 
280  SmallVector<EVT, 4> ValueVTs;
281  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
282  for (EVT VT : ValueVTs) {
283  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
285  for (unsigned i = 0; i != NumRegisters; ++i)
286  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
287  PHIReg += NumRegisters;
288  }
289  }
290  }
291 
292  if (isFuncletEHPersonality(Personality)) {
293  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
294 
295  // Map all BB references in the WinEH data to MBBs.
296  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
297  for (WinEHHandlerType &H : TBME.HandlerArray) {
298  if (H.Handler)
299  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
300  }
301  }
302  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
303  if (UME.Cleanup)
304  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
305  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
306  const auto *BB = UME.Handler.get<const BasicBlock *>();
307  UME.Handler = MBBMap[BB];
308  }
309  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
310  const auto *BB = CME.Handler.get<const BasicBlock *>();
311  CME.Handler = MBBMap[BB];
312  }
313  }
314 
315  else if (Personality == EHPersonality::Wasm_CXX) {
316  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
317  // Map all BB references in the WinEH data to MBBs.
319  for (auto &KV : EHInfo.EHPadUnwindMap) {
320  const auto *Src = KV.first.get<const BasicBlock *>();
321  const auto *Dst = KV.second.get<const BasicBlock *>();
322  NewMap[MBBMap[Src]] = MBBMap[Dst];
323  }
324  EHInfo.EHPadUnwindMap = std::move(NewMap);
325  }
326 }
327 
328 /// clear - Clear out all the function-specific state. This returns this
329 /// FunctionLoweringInfo to an empty state, ready to be used for a
330 /// different function.
332  MBBMap.clear();
333  ValueMap.clear();
334  VirtReg2Value.clear();
335  StaticAllocaMap.clear();
336  LiveOutRegInfo.clear();
337  VisitedBBs.clear();
338  ArgDbgValues.clear();
340  ByValArgFrameIndexMap.clear();
341  RegFixups.clear();
344  StatepointSpillMaps.clear();
345  PreferredExtendType.clear();
346 }
347 
348 /// CreateReg - Allocate a single virtual register for the given type.
349 unsigned FunctionLoweringInfo::CreateReg(MVT VT, bool isDivergent) {
351  MF->getSubtarget().getTargetLowering()->getRegClassFor(VT, isDivergent));
352 }
353 
354 /// CreateRegs - Allocate the appropriate number of virtual registers of
355 /// the correctly promoted or expanded types. Assign these registers
356 /// consecutive vreg numbers and return the first assigned number.
357 ///
358 /// In the case that the given value has struct or array type, this function
359 /// will assign registers for each member or element.
360 ///
361 unsigned FunctionLoweringInfo::CreateRegs(Type *Ty, bool isDivergent) {
363 
364  SmallVector<EVT, 4> ValueVTs;
365  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
366 
367  unsigned FirstReg = 0;
368  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
369  EVT ValueVT = ValueVTs[Value];
370  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
371 
372  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
373  for (unsigned i = 0; i != NumRegs; ++i) {
374  unsigned R = CreateReg(RegisterVT, isDivergent);
375  if (!FirstReg) FirstReg = R;
376  }
377  }
378  return FirstReg;
379 }
380 
382  return CreateRegs(V->getType(), DA && !TLI->requiresUniformRegister(*MF, V) &&
383  DA->isDivergent(V));
384 }
385 
386 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
387 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
388 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
389 /// the larger bit width by zero extension. The bit width must be no smaller
390 /// than the LiveOutInfo's existing bit width.
392 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
393  if (!LiveOutRegInfo.inBounds(Reg))
394  return nullptr;
395 
396  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
397  if (!LOI->IsValid)
398  return nullptr;
399 
400  if (BitWidth > LOI->Known.getBitWidth()) {
401  LOI->NumSignBits = 1;
402  LOI->Known = LOI->Known.zext(BitWidth, false /* => any extend */);
403  }
404 
405  return LOI;
406 }
407 
408 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
409 /// register based on the LiveOutInfo of its operands.
411  Type *Ty = PN->getType();
412  if (!Ty->isIntegerTy() || Ty->isVectorTy())
413  return;
414 
415  SmallVector<EVT, 1> ValueVTs;
416  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
417  assert(ValueVTs.size() == 1 &&
418  "PHIs with non-vector integer types should have a single VT.");
419  EVT IntVT = ValueVTs[0];
420 
421  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
422  return;
423  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
424  unsigned BitWidth = IntVT.getSizeInBits();
425 
426  unsigned DestReg = ValueMap[PN];
427  if (!Register::isVirtualRegister(DestReg))
428  return;
429  LiveOutRegInfo.grow(DestReg);
430  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
431 
432  Value *V = PN->getIncomingValue(0);
433  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
434  DestLOI.NumSignBits = 1;
435  DestLOI.Known = KnownBits(BitWidth);
436  return;
437  }
438 
439  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
440  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
441  DestLOI.NumSignBits = Val.getNumSignBits();
442  DestLOI.Known.Zero = ~Val;
443  DestLOI.Known.One = Val;
444  } else {
445  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
446  "CopyToReg node was created.");
447  unsigned SrcReg = ValueMap[V];
448  if (!Register::isVirtualRegister(SrcReg)) {
449  DestLOI.IsValid = false;
450  return;
451  }
452  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
453  if (!SrcLOI) {
454  DestLOI.IsValid = false;
455  return;
456  }
457  DestLOI = *SrcLOI;
458  }
459 
460  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
461  DestLOI.Known.One.getBitWidth() == BitWidth &&
462  "Masks should have the same bit width as the type.");
463 
464  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
465  Value *V = PN->getIncomingValue(i);
466  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
467  DestLOI.NumSignBits = 1;
468  DestLOI.Known = KnownBits(BitWidth);
469  return;
470  }
471 
472  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
473  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
474  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
475  DestLOI.Known.Zero &= ~Val;
476  DestLOI.Known.One &= Val;
477  continue;
478  }
479 
480  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
481  "its CopyToReg node was created.");
482  unsigned SrcReg = ValueMap[V];
483  if (!Register::isVirtualRegister(SrcReg)) {
484  DestLOI.IsValid = false;
485  return;
486  }
487  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
488  if (!SrcLOI) {
489  DestLOI.IsValid = false;
490  return;
491  }
492  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
493  DestLOI.Known.Zero &= SrcLOI->Known.Zero;
494  DestLOI.Known.One &= SrcLOI->Known.One;
495  }
496 }
497 
498 /// setArgumentFrameIndex - Record frame index for the byval
499 /// argument. This overrides previous frame index entry for this argument,
500 /// if any.
502  int FI) {
503  ByValArgFrameIndexMap[A] = FI;
504 }
505 
506 /// getArgumentFrameIndex - Get frame index for the byval argument.
507 /// If the argument does not have any assigned frame index then 0 is
508 /// returned.
510  auto I = ByValArgFrameIndexMap.find(A);
511  if (I != ByValArgFrameIndexMap.end())
512  return I->second;
513  LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
514  return INT_MAX;
515 }
516 
518  const Value *CPI, const TargetRegisterClass *RC) {
520  auto I = CatchPadExceptionPointers.insert({CPI, 0});
521  unsigned &VReg = I.first->second;
522  if (I.second)
523  VReg = MRI.createVirtualRegister(RC);
524  assert(VReg && "null vreg in exception pointer table!");
525  return VReg;
526 }
527 
528 const Value *
530  if (VirtReg2Value.empty()) {
531  SmallVector<EVT, 4> ValueVTs;
532  for (auto &P : ValueMap) {
533  ValueVTs.clear();
535  P.first->getType(), ValueVTs);
536  unsigned Reg = P.second;
537  for (EVT VT : ValueVTs) {
538  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
539  for (unsigned i = 0, e = NumRegisters; i != e; ++i)
540  VirtReg2Value[Reg++] = P.first;
541  }
542  }
543  }
544  return VirtReg2Value.lookup(Vreg);
545 }
void clear()
Definition: ValueMap.h:146
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:176
unsigned CreateReg(MVT VT, bool isDivergent=false)
CreateReg - Allocate a single virtual register for the given type.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:82
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:76
bool isDivergent(const Value *V) const
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:29
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:42
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:97
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void setHasEHFunclets(bool V)
unsigned Reg
virtual const TargetLowering * getTargetLowering() const
const AllocaInst * Alloca
Definition: WinEHFuncInfo.h:65
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:733
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:930
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:229
DenseMap< const Value *, unsigned > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
bool CanLowerReturn
CanLowerReturn - true iff the function&#39;s return value can be lowered to registers.
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:39
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:194
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:38
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1517
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:129
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:57
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:195
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
void clear()
clear - Removes all bits from the bitvector. Does not change capacity.
Definition: BitVector.h:366
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:369
const HexagonInstrInfo * TII
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:104
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:196
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:291
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
void setHasMustTailInVarArgFunc(bool B)
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
DenseMap< BBOrMBB, BBOrMBB > EHPadUnwindMap
This contains information for each constraint that we are lowering.
DenseSet< unsigned > RegsWithFixups
const LegacyDivergenceAnalysis * DA
static ISD::NodeType getPreferredExtendForValue(const Value *V)
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:223
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:732
virtual const TargetInstrInfo * getInstrInfo() const
void setHasOpaqueSPAdjustment(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:119
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
TargetInstrInfo - Interface to description of machine instruction set.
void clear()
clear - Clear out all the function-specific state.
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:46
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void setHasEHScopes(bool V)
#define P(N)
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:168
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:98
DenseMap< unsigned, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:148
unsigned const MachineRegisterInfo * MRI
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
KnownBits zext(unsigned BitWidth, bool ExtendedBitsAreKnownZero) const
Extends the underlying known Zero and One bits.
Definition: KnownBits.h:120
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
#define H(x, y, z)
Definition: MD5.cpp:57
const LegacyDivergenceAnalysis * getDivergenceAnalysis() const
Definition: SelectionDAG.h:423
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:770
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
DenseMap< const Instruction *, StatepointSpillMap > StatepointSpillMaps
Maps gc.statepoint instructions to their corresponding StatepointSpillMap instances.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:205
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Extended Value Type.
Definition: ValueTypes.h:33
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI&#39;s destination register based on the LiveOutI...
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:40
MachineBasicBlock * MBB
MBB - The current block.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:69
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
unsigned first
void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it&#39;s handlers to build WinEHFuncInfo, which describes the state number...
int CreateStackObject(uint64_t Size, llvm::Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:95
See the file comment.
Definition: ValueMap.h:85
union llvm::WinEHHandlerType::@203 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:212
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:221
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
virtual bool requiresUniformRegister(MachineFunction &MF, const Value *) const
Allows target to decide about the register class of the specific value that is live outside the defin...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned getNumIncomingValues() const
Return the number of incoming edges.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:96
Class for arbitrary precision integers.
Definition: APInt.h:69
iterator_range< user_iterator > users()
Definition: Value.h:419
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:502
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const WasmEHFuncInfo * getWasmEHFuncInfo() const
getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling...
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:470
unsigned CreateRegs(const Value *V)
MachineRegisterInfo * RegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
Establish a view to a call site for examination.
Definition: CallSite.h:897
#define I(x, y, z)
Definition: MD5.cpp:58
virtual const TargetFrameLowering * getFrameLowering() const
BitVector DescribedArgs
Bitvector with a bit set if corresponding argument is described in ArgDbgValues.
const Value * getValueFromVirtualReg(unsigned Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:152
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
Definition: APInt.h:1628
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
LLVM Value Representation.
Definition: Value.h:73
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1441
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:69
void push_back(MachineBasicBlock *MBB)
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
const TargetLowering * TLI
int CreateVariableSizedObject(llvm::Align Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created. ...
Conversion operators.
Definition: ISDOpcodes.h:496
#define LLVM_DEBUG(X)
Definition: Debug.h:122
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool use_empty() const
Definition: Value.h:342
This file describes how to lower LLVM code to machine code.
const BasicBlock * getParent() const
Definition: Instruction.h:66
an instruction to allocate memory on the stack
Definition: Instructions.h:59
unsigned InitializeRegForValue(const Value *V)