LLVM  10.0.0svn
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements routines for translating functions from LLVM IR into
10 // Machine IR.
11 //
12 //===----------------------------------------------------------------------===//
13 
16 #include "llvm/CodeGen/Analysis.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DerivedTypes.h"
30 #include "llvm/IR/Function.h"
31 #include "llvm/IR/Instructions.h"
32 #include "llvm/IR/IntrinsicInst.h"
33 #include "llvm/IR/LLVMContext.h"
34 #include "llvm/IR/Module.h"
35 #include "llvm/Support/Debug.h"
40 #include <algorithm>
41 using namespace llvm;
42 
43 #define DEBUG_TYPE "function-lowering-info"
44 
45 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
46 /// PHI nodes or outside of the basic block that defines it, or used by a
47 /// switch or atomic instruction, which may expand to multiple basic blocks.
49  if (I->use_empty()) return false;
50  if (isa<PHINode>(I)) return true;
51  const BasicBlock *BB = I->getParent();
52  for (const User *U : I->users())
53  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
54  return true;
55 
56  return false;
57 }
58 
60  // For the users of the source value being used for compare instruction, if
61  // the number of signed predicate is greater than unsigned predicate, we
62  // prefer to use SIGN_EXTEND.
63  //
64  // With this optimization, we would be able to reduce some redundant sign or
65  // zero extension instruction, and eventually more machine CSE opportunities
66  // can be exposed.
67  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
68  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
69  for (const User *U : V->users()) {
70  if (const auto *CI = dyn_cast<CmpInst>(U)) {
71  NumOfSigned += CI->isSigned();
72  NumOfUnsigned += CI->isUnsigned();
73  }
74  }
75  if (NumOfSigned > NumOfUnsigned)
76  ExtendKind = ISD::SIGN_EXTEND;
77 
78  return ExtendKind;
79 }
80 
82  SelectionDAG *DAG) {
83  Fn = &fn;
84  MF = &mf;
86  RegInfo = &MF->getRegInfo();
88  unsigned StackAlign = TFI->getStackAlignment();
89  DA = DAG->getDivergenceAnalysis();
90 
91  // Check whether the function can return without sret-demotion.
94 
95  GetReturnInfo(CC, Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
96  mf.getDataLayout());
98  TLI->CanLowerReturn(CC, *MF, Fn->isVarArg(), Outs, Fn->getContext());
99 
100  // If this personality uses funclets, we need to do a bit more work.
102  EHPersonality Personality = classifyEHPersonality(
103  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
104  if (isFuncletEHPersonality(Personality)) {
105  // Calculate state numbers if we haven't already.
106  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
107  if (Personality == EHPersonality::MSVC_CXX)
108  calculateWinCXXEHStateNumbers(&fn, EHInfo);
109  else if (isAsynchronousEHPersonality(Personality))
110  calculateSEHStateNumbers(&fn, EHInfo);
111  else if (Personality == EHPersonality::CoreCLR)
112  calculateClrEHStateNumbers(&fn, EHInfo);
113 
114  // Map all BB references in the WinEH data to MBBs.
115  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
116  for (WinEHHandlerType &H : TBME.HandlerArray) {
117  if (const AllocaInst *AI = H.CatchObj.Alloca)
118  CatchObjects.insert({AI, {}}).first->second.push_back(
119  &H.CatchObj.FrameIndex);
120  else
121  H.CatchObj.FrameIndex = INT_MAX;
122  }
123  }
124  }
125  if (Personality == EHPersonality::Wasm_CXX) {
126  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
127  calculateWasmEHInfo(&fn, EHInfo);
128  }
129 
130  // Initialize the mapping of values to registers. This is only set up for
131  // instruction values that are used outside of the block that defines
132  // them.
133  for (const BasicBlock &BB : *Fn) {
134  for (const Instruction &I : BB) {
135  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
136  Type *Ty = AI->getAllocatedType();
137  unsigned Align =
139  AI->getAlignment());
140 
141  // Static allocas can be folded into the initial stack frame
142  // adjustment. For targets that don't realign the stack, don't
143  // do this if there is an extra alignment requirement.
144  if (AI->isStaticAlloca() &&
145  (TFI->isStackRealignable() || (Align <= StackAlign))) {
146  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
147  uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
148 
149  TySize *= CUI->getZExtValue(); // Get total allocated size.
150  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
151  int FrameIndex = INT_MAX;
152  auto Iter = CatchObjects.find(AI);
153  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
154  FrameIndex = MF->getFrameInfo().CreateFixedObject(
155  TySize, 0, /*IsImmutable=*/false, /*isAliased=*/true);
156  MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
157  } else {
158  FrameIndex =
159  MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
160  }
161 
163  // Update the catch handler information.
164  if (Iter != CatchObjects.end()) {
165  for (int *CatchObjPtr : Iter->second)
166  *CatchObjPtr = FrameIndex;
167  }
168  } else {
169  // FIXME: Overaligned static allocas should be grouped into
170  // a single dynamic allocation instead of using a separate
171  // stack allocation for each one.
172  if (Align <= StackAlign)
173  Align = 0;
174  // Inform the Frame Information that we have variable-sized objects.
175  MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
176  }
177  }
178 
179  // Look for inline asm that clobbers the SP register.
180  if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
181  ImmutableCallSite CS(&I);
182  if (isa<InlineAsm>(CS.getCalledValue())) {
183  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
185  std::vector<TargetLowering::AsmOperandInfo> Ops =
186  TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
187  for (TargetLowering::AsmOperandInfo &Op : Ops) {
188  if (Op.Type == InlineAsm::isClobber) {
189  // Clobbers don't have SDValue operands, hence SDValue().
190  TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
191  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
192  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
193  Op.ConstraintVT);
194  if (PhysReg.first == SP)
196  }
197  }
198  }
199  }
200 
201  // Look for calls to the @llvm.va_start intrinsic. We can omit some
202  // prologue boilerplate for variadic functions that don't examine their
203  // arguments.
204  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
205  if (II->getIntrinsicID() == Intrinsic::vastart)
206  MF->getFrameInfo().setHasVAStart(true);
207  }
208 
209  // If we have a musttail call in a variadic function, we need to ensure we
210  // forward implicit register parameters.
211  if (const auto *CI = dyn_cast<CallInst>(&I)) {
212  if (CI->isMustTailCall() && Fn->isVarArg())
214  }
215 
216  // Mark values used outside their block as exported, by allocating
217  // a virtual register for them.
219  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
221 
222  // Decide the preferred extend type for a value.
224  }
225  }
226 
227  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
228  // also creates the initial PHI MachineInstrs, though none of the input
229  // operands are populated.
230  for (const BasicBlock &BB : *Fn) {
231  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
232  // are really data, and no instructions can live here.
233  if (BB.isEHPad()) {
234  const Instruction *PadInst = BB.getFirstNonPHI();
235  // If this is a non-landingpad EH pad, mark this function as using
236  // funclets.
237  // FIXME: SEH catchpads do not create EH scope/funclets, so we could avoid
238  // setting this in such cases in order to improve frame layout.
239  if (!isa<LandingPadInst>(PadInst)) {
240  MF->setHasEHScopes(true);
241  MF->setHasEHFunclets(true);
243  }
244  if (isa<CatchSwitchInst>(PadInst)) {
245  assert(&*BB.begin() == PadInst &&
246  "WinEHPrepare failed to remove PHIs from imaginary BBs");
247  continue;
248  }
249  if (isa<FuncletPadInst>(PadInst))
250  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
251  }
252 
254  MBBMap[&BB] = MBB;
255  MF->push_back(MBB);
256 
257  // Transfer the address-taken flag. This is necessary because there could
258  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
259  // the first one should be marked.
260  if (BB.hasAddressTaken())
261  MBB->setHasAddressTaken();
262 
263  // Mark landing pad blocks.
264  if (BB.isEHPad())
265  MBB->setIsEHPad();
266 
267  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
268  // appropriate.
269  for (const PHINode &PN : BB.phis()) {
270  if (PN.use_empty())
271  continue;
272 
273  // Skip empty types
274  if (PN.getType()->isEmptyTy())
275  continue;
276 
277  DebugLoc DL = PN.getDebugLoc();
278  unsigned PHIReg = ValueMap[&PN];
279  assert(PHIReg && "PHI node does not have an assigned virtual register!");
280 
281  SmallVector<EVT, 4> ValueVTs;
282  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
283  for (EVT VT : ValueVTs) {
284  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
286  for (unsigned i = 0; i != NumRegisters; ++i)
287  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
288  PHIReg += NumRegisters;
289  }
290  }
291  }
292 
293  if (isFuncletEHPersonality(Personality)) {
294  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
295 
296  // Map all BB references in the WinEH data to MBBs.
297  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
298  for (WinEHHandlerType &H : TBME.HandlerArray) {
299  if (H.Handler)
300  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
301  }
302  }
303  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
304  if (UME.Cleanup)
305  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
306  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
307  const auto *BB = UME.Handler.get<const BasicBlock *>();
308  UME.Handler = MBBMap[BB];
309  }
310  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
311  const auto *BB = CME.Handler.get<const BasicBlock *>();
312  CME.Handler = MBBMap[BB];
313  }
314  }
315 
316  else if (Personality == EHPersonality::Wasm_CXX) {
317  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
318  // Map all BB references in the WinEH data to MBBs.
320  for (auto &KV : EHInfo.EHPadUnwindMap) {
321  const auto *Src = KV.first.get<const BasicBlock *>();
322  const auto *Dst = KV.second.get<const BasicBlock *>();
323  NewMap[MBBMap[Src]] = MBBMap[Dst];
324  }
325  EHInfo.EHPadUnwindMap = std::move(NewMap);
326  }
327 }
328 
329 /// clear - Clear out all the function-specific state. This returns this
330 /// FunctionLoweringInfo to an empty state, ready to be used for a
331 /// different function.
333  MBBMap.clear();
334  ValueMap.clear();
335  VirtReg2Value.clear();
336  StaticAllocaMap.clear();
337  LiveOutRegInfo.clear();
338  VisitedBBs.clear();
339  ArgDbgValues.clear();
341  ByValArgFrameIndexMap.clear();
342  RegFixups.clear();
345  StatepointSpillMaps.clear();
346  PreferredExtendType.clear();
347 }
348 
349 /// CreateReg - Allocate a single virtual register for the given type.
350 unsigned FunctionLoweringInfo::CreateReg(MVT VT, bool isDivergent) {
352  MF->getSubtarget().getTargetLowering()->getRegClassFor(VT, isDivergent));
353 }
354 
355 /// CreateRegs - Allocate the appropriate number of virtual registers of
356 /// the correctly promoted or expanded types. Assign these registers
357 /// consecutive vreg numbers and return the first assigned number.
358 ///
359 /// In the case that the given value has struct or array type, this function
360 /// will assign registers for each member or element.
361 ///
362 unsigned FunctionLoweringInfo::CreateRegs(Type *Ty, bool isDivergent) {
364 
365  SmallVector<EVT, 4> ValueVTs;
366  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
367 
368  unsigned FirstReg = 0;
369  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
370  EVT ValueVT = ValueVTs[Value];
371  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
372 
373  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
374  for (unsigned i = 0; i != NumRegs; ++i) {
375  unsigned R = CreateReg(RegisterVT, isDivergent);
376  if (!FirstReg) FirstReg = R;
377  }
378  }
379  return FirstReg;
380 }
381 
383  return CreateRegs(V->getType(), DA && !TLI->requiresUniformRegister(*MF, V) &&
384  DA->isDivergent(V));
385 }
386 
387 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
388 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
389 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
390 /// the larger bit width by zero extension. The bit width must be no smaller
391 /// than the LiveOutInfo's existing bit width.
393 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
394  if (!LiveOutRegInfo.inBounds(Reg))
395  return nullptr;
396 
397  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
398  if (!LOI->IsValid)
399  return nullptr;
400 
401  if (BitWidth > LOI->Known.getBitWidth()) {
402  LOI->NumSignBits = 1;
403  LOI->Known = LOI->Known.zext(BitWidth, false /* => any extend */);
404  }
405 
406  return LOI;
407 }
408 
409 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
410 /// register based on the LiveOutInfo of its operands.
412  Type *Ty = PN->getType();
413  if (!Ty->isIntegerTy() || Ty->isVectorTy())
414  return;
415 
416  SmallVector<EVT, 1> ValueVTs;
417  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
418  assert(ValueVTs.size() == 1 &&
419  "PHIs with non-vector integer types should have a single VT.");
420  EVT IntVT = ValueVTs[0];
421 
422  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
423  return;
424  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
425  unsigned BitWidth = IntVT.getSizeInBits();
426 
427  unsigned DestReg = ValueMap[PN];
428  if (!Register::isVirtualRegister(DestReg))
429  return;
430  LiveOutRegInfo.grow(DestReg);
431  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
432 
433  Value *V = PN->getIncomingValue(0);
434  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
435  DestLOI.NumSignBits = 1;
436  DestLOI.Known = KnownBits(BitWidth);
437  return;
438  }
439 
440  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
441  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
442  DestLOI.NumSignBits = Val.getNumSignBits();
443  DestLOI.Known.Zero = ~Val;
444  DestLOI.Known.One = Val;
445  } else {
446  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
447  "CopyToReg node was created.");
448  unsigned SrcReg = ValueMap[V];
449  if (!Register::isVirtualRegister(SrcReg)) {
450  DestLOI.IsValid = false;
451  return;
452  }
453  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
454  if (!SrcLOI) {
455  DestLOI.IsValid = false;
456  return;
457  }
458  DestLOI = *SrcLOI;
459  }
460 
461  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
462  DestLOI.Known.One.getBitWidth() == BitWidth &&
463  "Masks should have the same bit width as the type.");
464 
465  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
466  Value *V = PN->getIncomingValue(i);
467  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
468  DestLOI.NumSignBits = 1;
469  DestLOI.Known = KnownBits(BitWidth);
470  return;
471  }
472 
473  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
474  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
475  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
476  DestLOI.Known.Zero &= ~Val;
477  DestLOI.Known.One &= Val;
478  continue;
479  }
480 
481  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
482  "its CopyToReg node was created.");
483  unsigned SrcReg = ValueMap[V];
484  if (!Register::isVirtualRegister(SrcReg)) {
485  DestLOI.IsValid = false;
486  return;
487  }
488  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
489  if (!SrcLOI) {
490  DestLOI.IsValid = false;
491  return;
492  }
493  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
494  DestLOI.Known.Zero &= SrcLOI->Known.Zero;
495  DestLOI.Known.One &= SrcLOI->Known.One;
496  }
497 }
498 
499 /// setArgumentFrameIndex - Record frame index for the byval
500 /// argument. This overrides previous frame index entry for this argument,
501 /// if any.
503  int FI) {
504  ByValArgFrameIndexMap[A] = FI;
505 }
506 
507 /// getArgumentFrameIndex - Get frame index for the byval argument.
508 /// If the argument does not have any assigned frame index then 0 is
509 /// returned.
511  auto I = ByValArgFrameIndexMap.find(A);
512  if (I != ByValArgFrameIndexMap.end())
513  return I->second;
514  LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
515  return INT_MAX;
516 }
517 
519  const Value *CPI, const TargetRegisterClass *RC) {
521  auto I = CatchPadExceptionPointers.insert({CPI, 0});
522  unsigned &VReg = I.first->second;
523  if (I.second)
524  VReg = MRI.createVirtualRegister(RC);
525  assert(VReg && "null vreg in exception pointer table!");
526  return VReg;
527 }
528 
529 const Value *
531  if (VirtReg2Value.empty()) {
532  SmallVector<EVT, 4> ValueVTs;
533  for (auto &P : ValueMap) {
534  ValueVTs.clear();
536  P.first->getType(), ValueVTs);
537  unsigned Reg = P.second;
538  for (EVT VT : ValueVTs) {
539  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
540  for (unsigned i = 0, e = NumRegisters; i != e; ++i)
541  VirtReg2Value[Reg++] = P.first;
542  }
543  }
544  }
545  return VirtReg2Value.lookup(Vreg);
546 }
void clear()
Definition: ValueMap.h:146
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:176
unsigned CreateReg(MVT VT, bool isDivergent=false)
CreateReg - Allocate a single virtual register for the given type.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:82
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:76
bool isDivergent(const Value *V) const
This class represents an incoming formal argument to a Function.
Definition: Argument.h:29
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:42
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
Register createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:97
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void setHasEHFunclets(bool V)
unsigned Reg
virtual const TargetLowering * getTargetLowering() const
const AllocaInst * Alloca
Definition: WinEHFuncInfo.h:65
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:743
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:930
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:230
DenseMap< const Value *, unsigned > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
bool CanLowerReturn
CanLowerReturn - true iff the function&#39;s return value can be lowered to registers.
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:39
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:194
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:38
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1517
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:130
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:57
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:195
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
void clear()
clear - Removes all bits from the bitvector. Does not change capacity.
Definition: BitVector.h:366
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:369
const HexagonInstrInfo * TII
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:104
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:197
int CreateVariableSizedObject(Align Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created. ...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:291
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:246
void setHasMustTailInVarArgFunc(bool B)
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
virtual const TargetRegisterClass * getRegClassFor(MVT VT, bool isDivergent=false) const
Return the register class that should be used for the specified value type.
DenseMap< BBOrMBB, BBOrMBB > EHPadUnwindMap
This contains information for each constraint that we are lowering.
DenseSet< unsigned > RegsWithFixups
const LegacyDivergenceAnalysis * DA
static ISD::NodeType getPreferredExtendForValue(const Value *V)
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:223
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:737
virtual const TargetInstrInfo * getInstrInfo() const
void setHasOpaqueSPAdjustment(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:119
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
TargetInstrInfo - Interface to description of machine instruction set.
void clear()
clear - Clear out all the function-specific state.
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:46
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void setHasEHScopes(bool V)
#define P(N)
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:168
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:98
DenseMap< unsigned, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:148
unsigned const MachineRegisterInfo * MRI
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:57
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
KnownBits zext(unsigned BitWidth, bool ExtendedBitsAreKnownZero) const
Extends the underlying known Zero and One bits.
Definition: KnownBits.h:120
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
#define H(x, y, z)
Definition: MD5.cpp:57
TypeSize getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:486
const LegacyDivergenceAnalysis * getDivergenceAnalysis() const
Definition: SelectionDAG.h:423
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:765
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
constexpr double e
Definition: MathExtras.h:57
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
DenseMap< const Instruction *, StatepointSpillMap > StatepointSpillMaps
Maps gc.statepoint instructions to their corresponding StatepointSpillMap instances.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:205
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Extended Value Type.
Definition: ValueTypes.h:33
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI&#39;s destination register based on the LiveOutI...
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:40
MachineBasicBlock * MBB
MBB - The current block.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:69
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
unsigned first
void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it&#39;s handlers to build WinEHFuncInfo, which describes the state number...
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:95
See the file comment.
Definition: ValueMap.h:85
union llvm::WinEHHandlerType::@203 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:390
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:212
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:221
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
virtual bool requiresUniformRegister(MachineFunction &MF, const Value *) const
Allows target to decide about the register class of the specific value that is live outside the defin...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned getNumIncomingValues() const
Return the number of incoming edges.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:96
Class for arbitrary precision integers.
Definition: APInt.h:69
iterator_range< user_iterator > users()
Definition: Value.h:420
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:510
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const WasmEHFuncInfo * getWasmEHFuncInfo() const
getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling...
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
unsigned CreateRegs(const Value *V)
MachineRegisterInfo * RegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:44
Establish a view to a call site for examination.
Definition: CallSite.h:906
#define I(x, y, z)
Definition: MD5.cpp:58
virtual const TargetFrameLowering * getFrameLowering() const
BitVector DescribedArgs
Bitvector with a bit set if corresponding argument is described in ArgDbgValues.
const Value * getValueFromVirtualReg(unsigned Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo)
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:152
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
Definition: APInt.h:1628
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
LLVM Value Representation.
Definition: Value.h:74
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1465
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:69
void push_back(MachineBasicBlock *MBB)
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
const TargetLowering * TLI
Conversion operators.
Definition: ISDOpcodes.h:504
#define LLVM_DEBUG(X)
Definition: Debug.h:122
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool use_empty() const
Definition: Value.h:343
This file describes how to lower LLVM code to machine code.
const BasicBlock * getParent() const
Definition: Instruction.h:66
an instruction to allocate memory on the stack
Definition: Instructions.h:59
unsigned InitializeRegForValue(const Value *V)