LLVM  9.0.0svn
GCNRegPressure.h
Go to the documentation of this file.
1 //===- GCNRegPressure.h -----------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
10 #define LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
11 
12 #include "AMDGPUSubtarget.h"
13 #include "llvm/ADT/DenseMap.h"
18 #include "llvm/MC/LaneBitmask.h"
19 #include "llvm/Support/Debug.h"
20 #include <algorithm>
21 #include <limits>
22 
23 namespace llvm {
24 
25 class MachineRegisterInfo;
26 class raw_ostream;
27 
29  enum RegKind {
35  };
36 
38  clear();
39  }
40 
41  bool empty() const { return getSGPRNum() == 0 && getVGPRNum() == 0; }
42 
43  void clear() { std::fill(&Value[0], &Value[TOTAL_KINDS], 0); }
44 
45  unsigned getSGPRNum() const { return Value[SGPR32]; }
46  unsigned getVGPRNum() const { return Value[VGPR32]; }
47 
48  unsigned getVGPRTuplesWeight() const { return Value[VGPR_TUPLE]; }
49  unsigned getSGPRTuplesWeight() const { return Value[SGPR_TUPLE]; }
50 
51  unsigned getOccupancy(const GCNSubtarget &ST) const {
52  return std::min(ST.getOccupancyWithNumSGPRs(getSGPRNum()),
54  }
55 
56  void inc(unsigned Reg,
57  LaneBitmask PrevMask,
58  LaneBitmask NewMask,
59  const MachineRegisterInfo &MRI);
60 
61  bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure& O) const {
62  return getOccupancy(ST) > O.getOccupancy(ST);
63  }
64 
65  bool less(const GCNSubtarget &ST, const GCNRegPressure& O,
66  unsigned MaxOccupancy = std::numeric_limits<unsigned>::max()) const;
67 
68  bool operator==(const GCNRegPressure &O) const {
69  return std::equal(&Value[0], &Value[TOTAL_KINDS], O.Value);
70  }
71 
72  bool operator!=(const GCNRegPressure &O) const {
73  return !(*this == O);
74  }
75 
76  void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
77  void dump() const { print(dbgs()); }
78 
79 private:
80  unsigned Value[TOTAL_KINDS];
81 
82  static unsigned getRegKind(unsigned Reg, const MachineRegisterInfo &MRI);
83 
84  friend GCNRegPressure max(const GCNRegPressure &P1,
85  const GCNRegPressure &P2);
86 };
87 
88 inline GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2) {
89  GCNRegPressure Res;
90  for (unsigned I = 0; I < GCNRegPressure::TOTAL_KINDS; ++I)
91  Res.Value[I] = std::max(P1.Value[I], P2.Value[I]);
92  return Res;
93 }
94 
95 class GCNRPTracker {
96 public:
98 
99 protected:
103  const MachineInstr *LastTrackedMI = nullptr;
104  mutable const MachineRegisterInfo *MRI = nullptr;
105 
106  GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {}
107 
108  void reset(const MachineInstr &MI, const LiveRegSet *LiveRegsCopy,
109  bool After);
110 
111 public:
112  // live regs for the current state
113  const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; }
114  const MachineInstr *getLastTrackedMI() const { return LastTrackedMI; }
115 
116  void clearMaxPressure() { MaxPressure.clear(); }
117 
118  // returns MaxPressure, resetting it
119  decltype(MaxPressure) moveMaxPressure() {
120  auto Res = MaxPressure;
121  MaxPressure.clear();
122  return Res;
123  }
124 
125  decltype(LiveRegs) moveLiveRegs() {
126  return std::move(LiveRegs);
127  }
128 
129  static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
130  const MachineRegisterInfo &MRI);
131 };
132 
134 public:
136 
137  // reset tracker to the point just below MI
138  // filling live regs upon this point using LIS
139  void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
140 
141  // move to the state just above the MI
142  void recede(const MachineInstr &MI);
143 
144  // checks whether the tracker's state after receding MI corresponds
145  // to reported by LIS
146  bool isValid() const;
147 };
148 
150  // Last position of reset or advanceBeforeNext
152 
154 
155 public:
157 
158  const MachineBasicBlock::const_iterator getNext() const { return NextMI; }
159 
160  // Reset tracker to the point before the MI
161  // filling live regs upon this point using LIS.
162  // Returns false if block is empty except debug values.
163  bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
164 
165  // Move to the state right before the next MI. Returns false if reached
166  // end of the block.
167  bool advanceBeforeNext();
168 
169  // Move to the state at the MI, advanceBeforeNext has to be called first.
170  void advanceToNext();
171 
172  // Move to the state at the next MI. Returns false if reached end of block.
173  bool advance();
174 
175  // Advance instructions until before End.
176  bool advance(MachineBasicBlock::const_iterator End);
177 
178  // Reset to Begin and advance to End.
179  bool advance(MachineBasicBlock::const_iterator Begin,
181  const LiveRegSet *LiveRegsCopy = nullptr);
182 };
183 
185  SlotIndex SI,
186  const LiveIntervals &LIS,
187  const MachineRegisterInfo &MRI);
188 
190  const LiveIntervals &LIS,
191  const MachineRegisterInfo &MRI);
192 
194  const LiveIntervals &LIS) {
195  return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS,
196  MI.getParent()->getParent()->getRegInfo());
197 }
198 
200  const LiveIntervals &LIS) {
201  return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS,
202  MI.getParent()->getParent()->getRegInfo());
203 }
204 
205 template <typename Range>
207  Range &&LiveRegs) {
208  GCNRegPressure Res;
209  for (const auto &RM : LiveRegs)
210  Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI);
211  return Res;
212 }
213 
214 void printLivesAt(SlotIndex SI,
215  const LiveIntervals &LIS,
216  const MachineRegisterInfo &MRI);
217 
218 } // end namespace llvm
219 
220 #endif // LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
A common definition of LaneBitmask for use in TableGen and CodeGen.
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
AMDGPU specific subclass of TargetSubtarget.
SlotIndex getBaseIndex() const
Returns the base index for associated with this index.
Definition: SlotIndexes.h:241
This class represents lattice values for constants.
Definition: AllocatorList.h:23
decltype(MaxPressure) moveMaxPressure()
unsigned getSGPRTuplesWeight() const
GCNRPTracker(const LiveIntervals &LIS_)
GCNRPTracker::LiveRegSet getLiveRegs(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
unsigned Reg
friend GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
const LiveIntervals & LIS
decltype(LiveRegs) moveLiveRegs()
bool operator!=(const GCNRegPressure &O) const
decltype(LiveRegs) const & getLiveRegs() const
SlotIndex getDeadSlot() const
Returns the dead def kill slot for the current instruction.
Definition: SlotIndexes.h:259
unsigned getOccupancy(const GCNSubtarget &ST) const
static constexpr LaneBitmask getNone()
Definition: LaneBitmask.h:82
void inc(unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask, const MachineRegisterInfo &MRI)
unsigned getVGPRTuplesWeight() const
GCNRPTracker::LiveRegSet getLiveRegsBefore(const MachineInstr &MI, const LiveIntervals &LIS)
const MachineBasicBlock::const_iterator getNext() const
bool less(const GCNSubtarget &ST, const GCNRegPressure &O, unsigned MaxOccupancy=std::numeric_limits< unsigned >::max()) const
unsigned const MachineRegisterInfo * MRI
const MachineInstr * getLastTrackedMI() const
unsigned getSGPRNum() const
GCNRPTracker::LiveRegSet getLiveRegsAfter(const MachineInstr &MI, const LiveIntervals &LIS)
GCNUpwardRPTracker(const LiveIntervals &LIS_)
void printLivesAt(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
unsigned getVGPRNum() const
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure &O) const
unsigned getOccupancyWithNumSGPRs(unsigned SGPRs) const
Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:253
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, Range &&LiveRegs)
Representation of each machine instruction.
Definition: MachineInstr.h:63
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
#define I(x, y, z)
Definition: MD5.cpp:58
LaneBitmask getLiveLaneMask(unsigned Reg, SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
bool operator==(const GCNRegPressure &O) const
void print(raw_ostream &OS, const GCNSubtarget *ST=nullptr) const
LLVM Value Representation.
Definition: Value.h:72
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
IRTranslator LLVM IR MI
GCNRegPressure MaxPressure
GCNDownwardRPTracker(const LiveIntervals &LIS_)
unsigned getOccupancyWithNumVGPRs(unsigned VGPRs) const
Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:83