LLVM  10.0.0svn
LinkAllCodegenComponents.h
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1 //===- llvm/Codegen/LinkAllCodegenComponents.h ------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This header file pulls in all codegen related passes for tools like lli and
10 // llc that need this functionality.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_LINKALLCODEGENCOMPONENTS_H
15 #define LLVM_CODEGEN_LINKALLCODEGENCOMPONENTS_H
16 
18 #include "llvm/CodeGen/Passes.h"
21 #include <cstdlib>
22 
23 namespace {
24  struct ForceCodegenLinking {
25  ForceCodegenLinking() {
26  // We must reference the passes in such a way that compilers will not
27  // delete it all as dead code, even with whole program optimization,
28  // yet is effectively a NO-OP. As the compiler isn't smart enough
29  // to know that getenv() never returns -1, this will do the job.
30  if (std::getenv("bar") != (char*) -1)
31  return;
32 
37 
39 
40  (void) llvm::createBURRListDAGScheduler(nullptr,
49 
50  }
51  } ForceCodegenLinking; // Force link by creating a global definition.
52 }
53 
54 #endif
ScheduleDAGSDNodes * createHybridListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level)
createHybridListDAGScheduler - This creates a bottom up register pressure aware list scheduler that m...
ScheduleDAGSDNodes * createBURRListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel)
createBURRListDAGScheduler - This creates a bottom up register usage reduction list scheduler...
ScheduleDAGSDNodes * createVLIWDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel)
createVLIWDAGScheduler - Scheduler for VLIW targets.
ScheduleDAGSDNodes * createDefaultScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel)
createDefaultScheduler - This creates an instruction scheduler appropriate for the target...
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
ScheduleDAGSDNodes * createSourceListDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel)
createBURRListDAGScheduler - This creates a bottom up list scheduler that schedules nodes in source c...
void linkAllBuiltinGCs()
FIXME: Collector instances are not useful on their own.
Definition: BuiltinGCs.cpp:130
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
ScheduleDAGSDNodes * createFastDAGScheduler(SelectionDAGISel *IS, CodeGenOpt::Level OptLevel)
createFastDAGScheduler - This creates a "fast" scheduler.