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LiveVariables.h
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1 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the LiveVariables analysis pass. For each machine
10 // instruction in the function, this pass calculates the set of registers that
11 // are immediately dead after the instruction (i.e., the instruction calculates
12 // the value, but it is never used) and the set of registers that are used by
13 // the instruction, but are never used after the instruction (i.e., they are
14 // killed).
15 //
16 // This class computes live variables using a sparse implementation based on
17 // the machine code SSA form. This class computes live variable information for
18 // each virtual and _register allocatable_ physical register in a function. It
19 // uses the dominance properties of SSA form to efficiently compute live
20 // variables for virtual registers, and assumes that physical registers are only
21 // live within a single basic block (allowing it to do a single local analysis
22 // to resolve physical register lifetimes in each basic block). If a physical
23 // register is not register allocatable, it is not tracked. This is useful for
24 // things like the stack pointer and condition codes.
25 //
26 //===----------------------------------------------------------------------===//
27 
28 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
29 #define LLVM_CODEGEN_LIVEVARIABLES_H
30 
31 #include "llvm/ADT/DenseMap.h"
32 #include "llvm/ADT/IndexedMap.h"
33 #include "llvm/ADT/SmallSet.h"
34 #include "llvm/ADT/SmallVector.h"
39 
40 namespace llvm {
41 
42 class MachineBasicBlock;
43 class MachineRegisterInfo;
44 
46 public:
47  static char ID; // Pass identification, replacement for typeid
50  }
51 
52  /// VarInfo - This represents the regions where a virtual register is live in
53  /// the program. We represent this with three different pieces of
54  /// information: the set of blocks in which the instruction is live
55  /// throughout, the set of blocks in which the instruction is actually used,
56  /// and the set of non-phi instructions that are the last users of the value.
57  ///
58  /// In the common case where a value is defined and killed in the same block,
59  /// There is one killing instruction, and AliveBlocks is empty.
60  ///
61  /// Otherwise, the value is live out of the block. If the value is live
62  /// throughout any blocks, these blocks are listed in AliveBlocks. Blocks
63  /// where the liveness range ends are not included in AliveBlocks, instead
64  /// being captured by the Kills set. In these blocks, the value is live into
65  /// the block (unless the value is defined and killed in the same block) and
66  /// lives until the specified instruction. Note that there cannot ever be a
67  /// value whose Kills set contains two instructions from the same basic block.
68  ///
69  /// PHI nodes complicate things a bit. If a PHI node is the last user of a
70  /// value in one of its predecessor blocks, it is not listed in the kills set,
71  /// but does include the predecessor block in the AliveBlocks set (unless that
72  /// block also defines the value). This leads to the (perfectly sensical)
73  /// situation where a value is defined in a block, and the last use is a phi
74  /// node in the successor. In this case, AliveBlocks is empty (the value is
75  /// not live across any blocks) and Kills is empty (phi nodes are not
76  /// included). This is sensical because the value must be live to the end of
77  /// the block, but is not live in any successor blocks.
78  struct VarInfo {
79  /// AliveBlocks - Set of blocks in which this value is alive completely
80  /// through. This is a bit set which uses the basic block number as an
81  /// index.
82  ///
84 
85  /// Kills - List of MachineInstruction's which are the last use of this
86  /// virtual register (kill it) in their basic block.
87  ///
88  std::vector<MachineInstr*> Kills;
89 
90  /// removeKill - Delete a kill corresponding to the specified
91  /// machine instruction. Returns true if there was a kill
92  /// corresponding to this instruction, false otherwise.
94  std::vector<MachineInstr *>::iterator I = find(Kills, &MI);
95  if (I == Kills.end())
96  return false;
97  Kills.erase(I);
98  return true;
99  }
100 
101  /// findKill - Find a kill instruction in MBB. Return NULL if none is found.
102  MachineInstr *findKill(const MachineBasicBlock *MBB) const;
103 
104  /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
105  /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
106  /// MBB, it is not considered live in.
107  bool isLiveIn(const MachineBasicBlock &MBB,
108  unsigned Reg,
110 
111  void dump() const;
112  };
113 
114 private:
115  /// VirtRegInfo - This list is a mapping from virtual register number to
116  /// variable information.
117  ///
119 
120  /// PHIJoins - list of virtual registers that are PHI joins. These registers
121  /// may have multiple definitions, and they require special handling when
122  /// building live intervals.
123  SparseBitVector<> PHIJoins;
124 
125 private: // Intermediate data structures
126  MachineFunction *MF;
127 
129 
130  const TargetRegisterInfo *TRI;
131 
132  // PhysRegInfo - Keep track of which instruction was the last def of a
133  // physical register. This is a purely local property, because all physical
134  // register references are presumed dead across basic blocks.
135  std::vector<MachineInstr *> PhysRegDef;
136 
137  // PhysRegInfo - Keep track of which instruction was the last use of a
138  // physical register. This is a purely local property, because all physical
139  // register references are presumed dead across basic blocks.
140  std::vector<MachineInstr *> PhysRegUse;
141 
142  std::vector<SmallVector<unsigned, 4>> PHIVarInfo;
143 
144  // DistanceMap - Keep track the distance of a MI from the start of the
145  // current basic block.
147 
148  /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
149  /// uses. Pay special attention to the sub-register uses which may come below
150  /// the last use of the whole register.
151  bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
152 
153  /// HandleRegMask - Call HandlePhysRegKill for all registers clobbered by Mask.
154  void HandleRegMask(const MachineOperand&);
155 
156  void HandlePhysRegUse(unsigned Reg, MachineInstr &MI);
157  void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
159  void UpdatePhysRegDefs(MachineInstr &MI, SmallVectorImpl<unsigned> &Defs);
160 
161  /// FindLastRefOrPartRef - Return the last reference or partial reference of
162  /// the specified register.
163  MachineInstr *FindLastRefOrPartRef(unsigned Reg);
164 
165  /// FindLastPartialDef - Return the last partial def of the specified
166  /// register. Also returns the sub-registers that're defined by the
167  /// instruction.
168  MachineInstr *FindLastPartialDef(unsigned Reg,
169  SmallSet<unsigned,4> &PartDefRegs);
170 
171  /// analyzePHINodes - Gather information about the PHI nodes in here. In
172  /// particular, we want to map the variable information of a virtual
173  /// register which is used in a PHI node. We map that to the BB the vreg
174  /// is coming from.
175  void analyzePHINodes(const MachineFunction& Fn);
176 
177  void runOnInstr(MachineInstr &MI, SmallVectorImpl<unsigned> &Defs);
178 
179  void runOnBlock(MachineBasicBlock *MBB, unsigned NumRegs);
180 public:
181 
182  bool runOnMachineFunction(MachineFunction &MF) override;
183 
184  /// RegisterDefIsDead - Return true if the specified instruction defines the
185  /// specified register, but that definition is dead.
186  bool RegisterDefIsDead(MachineInstr &MI, unsigned Reg) const;
187 
188  //===--------------------------------------------------------------------===//
189  // API to update live variable information
190 
191  /// replaceKillInstruction - Update register kill info by replacing a kill
192  /// instruction with a new one.
193  void replaceKillInstruction(unsigned Reg, MachineInstr &OldMI,
194  MachineInstr &NewMI);
195 
196  /// addVirtualRegisterKilled - Add information about the fact that the
197  /// specified register is killed after being used by the specified
198  /// instruction. If AddIfNotFound is true, add a implicit operand if it's
199  /// not found.
200  void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr &MI,
201  bool AddIfNotFound = false) {
202  if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
203  getVarInfo(IncomingReg).Kills.push_back(&MI);
204  }
205 
206  /// removeVirtualRegisterKilled - Remove the specified kill of the virtual
207  /// register from the live variable information. Returns true if the
208  /// variable was marked as killed by the specified instruction,
209  /// false otherwise.
210  bool removeVirtualRegisterKilled(unsigned reg, MachineInstr &MI) {
211  if (!getVarInfo(reg).removeKill(MI))
212  return false;
213 
214  bool Removed = false;
215  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
216  MachineOperand &MO = MI.getOperand(i);
217  if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
218  MO.setIsKill(false);
219  Removed = true;
220  break;
221  }
222  }
223 
224  assert(Removed && "Register is not used by this instruction!");
225  (void)Removed;
226  return true;
227  }
228 
229  /// removeVirtualRegistersKilled - Remove all killed info for the specified
230  /// instruction.
232 
233  /// addVirtualRegisterDead - Add information about the fact that the specified
234  /// register is dead after being used by the specified instruction. If
235  /// AddIfNotFound is true, add a implicit operand if it's not found.
236  void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr &MI,
237  bool AddIfNotFound = false) {
238  if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound))
239  getVarInfo(IncomingReg).Kills.push_back(&MI);
240  }
241 
242  /// removeVirtualRegisterDead - Remove the specified kill of the virtual
243  /// register from the live variable information. Returns true if the
244  /// variable was marked dead at the specified instruction, false
245  /// otherwise.
246  bool removeVirtualRegisterDead(unsigned reg, MachineInstr &MI) {
247  if (!getVarInfo(reg).removeKill(MI))
248  return false;
249 
250  bool Removed = false;
251  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
252  MachineOperand &MO = MI.getOperand(i);
253  if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
254  MO.setIsDead(false);
255  Removed = true;
256  break;
257  }
258  }
259  assert(Removed && "Register is not defined by this instruction!");
260  (void)Removed;
261  return true;
262  }
263 
264  void getAnalysisUsage(AnalysisUsage &AU) const override;
265 
266  void releaseMemory() override {
267  VirtRegInfo.clear();
268  }
269 
270  /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
271  /// register.
272  VarInfo &getVarInfo(unsigned RegIdx);
273 
274  void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
275  MachineBasicBlock *BB);
276  void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
277  MachineBasicBlock *BB,
278  std::vector<MachineBasicBlock*> &WorkList);
279  void HandleVirtRegDef(unsigned reg, MachineInstr &MI);
280  void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MachineInstr &MI);
281 
282  bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) {
283  return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
284  }
285 
286  /// isLiveOut - Determine if Reg is live out from MBB, when not considering
287  /// PHI nodes. This means that Reg is either killed by a successor block or
288  /// passed through one.
289  bool isLiveOut(unsigned Reg, const MachineBasicBlock &MBB);
290 
291  /// addNewBlock - Add a new basic block BB between DomBB and SuccBB. All
292  /// variables that are live out of DomBB and live into SuccBB will be marked
293  /// as passing live through BB. This method assumes that the machine code is
294  /// still in SSA form.
296  MachineBasicBlock *DomBB,
297  MachineBasicBlock *SuccBB);
298 
299  /// isPHIJoin - Return true if Reg is a phi join register.
300  bool isPHIJoin(unsigned Reg) { return PHIJoins.test(Reg); }
301 
302  /// setPHIJoin - Mark Reg as a phi join register.
303  void setPHIJoin(unsigned Reg) { PHIJoins.set(Reg); }
304 };
305 
306 } // End llvm namespace
307 
308 #endif
bool removeVirtualRegisterKilled(unsigned reg, MachineInstr &MI)
removeVirtualRegisterKilled - Remove the specified kill of the virtual register from the live variabl...
bool RegisterDefIsDead(MachineInstr &MI, unsigned Reg) const
RegisterDefIsDead - Return true if the specified instruction defines the specified register...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void set(unsigned Idx)
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
bool isLiveOut(unsigned Reg, const MachineBasicBlock &MBB)
isLiveOut - Determine if Reg is live out from MBB, when not considering PHI nodes.
unsigned Reg
bool addRegisterDead(Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MachineInstr &MI)
VarInfo - This represents the regions where a virtual register is live in the program.
Definition: LiveVariables.h:78
unsigned const TargetRegisterInfo * TRI
void setIsDead(bool Val=true)
bool removeVirtualRegisterDead(unsigned reg, MachineInstr &MI)
removeVirtualRegisterDead - Remove the specified kill of the virtual register from the live variable ...
MachineInstr * findKill(const MachineBasicBlock *MBB) const
findKill - Find a kill instruction in MBB. Return NULL if none is found.
void initializeLiveVariablesPass(PassRegistry &)
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
Definition: LiveVariables.h:93
bool test(unsigned Idx) const
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:414
SparseBitVector AliveBlocks
AliveBlocks - Set of blocks in which this value is alive completely through.
Definition: LiveVariables.h:83
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
bool addRegisterKilled(Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
void setPHIJoin(unsigned Reg)
setPHIJoin - Mark Reg as a phi join register.
unsigned const MachineRegisterInfo * MRI
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:134
Represent the analysis usage information of a pass.
bool isPHIJoin(unsigned Reg)
isPHIJoin - Return true if Reg is a phi join register.
VarInfo & getVarInfo(unsigned RegIdx)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
auto find(R &&Range, const T &Val) -> decltype(adl_begin(Range))
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1198
void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *DefBlock, MachineBasicBlock *BB)
void setIsKill(bool Val=true)
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction&#39;s which are the last use of this virtual register (kill it) in the...
Definition: LiveVariables.h:88
void replaceKillInstruction(unsigned Reg, MachineInstr &OldMI, MachineInstr &NewMI)
replaceKillInstruction - Update register kill info by replacing a kill instruction with a new one...
void HandleVirtRegDef(unsigned reg, MachineInstr &MI)
bool isLiveIn(const MachineBasicBlock &MBB, unsigned Reg, MachineRegisterInfo &MRI)
isLiveIn - Is Reg live in to MBB? This means that Reg is live through MBB, or it is killed in MBB...
MachineOperand class - Representation of each machine instruction operand.
void removeVirtualRegistersKilled(MachineInstr &MI)
removeVirtualRegistersKilled - Remove all killed info for the specified instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr &MI, bool AddIfNotFound=false)
addVirtualRegisterDead - Add information about the fact that the specified register is dead after bei...
#define I(x, y, z)
Definition: MD5.cpp:58
bool isReg() const
isReg - Tests if this is a MO_Register operand.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
IRTranslator LLVM IR MI
Register getReg() const
getReg - Returns the register number.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB)
void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr &MI, bool AddIfNotFound=false)
addVirtualRegisterKilled - Add information about the fact that the specified register is killed after...