LLVM  9.0.0svn
MIRPrinter.cpp
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1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the class that prints out the LLVM IR and machine
10 // functions using the MIR serialization format.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/None.h"
17 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/ADT/SmallPtrSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringRef.h"
22 #include "llvm/ADT/Twine.h"
38 #include "llvm/IR/BasicBlock.h"
39 #include "llvm/IR/Constants.h"
40 #include "llvm/IR/DebugInfo.h"
41 #include "llvm/IR/DebugLoc.h"
42 #include "llvm/IR/Function.h"
43 #include "llvm/IR/GlobalValue.h"
45 #include "llvm/IR/InstrTypes.h"
46 #include "llvm/IR/Instructions.h"
47 #include "llvm/IR/Intrinsics.h"
48 #include "llvm/IR/Module.h"
50 #include "llvm/IR/Value.h"
51 #include "llvm/MC/LaneBitmask.h"
52 #include "llvm/MC/MCContext.h"
53 #include "llvm/MC/MCDwarf.h"
54 #include "llvm/MC/MCSymbol.h"
57 #include "llvm/Support/Casting.h"
60 #include "llvm/Support/Format.h"
66 #include <algorithm>
67 #include <cassert>
68 #include <cinttypes>
69 #include <cstdint>
70 #include <iterator>
71 #include <string>
72 #include <utility>
73 #include <vector>
74 
75 using namespace llvm;
76 
78  "simplify-mir", cl::Hidden,
79  cl::desc("Leave out unnecessary information when printing MIR"));
80 
81 namespace {
82 
83 /// This structure describes how to print out stack object references.
84 struct FrameIndexOperand {
85  std::string Name;
86  unsigned ID;
87  bool IsFixed;
88 
89  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
90  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
91 
92  /// Return an ordinary stack object reference.
93  static FrameIndexOperand create(StringRef Name, unsigned ID) {
94  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
95  }
96 
97  /// Return a fixed stack object reference.
98  static FrameIndexOperand createFixed(unsigned ID) {
99  return FrameIndexOperand("", ID, /*IsFixed=*/true);
100  }
101 };
102 
103 } // end anonymous namespace
104 
105 namespace llvm {
106 
107 /// This class prints out the machine functions using the MIR serialization
108 /// format.
109 class MIRPrinter {
110  raw_ostream &OS;
111  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
112  /// Maps from stack object indices to operand indices which will be used when
113  /// printing frame index machine operands.
114  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
115 
116 public:
117  MIRPrinter(raw_ostream &OS) : OS(OS) {}
118 
119  void print(const MachineFunction &MF);
120 
121  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
122  const TargetRegisterInfo *TRI);
123  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
124  const MachineFrameInfo &MFI);
125  void convert(yaml::MachineFunction &MF,
127  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
128  const MachineJumpTableInfo &JTI);
129  void convertStackObjects(yaml::MachineFunction &YMF,
130  const MachineFunction &MF, ModuleSlotTracker &MST);
131 
132 private:
133  void initRegisterMaskIds(const MachineFunction &MF);
134 };
135 
136 /// This class prints out the machine instructions using the MIR serialization
137 /// format.
138 class MIPrinter {
139  raw_ostream &OS;
140  ModuleSlotTracker &MST;
141  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
142  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
143  /// Synchronization scope names registered with LLVMContext.
145 
146  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
147  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
148 
149 public:
151  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
152  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
153  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
154  StackObjectOperandMapping(StackObjectOperandMapping) {}
155 
156  void print(const MachineBasicBlock &MBB);
157 
158  void print(const MachineInstr &MI);
159  void printStackObjectReference(int FrameIndex);
160  void print(const MachineInstr &MI, unsigned OpIdx,
161  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
162  LLT TypeToPrint, bool PrintDef = true);
163 };
164 
165 } // end namespace llvm
166 
167 namespace llvm {
168 namespace yaml {
169 
170 /// This struct serializes the LLVM IR module.
171 template <> struct BlockScalarTraits<Module> {
172  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
173  Mod.print(OS, nullptr);
174  }
175 
176  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
177  llvm_unreachable("LLVM Module is supposed to be parsed separately");
178  return "";
179  }
180 };
181 
182 } // end namespace yaml
183 } // end namespace llvm
184 
185 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
186  const TargetRegisterInfo *TRI) {
187  raw_string_ostream OS(Dest.Value);
188  OS << printReg(Reg, TRI);
189 }
190 
192  initRegisterMaskIds(MF);
193 
194  yaml::MachineFunction YamlMF;
195  YamlMF.Name = MF.getName();
196  YamlMF.Alignment = MF.getAlignment();
198  YamlMF.HasWinCFI = MF.hasWinCFI();
199 
200  YamlMF.Legalized = MF.getProperties().hasProperty(
204  YamlMF.Selected = MF.getProperties().hasProperty(
206  YamlMF.FailedISel = MF.getProperties().hasProperty(
208 
209  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
212  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
213  convertStackObjects(YamlMF, MF, MST);
214  if (const auto *ConstantPool = MF.getConstantPool())
215  convert(YamlMF, *ConstantPool);
216  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
217  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
218 
219  const TargetMachine &TM = MF.getTarget();
220  YamlMF.MachineFuncInfo =
221  std::unique_ptr<yaml::MachineFunctionInfo>(TM.convertFuncInfoToYAML(MF));
222 
223  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
224  bool IsNewlineNeeded = false;
225  for (const auto &MBB : MF) {
226  if (IsNewlineNeeded)
227  StrOS << "\n";
228  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
229  .print(MBB);
230  IsNewlineNeeded = true;
231  }
232  StrOS.flush();
233  yaml::Output Out(OS);
234  if (!SimplifyMIR)
235  Out.setWriteDefaultValues(true);
236  Out << YamlMF;
237 }
238 
239 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
240  const TargetRegisterInfo *TRI) {
241  assert(RegMask && "Can't print an empty register mask");
242  OS << StringRef("CustomRegMask(");
243 
244  bool IsRegInRegMaskFound = false;
245  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
246  // Check whether the register is asserted in regmask.
247  if (RegMask[I / 32] & (1u << (I % 32))) {
248  if (IsRegInRegMaskFound)
249  OS << ',';
250  OS << printReg(I, TRI);
251  IsRegInRegMaskFound = true;
252  }
253  }
254 
255  OS << ')';
256 }
257 
258 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
259  const MachineRegisterInfo &RegInfo,
260  const TargetRegisterInfo *TRI) {
261  raw_string_ostream OS(Dest.Value);
262  OS << printRegClassOrBank(Reg, RegInfo, TRI);
263 }
264 
265 template <typename T>
266 static void
268  T &Object, ModuleSlotTracker &MST) {
269  std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
270  &Object.DebugExpr.Value,
271  &Object.DebugLoc.Value}};
272  std::array<const Metadata *, 3> Metas{{DebugVar.Var,
273  DebugVar.Expr,
274  DebugVar.Loc}};
275  for (unsigned i = 0; i < 3; ++i) {
276  raw_string_ostream StrOS(*Outputs[i]);
277  Metas[i]->printAsOperand(StrOS, MST);
278  }
279 }
280 
282  const MachineRegisterInfo &RegInfo,
283  const TargetRegisterInfo *TRI) {
284  MF.TracksRegLiveness = RegInfo.tracksLiveness();
285 
286  // Print the virtual register definitions.
287  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
290  VReg.ID = I;
291  if (RegInfo.getVRegName(Reg) != "")
292  continue;
293  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
294  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
295  if (PreferredReg)
296  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
297  MF.VirtualRegisters.push_back(VReg);
298  }
299 
300  // Print the live ins.
301  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
303  printRegMIR(LI.first, LiveIn.Register, TRI);
304  if (LI.second)
305  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
306  MF.LiveIns.push_back(LiveIn);
307  }
308 
309  // Prints the callee saved registers.
310  if (RegInfo.isUpdatedCSRsInitialized()) {
311  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
312  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
313  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
315  printRegMIR(*I, Reg, TRI);
316  CalleeSavedRegisters.push_back(Reg);
317  }
318  MF.CalleeSavedRegisters = CalleeSavedRegisters;
319  }
320 }
321 
323  yaml::MachineFrameInfo &YamlMFI,
324  const MachineFrameInfo &MFI) {
327  YamlMFI.HasStackMap = MFI.hasStackMap();
328  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
329  YamlMFI.StackSize = MFI.getStackSize();
330  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
331  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
332  YamlMFI.AdjustsStack = MFI.adjustsStack();
333  YamlMFI.HasCalls = MFI.hasCalls();
335  ? MFI.getMaxCallFrameSize() : ~0u;
339  YamlMFI.HasVAStart = MFI.hasVAStart();
341  YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
342  if (MFI.getSavePoint()) {
343  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
344  StrOS << printMBBReference(*MFI.getSavePoint());
345  }
346  if (MFI.getRestorePoint()) {
347  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
348  StrOS << printMBBReference(*MFI.getRestorePoint());
349  }
350 }
351 
353  const MachineFunction &MF,
354  ModuleSlotTracker &MST) {
355  const MachineFrameInfo &MFI = MF.getFrameInfo();
357  // Process fixed stack objects.
358  unsigned ID = 0;
359  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I, ++ID) {
360  if (MFI.isDeadObjectIndex(I))
361  continue;
362 
364  YamlObject.ID = ID;
365  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
368  YamlObject.Offset = MFI.getObjectOffset(I);
369  YamlObject.Size = MFI.getObjectSize(I);
370  YamlObject.Alignment = MFI.getObjectAlignment(I);
371  YamlObject.StackID = MFI.getStackID(I);
372  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
373  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
374  YMF.FixedStackObjects.push_back(YamlObject);
375  StackObjectOperandMapping.insert(
376  std::make_pair(I, FrameIndexOperand::createFixed(ID)));
377  }
378 
379  // Process ordinary stack objects.
380  ID = 0;
381  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I, ++ID) {
382  if (MFI.isDeadObjectIndex(I))
383  continue;
384 
385  yaml::MachineStackObject YamlObject;
386  YamlObject.ID = ID;
387  if (const auto *Alloca = MFI.getObjectAllocation(I))
388  YamlObject.Name.Value =
389  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
390  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
395  YamlObject.Offset = MFI.getObjectOffset(I);
396  YamlObject.Size = MFI.getObjectSize(I);
397  YamlObject.Alignment = MFI.getObjectAlignment(I);
398  YamlObject.StackID = MFI.getStackID(I);
399 
400  YMF.StackObjects.push_back(YamlObject);
401  StackObjectOperandMapping.insert(std::make_pair(
402  I, FrameIndexOperand::create(YamlObject.Name.Value, ID)));
403  }
404 
405  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
407  printRegMIR(CSInfo.getReg(), Reg, TRI);
408  if (!CSInfo.isSpilledToReg()) {
409  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
410  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
411  "Invalid stack object index");
412  const FrameIndexOperand &StackObject = StackObjectInfo->second;
413  if (StackObject.IsFixed) {
414  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
415  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
416  CSInfo.isRestored();
417  } else {
418  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
419  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
420  CSInfo.isRestored();
421  }
422  }
423  }
424  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
425  auto LocalObject = MFI.getLocalFrameObjectMap(I);
426  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
427  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
428  "Invalid stack object index");
429  const FrameIndexOperand &StackObject = StackObjectInfo->second;
430  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
431  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
432  }
433 
434  // Print the stack object references in the frame information class after
435  // converting the stack objects.
436  if (MFI.hasStackProtectorIndex()) {
438  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
440  }
441 
442  // Print the debug variable information.
443  for (const MachineFunction::VariableDbgInfo &DebugVar :
444  MF.getVariableDbgInfo()) {
445  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
446  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
447  "Invalid stack object index");
448  const FrameIndexOperand &StackObject = StackObjectInfo->second;
449  if (StackObject.IsFixed) {
450  auto &Object = YMF.FixedStackObjects[StackObject.ID];
451  printStackObjectDbgInfo(DebugVar, Object, MST);
452  } else {
453  auto &Object = YMF.StackObjects[StackObject.ID];
454  printStackObjectDbgInfo(DebugVar, Object, MST);
455  }
456  }
457 }
458 
461  unsigned ID = 0;
462  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
463  std::string Str;
464  raw_string_ostream StrOS(Str);
465  if (Constant.isMachineConstantPoolEntry()) {
466  Constant.Val.MachineCPVal->print(StrOS);
467  } else {
468  Constant.Val.ConstVal->printAsOperand(StrOS);
469  }
470 
471  yaml::MachineConstantPoolValue YamlConstant;
472  YamlConstant.ID = ID++;
473  YamlConstant.Value = StrOS.str();
474  YamlConstant.Alignment = Constant.getAlignment();
475  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
476 
477  MF.Constants.push_back(YamlConstant);
478  }
479 }
480 
482  yaml::MachineJumpTable &YamlJTI,
483  const MachineJumpTableInfo &JTI) {
484  YamlJTI.Kind = JTI.getEntryKind();
485  unsigned ID = 0;
486  for (const auto &Table : JTI.getJumpTables()) {
487  std::string Str;
489  Entry.ID = ID++;
490  for (const auto *MBB : Table.MBBs) {
491  raw_string_ostream StrOS(Str);
492  StrOS << printMBBReference(*MBB);
493  Entry.Blocks.push_back(StrOS.str());
494  Str.clear();
495  }
496  YamlJTI.Entries.push_back(Entry);
497  }
498 }
499 
500 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
501  const auto *TRI = MF.getSubtarget().getRegisterInfo();
502  unsigned I = 0;
503  for (const uint32_t *Mask : TRI->getRegMasks())
504  RegisterMaskIds.insert(std::make_pair(Mask, I++));
505 }
506 
509  bool &IsFallthrough) {
511 
512  for (const MachineInstr &MI : MBB) {
513  if (MI.isPHI())
514  continue;
515  for (const MachineOperand &MO : MI.operands()) {
516  if (!MO.isMBB())
517  continue;
518  MachineBasicBlock *Succ = MO.getMBB();
519  auto RP = Seen.insert(Succ);
520  if (RP.second)
521  Result.push_back(Succ);
522  }
523  }
524  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
525  IsFallthrough = I == MBB.end() || !I->isBarrier();
526 }
527 
528 bool
529 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
530  if (MBB.succ_size() <= 1)
531  return true;
532  if (!MBB.hasSuccessorProbabilities())
533  return true;
534 
535  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
536  MBB.Probs.end());
538  Normalized.end());
539  SmallVector<BranchProbability,8> Equal(Normalized.size());
541 
542  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
543 }
544 
545 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
547  bool GuessedFallthrough;
548  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
549  if (GuessedFallthrough) {
550  const MachineFunction &MF = *MBB.getParent();
551  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
552  if (NextI != MF.end()) {
553  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
554  if (!is_contained(GuessedSuccs, Next))
555  GuessedSuccs.push_back(Next);
556  }
557  }
558  if (GuessedSuccs.size() != MBB.succ_size())
559  return false;
560  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
561 }
562 
564  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
565  OS << "bb." << MBB.getNumber();
566  bool HasAttributes = false;
567  if (const auto *BB = MBB.getBasicBlock()) {
568  if (BB->hasName()) {
569  OS << "." << BB->getName();
570  } else {
571  HasAttributes = true;
572  OS << " (";
573  int Slot = MST.getLocalSlot(BB);
574  if (Slot == -1)
575  OS << "<ir-block badref>";
576  else
577  OS << (Twine("%ir-block.") + Twine(Slot)).str();
578  }
579  }
580  if (MBB.hasAddressTaken()) {
581  OS << (HasAttributes ? ", " : " (");
582  OS << "address-taken";
583  HasAttributes = true;
584  }
585  if (MBB.isEHPad()) {
586  OS << (HasAttributes ? ", " : " (");
587  OS << "landing-pad";
588  HasAttributes = true;
589  }
590  if (MBB.getAlignment()) {
591  OS << (HasAttributes ? ", " : " (");
592  OS << "align " << MBB.getAlignment();
593  HasAttributes = true;
594  }
595  if (HasAttributes)
596  OS << ")";
597  OS << ":\n";
598 
599  bool HasLineAttributes = false;
600  // Print the successors
601  bool canPredictProbs = canPredictBranchProbabilities(MBB);
602  // Even if the list of successors is empty, if we cannot guess it,
603  // we need to print it to tell the parser that the list is empty.
604  // This is needed, because MI model unreachable as empty blocks
605  // with an empty successor list. If the parser would see that
606  // without the successor list, it would guess the code would
607  // fallthrough.
608  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
609  !canPredictSuccessors(MBB)) {
610  OS.indent(2) << "successors: ";
611  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
612  if (I != MBB.succ_begin())
613  OS << ", ";
614  OS << printMBBReference(**I);
615  if (!SimplifyMIR || !canPredictProbs)
616  OS << '('
617  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
618  << ')';
619  }
620  OS << "\n";
621  HasLineAttributes = true;
622  }
623 
624  // Print the live in registers.
625  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
626  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
628  OS.indent(2) << "liveins: ";
629  bool First = true;
630  for (const auto &LI : MBB.liveins()) {
631  if (!First)
632  OS << ", ";
633  First = false;
634  OS << printReg(LI.PhysReg, &TRI);
635  if (!LI.LaneMask.all())
636  OS << ":0x" << PrintLaneMask(LI.LaneMask);
637  }
638  OS << "\n";
639  HasLineAttributes = true;
640  }
641 
642  if (HasLineAttributes)
643  OS << "\n";
644  bool IsInBundle = false;
645  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
646  const MachineInstr &MI = *I;
647  if (IsInBundle && !MI.isInsideBundle()) {
648  OS.indent(2) << "}\n";
649  IsInBundle = false;
650  }
651  OS.indent(IsInBundle ? 4 : 2);
652  print(MI);
653  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
654  OS << " {";
655  IsInBundle = true;
656  }
657  OS << "\n";
658  }
659  if (IsInBundle)
660  OS.indent(2) << "}\n";
661 }
662 
664  const auto *MF = MI.getMF();
665  const auto &MRI = MF->getRegInfo();
666  const auto &SubTarget = MF->getSubtarget();
667  const auto *TRI = SubTarget.getRegisterInfo();
668  assert(TRI && "Expected target register info");
669  const auto *TII = SubTarget.getInstrInfo();
670  assert(TII && "Expected target instruction info");
671  if (MI.isCFIInstruction())
672  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
673 
674  SmallBitVector PrintedTypes(8);
675  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
676  unsigned I = 0, E = MI.getNumOperands();
677  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
678  !MI.getOperand(I).isImplicit();
679  ++I) {
680  if (I)
681  OS << ", ";
682  print(MI, I, TRI, ShouldPrintRegisterTies,
683  MI.getTypeToPrint(I, PrintedTypes, MRI),
684  /*PrintDef=*/false);
685  }
686 
687  if (I)
688  OS << " = ";
690  OS << "frame-setup ";
692  OS << "frame-destroy ";
694  OS << "nnan ";
696  OS << "ninf ";
698  OS << "nsz ";
700  OS << "arcp ";
702  OS << "contract ";
704  OS << "afn ";
706  OS << "reassoc ";
708  OS << "nuw ";
710  OS << "nsw ";
712  OS << "exact ";
713 
714  OS << TII->getName(MI.getOpcode());
715  if (I < E)
716  OS << ' ';
717 
718  bool NeedComma = false;
719  for (; I < E; ++I) {
720  if (NeedComma)
721  OS << ", ";
722  print(MI, I, TRI, ShouldPrintRegisterTies,
723  MI.getTypeToPrint(I, PrintedTypes, MRI));
724  NeedComma = true;
725  }
726 
727  // Print any optional symbols attached to this instruction as-if they were
728  // operands.
729  if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
730  if (NeedComma)
731  OS << ',';
732  OS << " pre-instr-symbol ";
733  MachineOperand::printSymbol(OS, *PreInstrSymbol);
734  NeedComma = true;
735  }
736  if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
737  if (NeedComma)
738  OS << ',';
739  OS << " post-instr-symbol ";
740  MachineOperand::printSymbol(OS, *PostInstrSymbol);
741  NeedComma = true;
742  }
743 
744  if (const DebugLoc &DL = MI.getDebugLoc()) {
745  if (NeedComma)
746  OS << ',';
747  OS << " debug-location ";
748  DL->printAsOperand(OS, MST);
749  }
750 
751  if (!MI.memoperands_empty()) {
752  OS << " :: ";
753  const LLVMContext &Context = MF->getFunction().getContext();
754  const MachineFrameInfo &MFI = MF->getFrameInfo();
755  bool NeedComma = false;
756  for (const auto *Op : MI.memoperands()) {
757  if (NeedComma)
758  OS << ", ";
759  Op->print(OS, MST, SSNs, Context, &MFI, TII);
760  NeedComma = true;
761  }
762  }
763 }
764 
766  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
767  assert(ObjectInfo != StackObjectOperandMapping.end() &&
768  "Invalid frame index");
769  const FrameIndexOperand &Operand = ObjectInfo->second;
770  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
771  Operand.Name);
772 }
773 
774 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
775  const TargetRegisterInfo *TRI,
776  bool ShouldPrintRegisterTies, LLT TypeToPrint,
777  bool PrintDef) {
778  const MachineOperand &Op = MI.getOperand(OpIdx);
779  switch (Op.getType()) {
781  if (MI.isOperandSubregIdx(OpIdx)) {
784  break;
785  }
803  unsigned TiedOperandIdx = 0;
804  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
805  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
807  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
808  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
809  break;
810  }
812  printStackObjectReference(Op.getIndex());
813  break;
815  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
816  if (RegMaskInfo != RegisterMaskIds.end())
817  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
818  else
819  printCustomRegMask(Op.getRegMask(), OS, TRI);
820  break;
821  }
822  }
823 }
824 
825 void llvm::printMIR(raw_ostream &OS, const Module &M) {
826  yaml::Output Out(OS);
827  Out << const_cast<Module &>(M);
828 }
829 
831  MIRPrinter Printer(OS);
832  Printer.print(MF);
833 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:267
LLVMContext & Context
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:176
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:65
bool hasStackProtectorIndex() const
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:109
bool isCFIInstruction() const
Definition: MachineInstr.h:989
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:382
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Address of indexed Jump Table for switch.
unsigned Reg
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:123
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:93
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
std::unique_ptr< MachineFunctionInfo > MachineFuncInfo
Constant pool.
Mask of live-out registers.
print alias Alias Set Printer
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Mask of preserved registers.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:507
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:411
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:563
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:408
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:349
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
Definition: MachineInstr.h:554
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:117
const TargetRegisterInfo * getTargetRegisterInfo() const
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
Definition: MachineInstr.h:515
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:185
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:64
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:428
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:370
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4212
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:352
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:138
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:81
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:239
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:196
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:825
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:840
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4289
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:498
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
Definition: MachineInstr.h:566
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4129
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:417
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:841
Module.h This file contains the declarations for the Module class.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
The access may modify the value stored in memory.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
virtual yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:63
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:172
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:281
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:545
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:482
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
JTEntryKind getEntryKind() const
Floating-point immediate operand.
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:250
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:765
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
bool isMaxCallFrameSizeComputed() const
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:150
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:191
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:294
StringRef getVRegName(unsigned Reg) const
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1244