LLVM 19.0.0git
MIRPrinter.cpp
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1//===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the class that prints out the LLVM IR and machine
10// functions using the MIR serialization format.
11//
12//===----------------------------------------------------------------------===//
13
15#include "llvm/ADT/DenseMap.h"
16#include "llvm/ADT/STLExtras.h"
20#include "llvm/ADT/StringRef.h"
38#include "llvm/IR/DebugLoc.h"
39#include "llvm/IR/Function.h"
42#include "llvm/IR/Module.h"
44#include "llvm/IR/Value.h"
45#include "llvm/MC/LaneBitmask.h"
50#include "llvm/Support/Format.h"
54#include <algorithm>
55#include <cassert>
56#include <cinttypes>
57#include <cstdint>
58#include <iterator>
59#include <string>
60#include <utility>
61#include <vector>
62
63using namespace llvm;
64
66 "simplify-mir", cl::Hidden,
67 cl::desc("Leave out unnecessary information when printing MIR"));
68
69static cl::opt<bool> PrintLocations("mir-debug-loc", cl::Hidden, cl::init(true),
70 cl::desc("Print MIR debug-locations"));
71
72namespace {
73
74/// This structure describes how to print out stack object references.
75struct FrameIndexOperand {
76 std::string Name;
77 unsigned ID;
78 bool IsFixed;
79
80 FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
81 : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
82
83 /// Return an ordinary stack object reference.
84 static FrameIndexOperand create(StringRef Name, unsigned ID) {
85 return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
86 }
87
88 /// Return a fixed stack object reference.
89 static FrameIndexOperand createFixed(unsigned ID) {
90 return FrameIndexOperand("", ID, /*IsFixed=*/true);
91 }
92};
93
94} // end anonymous namespace
95
96namespace llvm {
97
98/// This class prints out the machine functions using the MIR serialization
99/// format.
101 raw_ostream &OS;
103 /// Maps from stack object indices to operand indices which will be used when
104 /// printing frame index machine operands.
105 DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
106
107public:
109
110 void print(const MachineFunction &MF);
111
112 void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
113 const TargetRegisterInfo *TRI);
115 const MachineFrameInfo &MFI);
119 const MachineJumpTableInfo &JTI);
121 const MachineFunction &MF, ModuleSlotTracker &MST);
123 const MachineFunction &MF,
124 ModuleSlotTracker &MST);
126 const MachineFunction &MF,
127 ModuleSlotTracker &MST);
129 const MachineFunction &MF,
131
132private:
133 void initRegisterMaskIds(const MachineFunction &MF);
134};
135
136/// This class prints out the machine instructions using the MIR serialization
137/// format.
139 raw_ostream &OS;
141 const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
142 const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
143 /// Synchronization scope names registered with LLVMContext.
145
146 bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
147 bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
148
149public:
151 const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
152 const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
153 : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
154 StackObjectOperandMapping(StackObjectOperandMapping) {}
155
156 void print(const MachineBasicBlock &MBB);
157
158 void print(const MachineInstr &MI);
159 void printStackObjectReference(int FrameIndex);
160 void print(const MachineInstr &MI, unsigned OpIdx,
162 bool ShouldPrintRegisterTies, LLT TypeToPrint,
163 bool PrintDef = true);
164};
165
166} // end namespace llvm
167
168namespace llvm {
169namespace yaml {
170
171/// This struct serializes the LLVM IR module.
172template <> struct BlockScalarTraits<Module> {
173 static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
174 Mod.print(OS, nullptr);
175 }
176
177 static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
178 llvm_unreachable("LLVM Module is supposed to be parsed separately");
179 return "";
180 }
181};
182
183} // end namespace yaml
184} // end namespace llvm
185
186static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
187 const TargetRegisterInfo *TRI) {
189 OS << printReg(Reg, TRI);
190}
191
193 initRegisterMaskIds(MF);
194
196 YamlMF.Name = MF.getName();
197 YamlMF.Alignment = MF.getAlignment();
199 YamlMF.HasWinCFI = MF.hasWinCFI();
200
201 YamlMF.CallsEHReturn = MF.callsEHReturn();
202 YamlMF.CallsUnwindInit = MF.callsUnwindInit();
203 YamlMF.HasEHCatchret = MF.hasEHCatchret();
204 YamlMF.HasEHScopes = MF.hasEHScopes();
205 YamlMF.HasEHFunclets = MF.hasEHFunclets();
206 YamlMF.IsOutlined = MF.isOutlined();
208
209 YamlMF.Legalized = MF.getProperties().hasProperty(
213 YamlMF.Selected = MF.getProperties().hasProperty(
221
222 convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
225 convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
226 convertStackObjects(YamlMF, MF, MST);
227 convertEntryValueObjects(YamlMF, MF, MST);
228 convertCallSiteObjects(YamlMF, MF, MST);
229 for (const auto &Sub : MF.DebugValueSubstitutions) {
230 const auto &SubSrc = Sub.Src;
231 const auto &SubDest = Sub.Dest;
232 YamlMF.DebugValueSubstitutions.push_back({SubSrc.first, SubSrc.second,
233 SubDest.first,
234 SubDest.second,
235 Sub.Subreg});
236 }
237 if (const auto *ConstantPool = MF.getConstantPool())
238 convert(YamlMF, *ConstantPool);
239 if (const auto *JumpTableInfo = MF.getJumpTableInfo())
240 convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
241
242 const TargetMachine &TM = MF.getTarget();
243 YamlMF.MachineFuncInfo =
244 std::unique_ptr<yaml::MachineFunctionInfo>(TM.convertFuncInfoToYAML(MF));
245
246 raw_string_ostream StrOS(YamlMF.Body.Value.Value);
247 bool IsNewlineNeeded = false;
248 for (const auto &MBB : MF) {
249 if (IsNewlineNeeded)
250 StrOS << "\n";
251 MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
252 .print(MBB);
253 IsNewlineNeeded = true;
254 }
255 StrOS.flush();
256 // Convert machine metadata collected during the print of the machine
257 // function.
258 convertMachineMetadataNodes(YamlMF, MF, MST);
259
260 yaml::Output Out(OS);
261 if (!SimplifyMIR)
262 Out.setWriteDefaultValues(true);
263 Out << YamlMF;
264}
265
266static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
267 const TargetRegisterInfo *TRI) {
268 assert(RegMask && "Can't print an empty register mask");
269 OS << StringRef("CustomRegMask(");
270
271 bool IsRegInRegMaskFound = false;
272 for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
273 // Check whether the register is asserted in regmask.
274 if (RegMask[I / 32] & (1u << (I % 32))) {
275 if (IsRegInRegMaskFound)
276 OS << ',';
277 OS << printReg(I, TRI);
278 IsRegInRegMaskFound = true;
279 }
280 }
281
282 OS << ')';
283}
284
285static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
287 const TargetRegisterInfo *TRI) {
290}
291
292template <typename T>
293static void
295 T &Object, ModuleSlotTracker &MST) {
296 std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
297 &Object.DebugExpr.Value,
298 &Object.DebugLoc.Value}};
299 std::array<const Metadata *, 3> Metas{{DebugVar.Var,
300 DebugVar.Expr,
301 DebugVar.Loc}};
302 for (unsigned i = 0; i < 3; ++i) {
303 raw_string_ostream StrOS(*Outputs[i]);
304 Metas[i]->printAsOperand(StrOS, MST);
305 }
306}
307
309 const MachineRegisterInfo &RegInfo,
310 const TargetRegisterInfo *TRI) {
311 MF.TracksRegLiveness = RegInfo.tracksLiveness();
312
313 // Print the virtual register definitions.
314 for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
317 VReg.ID = I;
318 if (RegInfo.getVRegName(Reg) != "")
319 continue;
320 ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
321 Register PreferredReg = RegInfo.getSimpleHint(Reg);
322 if (PreferredReg)
323 printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
324 MF.VirtualRegisters.push_back(VReg);
325 }
326
327 // Print the live ins.
328 for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
330 printRegMIR(LI.first, LiveIn.Register, TRI);
331 if (LI.second)
332 printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
333 MF.LiveIns.push_back(LiveIn);
334 }
335
336 // Prints the callee saved registers.
337 if (RegInfo.isUpdatedCSRsInitialized()) {
338 const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
339 std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
340 for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
342 printRegMIR(*I, Reg, TRI);
343 CalleeSavedRegisters.push_back(Reg);
344 }
345 MF.CalleeSavedRegisters = CalleeSavedRegisters;
346 }
347}
348
350 yaml::MachineFrameInfo &YamlMFI,
351 const MachineFrameInfo &MFI) {
354 YamlMFI.HasStackMap = MFI.hasStackMap();
355 YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
356 YamlMFI.StackSize = MFI.getStackSize();
358 YamlMFI.MaxAlignment = MFI.getMaxAlign().value();
359 YamlMFI.AdjustsStack = MFI.adjustsStack();
360 YamlMFI.HasCalls = MFI.hasCalls();
362 ? MFI.getMaxCallFrameSize() : ~0u;
366 YamlMFI.HasVAStart = MFI.hasVAStart();
368 YamlMFI.HasTailCall = MFI.hasTailCall();
369 YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
370 if (MFI.getSavePoint()) {
371 raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
372 StrOS << printMBBReference(*MFI.getSavePoint());
373 }
374 if (MFI.getRestorePoint()) {
376 StrOS << printMBBReference(*MFI.getRestorePoint());
377 }
378}
379
381 const MachineFunction &MF,
382 ModuleSlotTracker &MST) {
384 for (const MachineFunction::VariableDbgInfo &DebugVar :
386 yaml::EntryValueObject &Obj = YMF.EntryValueObjects.emplace_back();
387 printStackObjectDbgInfo(DebugVar, Obj, MST);
388 MCRegister EntryValReg = DebugVar.getEntryValueRegister();
389 printRegMIR(EntryValReg, Obj.EntryValueRegister, TRI);
390 }
391}
392
394 const MachineFunction &MF,
395 ModuleSlotTracker &MST) {
396 const MachineFrameInfo &MFI = MF.getFrameInfo();
398
399 // Process fixed stack objects.
400 assert(YMF.FixedStackObjects.empty());
401 SmallVector<int, 32> FixedStackObjectsIdx;
402 const int BeginIdx = MFI.getObjectIndexBegin();
403 if (BeginIdx < 0)
404 FixedStackObjectsIdx.reserve(-BeginIdx);
405
406 unsigned ID = 0;
407 for (int I = BeginIdx; I < 0; ++I, ++ID) {
408 FixedStackObjectsIdx.push_back(-1); // Fill index for possible dead.
409 if (MFI.isDeadObjectIndex(I))
410 continue;
411
413 YamlObject.ID = ID;
414 YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
417 YamlObject.Offset = MFI.getObjectOffset(I);
418 YamlObject.Size = MFI.getObjectSize(I);
419 YamlObject.Alignment = MFI.getObjectAlign(I);
420 YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
421 YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
422 YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
423 // Save the ID' position in FixedStackObjects storage vector.
424 FixedStackObjectsIdx[ID] = YMF.FixedStackObjects.size();
425 YMF.FixedStackObjects.push_back(YamlObject);
426 StackObjectOperandMapping.insert(
427 std::make_pair(I, FrameIndexOperand::createFixed(ID)));
428 }
429
430 // Process ordinary stack objects.
431 assert(YMF.StackObjects.empty());
432 SmallVector<unsigned, 32> StackObjectsIdx;
433 const int EndIdx = MFI.getObjectIndexEnd();
434 if (EndIdx > 0)
435 StackObjectsIdx.reserve(EndIdx);
436 ID = 0;
437 for (int I = 0; I < EndIdx; ++I, ++ID) {
438 StackObjectsIdx.push_back(-1); // Fill index for possible dead.
439 if (MFI.isDeadObjectIndex(I))
440 continue;
441
442 yaml::MachineStackObject YamlObject;
443 YamlObject.ID = ID;
444 if (const auto *Alloca = MFI.getObjectAllocation(I))
445 YamlObject.Name.Value = std::string(
446 Alloca->hasName() ? Alloca->getName() : "");
447 YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
452 YamlObject.Offset = MFI.getObjectOffset(I);
453 YamlObject.Size = MFI.getObjectSize(I);
454 YamlObject.Alignment = MFI.getObjectAlign(I);
455 YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
456
457 // Save the ID' position in StackObjects storage vector.
458 StackObjectsIdx[ID] = YMF.StackObjects.size();
459 YMF.StackObjects.push_back(YamlObject);
460 StackObjectOperandMapping.insert(std::make_pair(
461 I, FrameIndexOperand::create(YamlObject.Name.Value, ID)));
462 }
463
464 for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
465 const int FrameIdx = CSInfo.getFrameIdx();
466 if (!CSInfo.isSpilledToReg() && MFI.isDeadObjectIndex(FrameIdx))
467 continue;
468
470 printRegMIR(CSInfo.getReg(), Reg, TRI);
471 if (!CSInfo.isSpilledToReg()) {
472 assert(FrameIdx >= MFI.getObjectIndexBegin() &&
473 FrameIdx < MFI.getObjectIndexEnd() &&
474 "Invalid stack object index");
475 if (FrameIdx < 0) { // Negative index means fixed objects.
476 auto &Object =
478 [FixedStackObjectsIdx[FrameIdx + MFI.getNumFixedObjects()]];
479 Object.CalleeSavedRegister = Reg;
480 Object.CalleeSavedRestored = CSInfo.isRestored();
481 } else {
482 auto &Object = YMF.StackObjects[StackObjectsIdx[FrameIdx]];
483 Object.CalleeSavedRegister = Reg;
484 Object.CalleeSavedRestored = CSInfo.isRestored();
485 }
486 }
487 }
488 for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
489 auto LocalObject = MFI.getLocalFrameObjectMap(I);
490 assert(LocalObject.first >= 0 && "Expected a locally mapped stack object");
491 YMF.StackObjects[StackObjectsIdx[LocalObject.first]].LocalOffset =
492 LocalObject.second;
493 }
494
495 // Print the stack object references in the frame information class after
496 // converting the stack objects.
497 if (MFI.hasStackProtectorIndex()) {
499 MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
501 }
502
503 if (MFI.hasFunctionContextIndex()) {
505 MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
507 }
508
509 // Print the debug variable information.
510 for (const MachineFunction::VariableDbgInfo &DebugVar :
512 int Idx = DebugVar.getStackSlot();
513 assert(Idx >= MFI.getObjectIndexBegin() && Idx < MFI.getObjectIndexEnd() &&
514 "Invalid stack object index");
515 if (Idx < 0) { // Negative index means fixed objects.
516 auto &Object =
517 YMF.FixedStackObjects[FixedStackObjectsIdx[Idx +
518 MFI.getNumFixedObjects()]];
519 printStackObjectDbgInfo(DebugVar, Object, MST);
520 } else {
521 auto &Object = YMF.StackObjects[StackObjectsIdx[Idx]];
522 printStackObjectDbgInfo(DebugVar, Object, MST);
523 }
524 }
525}
526
528 const MachineFunction &MF,
529 ModuleSlotTracker &MST) {
530 const auto *TRI = MF.getSubtarget().getRegisterInfo();
531 for (auto CSInfo : MF.getCallSitesInfo()) {
532 yaml::CallSiteInfo YmlCS;
534
535 // Prepare instruction position.
536 MachineBasicBlock::const_instr_iterator CallI = CSInfo.first->getIterator();
537 CallLocation.BlockNum = CallI->getParent()->getNumber();
538 // Get call instruction offset from the beginning of block.
539 CallLocation.Offset =
540 std::distance(CallI->getParent()->instr_begin(), CallI);
541 YmlCS.CallLocation = CallLocation;
542 // Construct call arguments and theirs forwarding register info.
543 for (auto ArgReg : CSInfo.second) {
545 YmlArgReg.ArgNo = ArgReg.ArgNo;
546 printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
547 YmlCS.ArgForwardingRegs.emplace_back(YmlArgReg);
548 }
549 YMF.CallSitesInfo.push_back(YmlCS);
550 }
551
552 // Sort call info by position of call instructions.
553 llvm::sort(YMF.CallSitesInfo.begin(), YMF.CallSitesInfo.end(),
555 if (A.CallLocation.BlockNum == B.CallLocation.BlockNum)
556 return A.CallLocation.Offset < B.CallLocation.Offset;
557 return A.CallLocation.BlockNum < B.CallLocation.BlockNum;
558 });
559}
560
562 const MachineFunction &MF,
565 MST.collectMachineMDNodes(MDList);
566 for (auto &MD : MDList) {
567 std::string NS;
568 raw_string_ostream StrOS(NS);
569 MD.second->print(StrOS, MST, MF.getFunction().getParent());
570 YMF.MachineMetadataNodes.push_back(StrOS.str());
571 }
572}
573
576 unsigned ID = 0;
577 for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
578 std::string Str;
579 raw_string_ostream StrOS(Str);
580 if (Constant.isMachineConstantPoolEntry()) {
581 Constant.Val.MachineCPVal->print(StrOS);
582 } else {
583 Constant.Val.ConstVal->printAsOperand(StrOS);
584 }
585
587 YamlConstant.ID = ID++;
588 YamlConstant.Value = StrOS.str();
589 YamlConstant.Alignment = Constant.getAlign();
590 YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
591
592 MF.Constants.push_back(YamlConstant);
593 }
594}
595
597 yaml::MachineJumpTable &YamlJTI,
598 const MachineJumpTableInfo &JTI) {
599 YamlJTI.Kind = JTI.getEntryKind();
600 unsigned ID = 0;
601 for (const auto &Table : JTI.getJumpTables()) {
602 std::string Str;
604 Entry.ID = ID++;
605 for (const auto *MBB : Table.MBBs) {
606 raw_string_ostream StrOS(Str);
607 StrOS << printMBBReference(*MBB);
608 Entry.Blocks.push_back(StrOS.str());
609 Str.clear();
610 }
611 YamlJTI.Entries.push_back(Entry);
612 }
613}
614
615void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
616 const auto *TRI = MF.getSubtarget().getRegisterInfo();
617 unsigned I = 0;
618 for (const uint32_t *Mask : TRI->getRegMasks())
619 RegisterMaskIds.insert(std::make_pair(Mask, I++));
620}
621
624 bool &IsFallthrough) {
626
627 for (const MachineInstr &MI : MBB) {
628 if (MI.isPHI())
629 continue;
630 for (const MachineOperand &MO : MI.operands()) {
631 if (!MO.isMBB())
632 continue;
633 MachineBasicBlock *Succ = MO.getMBB();
634 auto RP = Seen.insert(Succ);
635 if (RP.second)
636 Result.push_back(Succ);
637 }
638 }
640 IsFallthrough = I == MBB.end() || !I->isBarrier();
641}
642
643bool
644MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
645 if (MBB.succ_size() <= 1)
646 return true;
648 return true;
649
650 SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
651 MBB.Probs.end());
653 Normalized.end());
654 SmallVector<BranchProbability,8> Equal(Normalized.size());
655 BranchProbability::normalizeProbabilities(Equal.begin(), Equal.end());
656
657 return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
658}
659
660bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
662 bool GuessedFallthrough;
663 guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
664 if (GuessedFallthrough) {
665 const MachineFunction &MF = *MBB.getParent();
667 if (NextI != MF.end()) {
668 MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
669 if (!is_contained(GuessedSuccs, Next))
670 GuessedSuccs.push_back(Next);
671 }
672 }
673 if (GuessedSuccs.size() != MBB.succ_size())
674 return false;
675 return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
676}
677
679 assert(MBB.getNumber() >= 0 && "Invalid MBB number");
680 MBB.printName(OS,
683 &MST);
684 OS << ":\n";
685
686 bool HasLineAttributes = false;
687 // Print the successors
688 bool canPredictProbs = canPredictBranchProbabilities(MBB);
689 // Even if the list of successors is empty, if we cannot guess it,
690 // we need to print it to tell the parser that the list is empty.
691 // This is needed, because MI model unreachable as empty blocks
692 // with an empty successor list. If the parser would see that
693 // without the successor list, it would guess the code would
694 // fallthrough.
695 if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
696 !canPredictSuccessors(MBB)) {
697 OS.indent(2) << "successors:";
698 if (!MBB.succ_empty())
699 OS << " ";
700 for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
701 if (I != MBB.succ_begin())
702 OS << ", ";
703 OS << printMBBReference(**I);
704 if (!SimplifyMIR || !canPredictProbs)
705 OS << '('
706 << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
707 << ')';
708 }
709 OS << "\n";
710 HasLineAttributes = true;
711 }
712
713 // Print the live in registers.
715 if (!MBB.livein_empty()) {
716 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
717 OS.indent(2) << "liveins: ";
718 bool First = true;
719 for (const auto &LI : MBB.liveins_dbg()) {
720 if (!First)
721 OS << ", ";
722 First = false;
723 OS << printReg(LI.PhysReg, &TRI);
724 if (!LI.LaneMask.all())
725 OS << ":0x" << PrintLaneMask(LI.LaneMask);
726 }
727 OS << "\n";
728 HasLineAttributes = true;
729 }
730
731 if (HasLineAttributes && !MBB.empty())
732 OS << "\n";
733 bool IsInBundle = false;
734 for (const MachineInstr &MI : MBB.instrs()) {
735 if (IsInBundle && !MI.isInsideBundle()) {
736 OS.indent(2) << "}\n";
737 IsInBundle = false;
738 }
739 OS.indent(IsInBundle ? 4 : 2);
740 print(MI);
741 if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
742 OS << " {";
743 IsInBundle = true;
744 }
745 OS << "\n";
746 }
747 if (IsInBundle)
748 OS.indent(2) << "}\n";
749}
750
752 const auto *MF = MI.getMF();
753 const auto &MRI = MF->getRegInfo();
754 const auto &SubTarget = MF->getSubtarget();
755 const auto *TRI = SubTarget.getRegisterInfo();
756 assert(TRI && "Expected target register info");
757 const auto *TII = SubTarget.getInstrInfo();
758 assert(TII && "Expected target instruction info");
759 if (MI.isCFIInstruction())
760 assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
761
762 SmallBitVector PrintedTypes(8);
763 bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
764 unsigned I = 0, E = MI.getNumOperands();
765 for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
766 !MI.getOperand(I).isImplicit();
767 ++I) {
768 if (I)
769 OS << ", ";
770 print(MI, I, TRI, TII, ShouldPrintRegisterTies,
771 MI.getTypeToPrint(I, PrintedTypes, MRI),
772 /*PrintDef=*/false);
773 }
774
775 if (I)
776 OS << " = ";
777 if (MI.getFlag(MachineInstr::FrameSetup))
778 OS << "frame-setup ";
779 if (MI.getFlag(MachineInstr::FrameDestroy))
780 OS << "frame-destroy ";
781 if (MI.getFlag(MachineInstr::FmNoNans))
782 OS << "nnan ";
783 if (MI.getFlag(MachineInstr::FmNoInfs))
784 OS << "ninf ";
785 if (MI.getFlag(MachineInstr::FmNsz))
786 OS << "nsz ";
787 if (MI.getFlag(MachineInstr::FmArcp))
788 OS << "arcp ";
789 if (MI.getFlag(MachineInstr::FmContract))
790 OS << "contract ";
791 if (MI.getFlag(MachineInstr::FmAfn))
792 OS << "afn ";
793 if (MI.getFlag(MachineInstr::FmReassoc))
794 OS << "reassoc ";
795 if (MI.getFlag(MachineInstr::NoUWrap))
796 OS << "nuw ";
797 if (MI.getFlag(MachineInstr::NoSWrap))
798 OS << "nsw ";
799 if (MI.getFlag(MachineInstr::IsExact))
800 OS << "exact ";
801 if (MI.getFlag(MachineInstr::NoFPExcept))
802 OS << "nofpexcept ";
803 if (MI.getFlag(MachineInstr::NoMerge))
804 OS << "nomerge ";
805 if (MI.getFlag(MachineInstr::Unpredictable))
806 OS << "unpredictable ";
807 if (MI.getFlag(MachineInstr::NoConvergent))
808 OS << "noconvergent ";
809
810 OS << TII->getName(MI.getOpcode());
811 if (I < E)
812 OS << ' ';
813
814 bool NeedComma = false;
815 for (; I < E; ++I) {
816 if (NeedComma)
817 OS << ", ";
818 print(MI, I, TRI, TII, ShouldPrintRegisterTies,
819 MI.getTypeToPrint(I, PrintedTypes, MRI));
820 NeedComma = true;
821 }
822
823 // Print any optional symbols attached to this instruction as-if they were
824 // operands.
825 if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
826 if (NeedComma)
827 OS << ',';
828 OS << " pre-instr-symbol ";
829 MachineOperand::printSymbol(OS, *PreInstrSymbol);
830 NeedComma = true;
831 }
832 if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
833 if (NeedComma)
834 OS << ',';
835 OS << " post-instr-symbol ";
836 MachineOperand::printSymbol(OS, *PostInstrSymbol);
837 NeedComma = true;
838 }
839 if (MDNode *HeapAllocMarker = MI.getHeapAllocMarker()) {
840 if (NeedComma)
841 OS << ',';
842 OS << " heap-alloc-marker ";
843 HeapAllocMarker->printAsOperand(OS, MST);
844 NeedComma = true;
845 }
846 if (MDNode *PCSections = MI.getPCSections()) {
847 if (NeedComma)
848 OS << ',';
849 OS << " pcsections ";
850 PCSections->printAsOperand(OS, MST);
851 NeedComma = true;
852 }
853 if (uint32_t CFIType = MI.getCFIType()) {
854 if (NeedComma)
855 OS << ',';
856 OS << " cfi-type " << CFIType;
857 NeedComma = true;
858 }
859
860 if (auto Num = MI.peekDebugInstrNum()) {
861 if (NeedComma)
862 OS << ',';
863 OS << " debug-instr-number " << Num;
864 NeedComma = true;
865 }
866
867 if (PrintLocations) {
868 if (const DebugLoc &DL = MI.getDebugLoc()) {
869 if (NeedComma)
870 OS << ',';
871 OS << " debug-location ";
872 DL->printAsOperand(OS, MST);
873 }
874 }
875
876 if (!MI.memoperands_empty()) {
877 OS << " :: ";
878 const LLVMContext &Context = MF->getFunction().getContext();
879 const MachineFrameInfo &MFI = MF->getFrameInfo();
880 bool NeedComma = false;
881 for (const auto *Op : MI.memoperands()) {
882 if (NeedComma)
883 OS << ", ";
884 Op->print(OS, MST, SSNs, Context, &MFI, TII);
885 NeedComma = true;
886 }
887 }
888}
889
891 auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
892 assert(ObjectInfo != StackObjectOperandMapping.end() &&
893 "Invalid frame index");
894 const FrameIndexOperand &Operand = ObjectInfo->second;
895 MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
896 Operand.Name);
897}
898
899static std::string formatOperandComment(std::string Comment) {
900 if (Comment.empty())
901 return Comment;
902 return std::string(" /* " + Comment + " */");
903}
904
905void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
906 const TargetRegisterInfo *TRI,
907 const TargetInstrInfo *TII,
908 bool ShouldPrintRegisterTies, LLT TypeToPrint,
909 bool PrintDef) {
910 const MachineOperand &Op = MI.getOperand(OpIdx);
911 std::string MOComment = TII->createMIROperandComment(MI, Op, OpIdx, TRI);
912
913 switch (Op.getType()) {
915 if (MI.isOperandSubregIdx(OpIdx)) {
918 break;
919 }
920 [[fallthrough]];
939 unsigned TiedOperandIdx = 0;
940 if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
941 TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
942 const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo();
943 Op.print(OS, MST, TypeToPrint, OpIdx, PrintDef, /*IsStandalone=*/false,
944 ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
945 OS << formatOperandComment(MOComment);
946 break;
947 }
949 printStackObjectReference(Op.getIndex());
950 break;
952 auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
953 if (RegMaskInfo != RegisterMaskIds.end())
954 OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
955 else
956 printCustomRegMask(Op.getRegMask(), OS, TRI);
957 break;
958 }
959 }
960}
961
963 ModuleSlotTracker &MST) {
964 if (isa<GlobalValue>(V)) {
965 V.printAsOperand(OS, /*PrintType=*/false, MST);
966 return;
967 }
968 if (isa<Constant>(V)) {
969 // Machine memory operands can load/store to/from constant value pointers.
970 OS << '`';
971 V.printAsOperand(OS, /*PrintType=*/true, MST);
972 OS << '`';
973 return;
974 }
975 OS << "%ir.";
976 if (V.hasName()) {
977 printLLVMNameWithoutPrefix(OS, V.getName());
978 return;
979 }
980 int Slot = MST.getCurrentFunction() ? MST.getLocalSlot(&V) : -1;
982}
983
985 // RemoveDIs: as there's no textual form for DbgRecords yet, print debug-info
986 // in dbg.value format.
987 bool IsNewDbgInfoFormat = M.IsNewDbgInfoFormat;
988 if (IsNewDbgInfoFormat)
989 const_cast<Module &>(M).convertFromNewDbgValues();
990
991 yaml::Output Out(OS);
992 Out << const_cast<Module &>(M);
993
994 if (IsNewDbgInfoFormat)
995 const_cast<Module &>(M).convertToNewDbgValues();
996}
997
999 // RemoveDIs: as there's no textual form for DbgRecords yet, print debug-info
1000 // in dbg.value format.
1001 bool IsNewDbgInfoFormat = MF.getFunction().IsNewDbgInfoFormat;
1002 if (IsNewDbgInfoFormat)
1003 const_cast<Function &>(MF.getFunction()).convertFromNewDbgValues();
1004
1006 Printer.print(MF);
1007
1008 if (IsNewDbgInfoFormat)
1009 const_cast<Function &>(MF.getFunction()).convertToNewDbgValues();
1010}
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
dxil pretty DXIL Metadata Pretty Printer
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines the DenseMap class.
expand large fp convert
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
This file contains an interface for creating legacy passes to print out IR in various granularities.
A common definition of LaneBitmask for use in TableGen and CodeGen.
Implement a low-level type suitable for MachineInstr level instruction selection.
#define I(x, y, z)
Definition: MD5.cpp:58
static std::string formatOperandComment(std::string Comment)
Definition: MIRPrinter.cpp:899
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:186
static cl::opt< bool > PrintLocations("mir-debug-loc", cl::Hidden, cl::init(true), cl::desc("Print MIR debug-locations"))
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:294
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:266
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
unsigned const TargetRegisterInfo * TRI
static bool isReg(const MCInst &MI, unsigned OpNo)
Module.h This file contains the declarations for the Module class.
LLVMContext & Context
Module * Mod
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file contains some templates that are useful if you are working with the STL at all.
raw_pwrite_stream & OS
This file implements the SmallBitVector class.
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
uint32_t getNumerator() const
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
This is an important base class in LLVM.
Definition: Constant.h:41
This class represents an Operation in the Expression.
bool print(raw_ostream &OS, DIDumpOptions DumpOpts, const DWARFExpression *Expr, DWARFUnit *U) const
A debug info location.
Definition: DebugLoc.h:33
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:155
iterator end()
Definition: DenseMap.h:84
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:220
bool IsNewDbgInfoFormat
Is this function using intrinsics to record the position of debugging information,...
Definition: Function.h:106
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function.
Definition: Function.cpp:342
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:655
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:40
Metadata node.
Definition: Metadata.h:1067
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:138
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:678
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:150
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:890
static void printIRValue(raw_ostream &OS, const Value &V, ModuleSlotTracker &MST)
Helper functions to print IR value as MIR serialization format which will be useful for target specif...
Definition: MIRPrinter.cpp:962
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:100
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:308
void convertEntryValueObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:380
void convertCallSiteObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:527
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:192
void convertMachineMetadataNodes(yaml::MachineFunction &YMF, const MachineFunction &MF, MachineModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:561
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:108
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:393
BranchProbability getSuccProbability(const_succ_iterator Succ) const
Return probability of the edge from this block to MBB.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
@ PrintNameIr
Add IR name where available.
@ PrintNameAttributes
Print attributes.
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
unsigned succ_size() const
iterator_range< livein_iterator > liveins_dbg() const
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
Instructions::const_iterator const_instr_iterator
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
This class is a data container for one entry in a MachineConstantPool.
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
bool hasCalls() const
Return true if the current function has any function calls.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
MachineBasicBlock * getRestorePoint() const
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
int getStackProtectorIndex() const
Return the index for the stack protector object.
bool hasTailCall() const
Returns true if the function contains a tail call.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
bool isMaxCallFrameSizeComputed() const
int64_t getLocalFrameSize() const
Get the size of the local object blob.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasStackProtectorIndex() const
uint8_t getStackID(int ObjectIdx) const
unsigned getNumFixedObjects() const
Return the number of fixed objects.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
bool hasFunctionContextIndex() const
int getObjectIndexBegin() const
Return the minimum frame object index.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
MachineBasicBlock * getSavePoint() const
int getFunctionContextIndex() const
Return the index for the function context object.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
bool hasProperty(Property P) const
Description of the location of a variable whose Address is valid and unchanging during function execu...
auto getEntryValueVariableDbgInfo() const
Returns the collection of variables for which we have debug info and that have been assigned an entry...
bool useDebugInstrRef() const
Returns true if the function's variable locations are tracked with instruction referencing.
SmallVector< DebugSubstitution, 8 > DebugValueSubstitutions
Debug value substitutions: a collection of DebugSubstitution objects, recording changes in where a va...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool callsUnwindInit() const
const CallSiteInfoMap & getCallSitesInfo() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
auto getInStackSlotVariableDbgInfo()
Returns the collection of variables for which we have debug info and that have been assigned a stack ...
Align getAlignment() const
getAlignment - Return the alignment of the function.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
const MachineFunctionProperties & getProperties() const
Get the function properties.
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
BasicBlockListType::const_iterator const_iterator
Representation of each machine instruction.
Definition: MachineInstr.h:69
JTEntryKind getEntryKind() const
const std::vector< MachineJumpTableEntry > & getJumpTables() const
void collectMachineMDNodes(MachineMDNodeListType &L) const
MachineOperand class - Representation of each machine instruction operand.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
static void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
@ MO_CFIIndex
MCCFIInstruction index.
@ MO_Immediate
Immediate operand.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
@ MO_Predicate
Generic predicate for ISel.
@ MO_GlobalAddress
Address of a global value.
@ MO_RegisterMask
Mask of preserved registers.
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
@ MO_CImmediate
Immediate >64bit operand.
@ MO_BlockAddress
Address of a basic block.
@ MO_DbgInstrRef
Integer indices referring to an instruction+operand.
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_FrameIndex
Abstract Stack Frame Index.
@ MO_Register
Register operand.
@ MO_ExternalSymbol
Name of external global symbol.
@ MO_IntrinsicID
Intrinsic ID for ISel.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
@ MO_TargetIndex
Target-dependent index+offset operand.
@ MO_Metadata
Metadata reference (for debug info)
@ MO_FPImmediate
Floating-point immediate operand.
@ MO_RegisterLiveOut
Mask of live-out registers.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register getSimpleHint(Register VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint.
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
ArrayRef< std::pair< MCRegister, Register > > liveins() const
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
StringRef getVRegName(Register Reg) const
void print(raw_ostream &OS, const Module *M=nullptr, bool IsForDebug=false) const
Print.
Definition: AsmWriter.cpp:5159
Manage lifetime of a slot tracker for printing IR.
std::vector< std::pair< unsigned, const MDNode * > > MachineMDNodeListType
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:910
const Function * getCurrentFunction() const
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:896
A Module instance is used to store all the information related to an LLVM module.
Definition: Module.h:65
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4811
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:342
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
size_t size() const
Definition: SmallVector.h:91
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
void reserve(size_type N)
Definition: SmallVector.h:676
void push_back(const T &Elt)
Definition: SmallVector.h:426
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::string lower() const
Definition: StringRef.cpp:111
TargetInstrInfo - Interface to description of machine instruction set.
TargetIntrinsicInfo - Interface to description of machine instruction set.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
LLVM Value Representation.
Definition: Value.h:74
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4960
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:5043
self_iterator getIterator()
Definition: ilist_node.h:109
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:660
std::string & str()
Returns the string's reference.
Definition: raw_ostream.h:678
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:450
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:92
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:984
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock * > &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:622
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1656
Printable printRegClassOrBank(Register Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:125
@ First
Helpers to iterate all locations in the MemoryEffectsBase class.
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.
Definition: STLExtras.h:1888
void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name)
Print out a name of an LLVM value without any prefixes.
Definition: AsmWriter.cpp:377
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
uint64_t value() const
This is a hole in the type system and should not be abused.
Definition: Alignment.h:85
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:173
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:177
Identifies call instruction location in machine function.
Serializable representation of CallSiteInfo.
std::vector< ArgRegPair > ArgForwardingRegs
MachineInstrLoc CallLocation
Serializable representation of the MCRegister variant of MachineFunction::VariableDbgInfo.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
Serializable representation of MachineFrameInfo.
unsigned MaxCallFrameSize
~0u means: not computed yet.
std::vector< MachineStackObject > StackObjects
std::vector< StringValue > MachineMetadataNodes
std::optional< std::vector< FlowStringValue > > CalleeSavedRegisters
std::vector< EntryValueObject > EntryValueObjects
std::vector< MachineConstantPoolValue > Constants
std::vector< CallSiteInfo > CallSitesInfo
std::vector< MachineFunctionLiveIn > LiveIns
std::vector< VirtualRegisterDefinition > VirtualRegisters
std::vector< FixedMachineStackObject > FixedStackObjects
std::vector< DebugValueSubstitution > DebugValueSubstitutions
std::unique_ptr< MachineFunctionInfo > MachineFuncInfo
Constant pool.
MachineJumpTable JumpTableInfo
std::vector< Entry > Entries
MachineJumpTableInfo::JTEntryKind Kind
Serializable representation of stack object from the MachineFrameInfo class.
TargetStackID::Value StackID
A wrapper around std::string which contains a source range that's being set during parsing.