LLVM  10.0.0svn
MipsLegalizerInfo.cpp
Go to the documentation of this file.
1 //===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements the targeting of the Machinelegalizer class for Mips.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
12 
13 #include "MipsLegalizerInfo.h"
14 #include "MipsTargetMachine.h"
16 
17 using namespace llvm;
18 
20  using namespace TargetOpcode;
21 
22  const LLT s1 = LLT::scalar(1);
23  const LLT s32 = LLT::scalar(32);
24  const LLT s64 = LLT::scalar(64);
25  const LLT p0 = LLT::pointer(0, 32);
26 
27  getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL})
28  .legalFor({s32})
29  .clampScalar(0, s32, s32);
30 
31  getActionDefinitionsBuilder({G_UADDO, G_UADDE, G_USUBO, G_USUBE, G_UMULO})
32  .lowerFor({{s32, s1}});
33 
35  .legalFor({s32})
36  .maxScalar(0, s32);
37 
38  getActionDefinitionsBuilder({G_LOAD, G_STORE})
39  .legalForTypesWithMemDesc({{s32, p0, 8, 8},
40  {s32, p0, 16, 8},
41  {s32, p0, 32, 8},
42  {s64, p0, 64, 8},
43  {p0, p0, 32, 8}})
44  .minScalar(0, s32);
45 
46  getActionDefinitionsBuilder(G_UNMERGE_VALUES)
47  .legalFor({{s32, s64}});
48 
49  getActionDefinitionsBuilder(G_MERGE_VALUES)
50  .legalFor({{s64, s32}});
51 
52  getActionDefinitionsBuilder({G_ZEXTLOAD, G_SEXTLOAD})
53  .legalForTypesWithMemDesc({{s32, p0, 8, 8},
54  {s32, p0, 16, 8}})
55  .minScalar(0, s32);
56 
58  .legalForCartesianProduct({p0, s32, s64}, {s32})
59  .minScalar(0, s32)
60  .minScalar(1, s32);
61 
63  .legalFor({s32})
64  .minScalar(0, s32);
65 
67  .legalFor({p0, s32, s64})
68  .minScalar(0, s32);
69 
70  getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
71  .legalFor({s32})
72  .clampScalar(0, s32, s32);
73 
74  getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UREM, G_UDIV})
75  .legalFor({s32})
76  .minScalar(0, s32)
77  .libcallFor({s64});
78 
79  getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR})
80  .legalFor({s32, s32})
81  .minScalar(1, s32);
82 
84  .legalForCartesianProduct({s32}, {s32, p0})
85  .clampScalar(1, s32, s32)
86  .minScalar(0, s32);
87 
88  getActionDefinitionsBuilder(G_CONSTANT)
89  .legalFor({s32})
90  .clampScalar(0, s32, s32);
91 
93  .legalFor({{p0, s32}});
94 
95  getActionDefinitionsBuilder(G_FRAME_INDEX)
96  .legalFor({p0});
97 
98  getActionDefinitionsBuilder(G_GLOBAL_VALUE)
99  .legalFor({p0});
100 
101  // FP instructions
102  getActionDefinitionsBuilder(G_FCONSTANT)
103  .legalFor({s32, s64});
104 
105  getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FABS, G_FSQRT})
106  .legalFor({s32, s64});
107 
109  .legalFor({{s32, s32}, {s32, s64}})
110  .minScalar(0, s32);
111 
112  getActionDefinitionsBuilder({G_FCEIL, G_FFLOOR})
113  .libcallFor({s32, s64});
114 
116  .legalFor({{s64, s32}});
117 
118  getActionDefinitionsBuilder(G_FPTRUNC)
119  .legalFor({{s32, s64}});
120 
121  // FP to int conversion instructions
123  .legalForCartesianProduct({s32}, {s64, s32})
124  .libcallForCartesianProduct({s64}, {s64, s32})
125  .minScalar(0, s32);
126 
128  .libcallForCartesianProduct({s64}, {s64, s32})
129  .minScalar(0, s32);
130 
131  // Int to FP conversion instructions
133  .legalForCartesianProduct({s64, s32}, {s32})
134  .libcallForCartesianProduct({s64, s32}, {s64})
135  .minScalar(1, s32);
136 
138  .libcallForCartesianProduct({s64, s32}, {s64})
139  .minScalar(1, s32);
140 
141  computeTables();
142  verify(*ST.getInstrInfo());
143 }
144 
147  MachineIRBuilder &MIRBuilder,
148  GISelChangeObserver &Observer) const {
149 
150  using namespace TargetOpcode;
151 
152  MIRBuilder.setInstr(MI);
153 
154  return false;
155 }
156 
158  MachineIRBuilder &MIRBuilder) const {
159  switch (MI.getIntrinsicID()) {
160  case Intrinsic::memcpy:
161  case Intrinsic::memset:
162  case Intrinsic::memmove:
163  if (createMemLibcall(MIRBuilder, MRI, MI) ==
165  return false;
166  MI.eraseFromParent();
167  return true;
168  default:
169  break;
170  }
171  return true;
172 }
static LLT pointer(unsigned AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
MipsLegalizerInfo(const MipsSubtarget &ST)
const MipsInstrInfo * getInstrInfo() const override
This file declares the targeting of the Machinelegalizer class for Mips.
bool legalizeIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder) const override
Return true if MI is either legal or has been legalized and false if not legal.
LegalizeRuleSet & libcallForCartesianProduct(std::initializer_list< LLT > Types)
LegalizeRuleSet & legalForCartesianProduct(std::initializer_list< LLT > Types)
The instruction is legal when type indexes 0 and 1 are both in the given list.
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
void verify(const MCInstrInfo &MII) const
Perform simple self-diagnostic and assert if there is anything obviously wrong with the actions set u...
void computeTables()
Compute any ancillary tables needed to quickly decide how an operation should be handled.
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
Abstract class that contains various methods for clients to notify about changes. ...
unsigned const MachineRegisterInfo * MRI
LegalizeRuleSet & libcallFor(std::initializer_list< LLT > Types)
Helper class to build MachineInstr.
void setInstr(MachineInstr &MI)
Set the insertion point to before MI.
LegalizerHelper::LegalizeResult createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, MachineInstr &MI)
Create a libcall to memcpy et al.
Some kind of error has occurred and we could not legalize this instruction.
LegalizeRuleSet & minScalar(unsigned TypeIdx, const LLT &Ty)
Ensure the scalar is at least as wide as Ty.
LegalizeRuleSet & getActionDefinitionsBuilder(unsigned Opcode)
Get the action definition builder for the given opcode.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
LegalizeRuleSet & legalFor(std::initializer_list< LLT > Types)
The instruction is legal when type index 0 is any type in the given list.
Representation of each machine instruction.
Definition: MachineInstr.h:64
bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, GISelChangeObserver &Observer) const override
unsigned getIntrinsicID() const
Returns the Intrinsic::ID for this instruction.
IRTranslator LLVM IR MI