LLVM 19.0.0git
MipsMCCodeEmitter.h
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1//===- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the MipsMCCodeEmitter class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
14#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
15
17#include <cstdint>
18
19namespace llvm {
20
21class MCContext;
22class MCExpr;
23class MCFixup;
24class MCInst;
25class MCInstrInfo;
26class MCOperand;
27class MCSubtargetInfo;
28class raw_ostream;
29
31 const MCInstrInfo &MCII;
32 MCContext &Ctx;
33 bool IsLittleEndian;
34
35 bool isMicroMips(const MCSubtargetInfo &STI) const;
36 bool isMips32r6(const MCSubtargetInfo &STI) const;
37
38public:
39 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
40 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
43 ~MipsMCCodeEmitter() override = default;
44
45 void EmitByte(unsigned char C, raw_ostream &OS) const;
46
49 const MCSubtargetInfo &STI) const override;
50
51 // getBinaryCodeForInstr - TableGen'erated function for getting the
52 // binary encoding for an instruction.
55 const MCSubtargetInfo &STI) const;
56
57 // getJumpTargetOpValue - Return binary encoding of the jump
58 // target operand. If the machine operand requires relocation,
59 // record the relocation and return zero.
60 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
62 const MCSubtargetInfo &STI) const;
63
64 // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
65 // target operand. If the machine operand requires relocation,
66 // record the relocation and return zero.
67 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
69 const MCSubtargetInfo &STI) const;
70
71 // getUImm5Lsl2Encoding - Return binary encoding of the microMIPS jump
72 // target operand.
73 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
75 const MCSubtargetInfo &STI) const;
76
77 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo,
79 const MCSubtargetInfo &STI) const;
80
81 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo,
83 const MCSubtargetInfo &STI) const;
84
85 // getSImm9AddiuspValue - Return binary encoding of the microMIPS addiusp
86 // instruction immediate operand.
87 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
89 const MCSubtargetInfo &STI) const;
90
91 // getBranchTargetOpValue - Return binary encoding of the branch
92 // target operand. If the machine operand requires relocation,
93 // record the relocation and return zero.
94 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
96 const MCSubtargetInfo &STI) const;
97
98 // getBranchTargetOpValue1SImm16 - Return binary encoding of the branch
99 // target operand. If the machine operand requires relocation,
100 // record the relocation and return zero.
101 unsigned getBranchTargetOpValue1SImm16(const MCInst &MI, unsigned OpNo,
103 const MCSubtargetInfo &STI) const;
104
105 // getBranchTargetOpValueMMR6 - Return binary encoding of the branch
106 // target operand. If the machine operand requires relocation,
107 // record the relocation and return zero.
108 unsigned getBranchTargetOpValueMMR6(const MCInst &MI, unsigned OpNo,
110 const MCSubtargetInfo &STI) const;
111
112 // getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch
113 // target operand. If the machine operand requires relocation,
114 // record the relocation and return zero.
115 unsigned getBranchTargetOpValueLsl2MMR6(const MCInst &MI, unsigned OpNo,
117 const MCSubtargetInfo &STI) const;
118
119 // getBranchTarget7OpValue - Return binary encoding of the microMIPS branch
120 // target operand. If the machine operand requires relocation,
121 // record the relocation and return zero.
122 unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo,
124 const MCSubtargetInfo &STI) const;
125
126 // getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS
127 // 10-bit branch target operand. If the machine operand requires relocation,
128 // record the relocation and return zero.
129 unsigned getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo,
131 const MCSubtargetInfo &STI) const;
132
133 // getBranchTargetOpValue - Return binary encoding of the microMIPS branch
134 // target operand. If the machine operand requires relocation,
135 // record the relocation and return zero.
136 unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
138 const MCSubtargetInfo &STI) const;
139
140 // getBranchTarget21OpValue - Return binary encoding of the branch
141 // offset operand. If the machine operand requires relocation,
142 // record the relocation and return zero.
143 unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
145 const MCSubtargetInfo &STI) const;
146
147 // getBranchTarget21OpValueMM - Return binary encoding of the branch
148 // offset operand for microMIPS. If the machine operand requires
149 // relocation,record the relocation and return zero.
150 unsigned getBranchTarget21OpValueMM(const MCInst &MI, unsigned OpNo,
152 const MCSubtargetInfo &STI) const;
153
154 // getBranchTarget26OpValue - Return binary encoding of the branch
155 // offset operand. If the machine operand requires relocation,
156 // record the relocation and return zero.
157 unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
159 const MCSubtargetInfo &STI) const;
160
161 // getBranchTarget26OpValueMM - Return binary encoding of the branch
162 // offset operand. If the machine operand requires relocation,
163 // record the relocation and return zero.
164 unsigned getBranchTarget26OpValueMM(const MCInst &MI, unsigned OpNo,
166 const MCSubtargetInfo &STI) const;
167
168 // getJumpOffset16OpValue - Return binary encoding of the jump
169 // offset operand. If the machine operand requires relocation,
170 // record the relocation and return zero.
171 unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
173 const MCSubtargetInfo &STI) const;
174
175 // getMachineOpValue - Return binary encoding of operand. If the machin
176 // operand requires relocation, record the relocation and return zero.
177 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
179 const MCSubtargetInfo &STI) const;
180
181 unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
183 const MCSubtargetInfo &STI) const;
184
185 template <unsigned ShiftAmount = 0>
186 unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
188 const MCSubtargetInfo &STI) const;
189 unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo,
191 const MCSubtargetInfo &STI) const;
192 unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo,
194 const MCSubtargetInfo &STI) const;
195 unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo,
197 const MCSubtargetInfo &STI) const;
198 unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo,
200 const MCSubtargetInfo &STI) const;
201 unsigned getMemEncodingMMGPImm7Lsl2(const MCInst &MI, unsigned OpNo,
203 const MCSubtargetInfo &STI) const;
204 unsigned getMemEncodingMMImm9(const MCInst &MI, unsigned OpNo,
206 const MCSubtargetInfo &STI) const;
207 unsigned getMemEncodingMMImm11(const MCInst &MI, unsigned OpNo,
209 const MCSubtargetInfo &STI) const;
210 unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
212 const MCSubtargetInfo &STI) const;
213 unsigned getMemEncodingMMImm16(const MCInst &MI, unsigned OpNo,
215 const MCSubtargetInfo &STI) const;
216 unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo,
218 const MCSubtargetInfo &STI) const;
219 unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
221 const MCSubtargetInfo &STI) const;
222
223 /// Subtract Offset then encode as a N-bit unsigned integer.
224 template <unsigned Bits, int Offset>
225 unsigned getUImmWithOffsetEncoding(const MCInst &MI, unsigned OpNo,
227 const MCSubtargetInfo &STI) const;
228
229 unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
231 const MCSubtargetInfo &STI) const;
232
233 unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
235 const MCSubtargetInfo &STI) const;
236
237 unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo,
239 const MCSubtargetInfo &STI) const;
240 unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo,
242 const MCSubtargetInfo &STI) const;
243
244 unsigned getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo,
246 const MCSubtargetInfo &STI) const;
247 unsigned getMovePRegSingleOpValue(const MCInst &MI, unsigned OpNo,
249 const MCSubtargetInfo &STI) const;
250
251 unsigned getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo,
253 const MCSubtargetInfo &STI) const;
254
255 unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
256 const MCSubtargetInfo &STI) const;
257
258 unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
260 const MCSubtargetInfo &STI) const;
261
262 unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo,
264 const MCSubtargetInfo &STI) const;
265
266private:
267 void LowerCompactBranch(MCInst& Inst) const;
268};
269
270} // end namespace llvm
271
272#endif // LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
IRTranslator LLVM IR MI
raw_pwrite_stream & OS
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
Context object for machine code objects.
Definition: MCContext.h:76
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
Generic base class for all target subtargets.
unsigned getBranchTargetOpValueLsl2MMR6(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueLsl2MMR6 - Return binary encoding of the branch target operand.
unsigned getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget21OpValue - Return binary encoding of the branch target operand.
MipsMCCodeEmitter(const MipsMCCodeEmitter &)=delete
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getMachineOpValue - Return binary encoding of operand.
unsigned getUImmWithOffsetEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Subtract Offset then encode as a N-bit unsigned integer.
unsigned getMemEncodingMMImm9(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTargetOpValueMMR6(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueMMR6 - Return binary encoding of the branch target operand.
unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue - Return binary encoding of the branch target operand.
unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMGPImm7Lsl2(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
~MipsMCCodeEmitter() override=default
unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Return binary encoding of memory related operand.
unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget26OpValue - Return binary encoding of the branch target operand.
unsigned getBranchTarget26OpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget26OpValueMM - Return binary encoding of the branch target operand.
unsigned getBranchTargetOpValue1SImm16(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue1SImm16 - Return binary encoding of the branch target operand.
unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getJumpOffset16OpValue - Return binary encoding of the jump target operand.
unsigned getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand.
unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getJumpTargetOpValue - Return binary encoding of the jump target operand.
unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm11(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm16(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand.
unsigned getMovePRegSingleOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
void encodeInstruction(const MCInst &MI, SmallVectorImpl< char > &CB, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
encodeInstruction - Emit the instruction.
unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTarget21OpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget21OpValueMM - Return binary encoding of the branch target operand for microMIPS.
unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
MipsMCCodeEmitter & operator=(const MipsMCCodeEmitter &)=delete
unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand.
unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void EmitByte(unsigned char C, raw_ostream &OS) const
unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18