44 cl::desc(
"Disable load/store vectorizer"),
49 "disable-nvptx-require-structured-cfg",
50 cl::desc(
"Transitional flag to turn off NVPTX's requirement on preserving " 51 "structured CFG. The requirement should be disabled only when " 52 "unexpected regressions happen."),
58 "Use 32-bit pointers for accessing const/local/shared address spaces."),
95 std::string
Ret =
"e";
99 else if (UseShortPointers)
100 Ret +=
"-p3:32:32-p4:32:32-p5:32:32";
102 Ret +=
"-i64:64-i128:128-v16:16-v32:32-n16:32:64";
116 CPU, FS, Options, Reloc::
PIC_,
120 Subtarget(TT, CPU, FS, *this) {
132 void NVPTXTargetMachine32::anchor() {}
142 void NVPTXTargetMachine64::anchor() {}
160 return getTM<NVPTXTargetMachine>();
163 void addIRPasses()
override;
164 bool addInstSelector()
override;
165 void addPreRegAlloc()
override;
166 void addPostRegAlloc()
override;
167 void addMachineSSAOptimization()
override;
169 FunctionPass *createTargetRegisterAllocator(
bool)
override;
170 void addFastRegAlloc()
override;
171 void addOptimizedRegAlloc()
override;
173 bool addRegAssignmentFast()
override {
177 bool addRegAssignmentOptimized()
override {
184 void addEarlyCSEOrGVNPass();
187 void addAddressSpaceInferencePasses();
190 void addStraightLineScalarOptimizationPasses();
196 return new NVPTXPassConfig(*
this, PM);
213 void NVPTXPassConfig::addEarlyCSEOrGVNPass() {
220 void NVPTXPassConfig::addAddressSpaceInferencePasses() {
228 void NVPTXPassConfig::addStraightLineScalarOptimizationPasses() {
237 addEarlyCSEOrGVNPass();
245 void NVPTXPassConfig::addIRPasses() {
278 addAddressSpaceInferencePasses();
281 addStraightLineScalarOptimizationPasses();
299 addEarlyCSEOrGVNPass();
302 bool NVPTXPassConfig::addInstSelector() {
315 void NVPTXPassConfig::addPreRegAlloc() {
320 void NVPTXPassConfig::addPostRegAlloc() {
330 FunctionPass *NVPTXPassConfig::createTargetRegisterAllocator(
bool) {
334 void NVPTXPassConfig::addFastRegAlloc() {
339 void NVPTXPassConfig::addOptimizedRegAlloc() {
350 printAndVerify(
"After Machine Scheduling");
358 printAndVerify(
"After StackSlotColoring");
361 void NVPTXPassConfig::addMachineSSAOptimization() {
364 printAndVerify(
"After Pre-RegAlloc TailDuplicate");
383 printAndVerify(
"After codegen DCE pass");
389 printAndVerify(
"After ILP optimizations");
395 printAndVerify(
"After Machine LICM, CSE and Sinking passes");
398 printAndVerify(
"After codegen peephole optimization pass");
FunctionPass * createSpeculativeExecutionPass()
FunctionPass * createStraightLineStrengthReducePass()
FunctionPass * createGVNPass(bool NoLoads=false)
Create a legacy GVN pass.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
void initializeNVPTXLowerArgsPass(PassRegistry &)
CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value...
MachineFunctionPass * createNVPTXProxyRegErasurePass()
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
PassManagerBuilder - This class is used to set up a standard optimization sequence for languages like...
This class represents lattice values for constants.
void LLVMInitializeNVPTXTarget()
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
ModulePass * createNVPTXAssignValidGlobalNamesPass()
char & FuncletLayoutID
This pass lays out funclets contiguously.
FunctionPass * createAllocaHoisting()
static cl::opt< bool > DisableRequireStructuredCFG("disable-nvptx-require-structured-cfg", cl::desc("Transitional flag to turn off NVPTX's requirement on preserving " "structured CFG. The requirement should be disabled only when " "unexpected regressions happen."), cl::init(false), cl::Hidden)
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
virtual void add(Pass *P)=0
Add a pass to the queue of passes to run.
MachineFunctionPass * createNVPTXPrologEpilogPass()
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
block Block Frequency true
ModulePass * createGenericToNVVMPass()
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
FunctionPass * createNVPTXLowerAllocaPass()
void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry &)
FunctionPass * createNVVMReflectPass(unsigned int SmVersion)
NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
bool hasImageHandles() const
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
Target-Independent Code Generator Pass Configuration Options.
Target & getTheNVPTXTarget64()
static cl::opt< bool > UseShortPointersOpt("nvptx-short-ptr", cl::desc("Use 32-bit pointers for accessing const/local/shared address spaces."), cl::init(false), cl::Hidden)
char & EarlyTailDuplicateID
Duplicate blocks with unconditional branches into tails of their predecessors.
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
Pass * createLoadStoreVectorizerPass()
Create a legacy pass manager instance of the LoadStoreVectorizer pass.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
FunctionPass * createNVPTXImageOptimizerPass()
void initializeNVVMIntrRangePass(PassRegistry &)
TargetTransformInfo getTargetTransformInfo(const Function &F) override
Get a TargetTransformInfo implementation for the target.
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
Target & getTheNVPTXTarget32()
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
FunctionPass * createInferAddressSpacesPass(unsigned AddressSpace=~0u)
initializer< Ty > init(const Ty &Val)
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
static std::string computeDataLayout(bool is64Bit, bool UseShortPointers)
void initializeNVPTXLowerAggrCopiesPass(PassRegistry &)
void initializeNVVMReflectPass(PassRegistry &)
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OP, bool is64bit)
This file provides the interface for LLVM's Global Value Numbering pass which eliminates fully redund...
static bool is64Bit(const char *name)
MachineFunctionPass * createNVPTXReplaceImageHandlesPass()
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
char & LiveDebugValuesID
LiveDebugValues pass.
This class describes a target machine that is implemented with the LLVM target-independent code gener...
FunctionPass class - This class is used to implement most global optimizations.
void initializeNVPTXAllocaHoistingPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
void initializeGenericToNVVMPass(PassRegistry &)
EP_EarlyAsPossible - This extension point allows adding passes before any other transformations, allowing them to see the code as it is coming out of the frontend.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
void initializeNVPTXLowerAllocaPass(PassRegistry &)
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
void setRequiresStructuredCFG(bool Value)
char & EarlyMachineLICMID
This pass performs loop invariant code motion on machine instructions.
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
FunctionPass * createSeparateConstOffsetFromGEPPass(bool LowerGEP=false)
Target - Wrapper for Target specific information.
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
void initializeNVPTXProxyRegErasurePass(PassRegistry &)
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
MachineFunctionPass * createNVPTXPeephole()
FunctionPass * createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel)
createNVPTXISelDag - This pass converts a legalized DAG into a NVPTX-specific DAG, ready for instruction scheduling.
~NVPTXTargetMachine() override
FunctionPass * createNVVMIntrRangePass(unsigned int SmVersion)
FunctionPass * createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM)
FunctionPass * createLowerAggrCopies()
void adjustPassManager(PassManagerBuilder &) override
Allow the target to modify the pass manager, e.g.
FunctionPass * createSROAPass()
const NVPTXSubtarget * getSubtargetImpl() const
unsigned int getSmVersion() const
FunctionPass * createEarlyCSEPass(bool UseMemorySSA=false)
static cl::opt< bool > DisableLoadStoreVectorizer("disable-nvptx-load-store-vectorizer", cl::desc("Disable load/store vectorizer"), cl::init(false), cl::Hidden)
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
void addExtension(ExtensionPointTy Ty, ExtensionFn Fn)
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
FunctionPass * createNaryReassociatePass()