LLVM  11.0.0git
RISCVTargetTransformInfo.cpp
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1 //===-- RISCVTargetTransformInfo.cpp - RISC-V specific TTI ----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 #include "Utils/RISCVMatInt.h"
14 using namespace llvm;
15 
16 #define DEBUG_TYPE "riscvtti"
17 
20  assert(Ty->isIntegerTy() &&
21  "getIntImmCost can only estimate cost of materialising integers");
22 
23  // We have a Zero register, so 0 is always free.
24  if (Imm == 0)
25  return TTI::TCC_Free;
26 
27  // Otherwise, we check how many instructions it will take to materialise.
28  const DataLayout &DL = getDataLayout();
30  getST()->is64Bit());
31 }
32 
33 int RISCVTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm,
35  assert(Ty->isIntegerTy() &&
36  "getIntImmCost can only estimate cost of materialising integers");
37 
38  // We have a Zero register, so 0 is always free.
39  if (Imm == 0)
40  return TTI::TCC_Free;
41 
42  // Some instructions in RISC-V can take a 12-bit immediate. Some of these are
43  // commutative, in others the immediate comes from a specific argument index.
44  bool Takes12BitImm = false;
45  unsigned ImmArgIdx = ~0U;
46 
47  switch (Opcode) {
48  case Instruction::GetElementPtr:
49  // Never hoist any arguments to a GetElementPtr. CodeGenPrepare will
50  // split up large offsets in GEP into better parts than ConstantHoisting
51  // can.
52  return TTI::TCC_Free;
53  case Instruction::Add:
54  case Instruction::And:
55  case Instruction::Or:
56  case Instruction::Xor:
57  case Instruction::Mul:
58  Takes12BitImm = true;
59  break;
60  case Instruction::Sub:
61  case Instruction::Shl:
62  case Instruction::LShr:
63  case Instruction::AShr:
64  Takes12BitImm = true;
65  ImmArgIdx = 1;
66  break;
67  default:
68  break;
69  }
70 
71  if (Takes12BitImm) {
72  // Check immediate is the correct argument...
73  if (Instruction::isCommutative(Opcode) || Idx == ImmArgIdx) {
74  // ... and fits into the 12-bit immediate.
75  if (Imm.getMinSignedBits() <= 64 &&
76  getTLI()->isLegalAddImmediate(Imm.getSExtValue())) {
77  return TTI::TCC_Free;
78  }
79  }
80 
81  // Otherwise, use the full materialisation cost.
82  return getIntImmCost(Imm, Ty, CostKind);
83  }
84 
85  // By default, prevent hoisting.
86  return TTI::TCC_Free;
87 }
88 
90  const APInt &Imm, Type *Ty,
92  // Prevent hoisting in unknown cases.
93  return TTI::TCC_Free;
94 }
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
This class represents lattice values for constants.
Definition: AllocatorList.h:23
int getIntImmCostInst(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
TypeSize getTypeSizeInBits(Type *Ty) const
Size examples:
Definition: DataLayout.h:652
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size")))
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:198
int64_t getSExtValue() const
Get sign extended value.
Definition: APInt.h:1635
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
Expected to fold away in lowering.
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
int getIntImmCost(const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
bool isLegalAddImmediate(int64_t Imm) const override
Return true if the specified immediate is legal add immediate, that is the target has add instruction...
bool isCommutative() const
Return true if the instruction is commutative:
Definition: Instruction.h:526
Class for arbitrary precision integers.
Definition: APInt.h:69
int getIntMatCost(const APInt &Val, unsigned Size, bool IsRV64)
Definition: RISCVMatInt.cpp:78
This file defines a TargetTransformInfo::Concept conforming object specific to the RISC-V target mach...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned getMinSignedBits() const
Get the minimum bit size for this signed APInt.
Definition: APInt.h:1612
int getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty, TTI::TargetCostKind CostKind)
const DataLayout & getDataLayout() const
This pass exposes codegen information to IR-level passes.
TargetCostKind
The kind of cost model.
This file describes how to lower LLVM code to machine code.