LLVM 19.0.0git
SIFrameLowering.h
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1//===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
10#define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
11
12#include "AMDGPUFrameLowering.h"
13#include "SIRegisterInfo.h"
14
15namespace llvm {
16
18public:
20 Align TransAl = Align(1))
21 : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
22 ~SIFrameLowering() override = default;
23
25 MachineBasicBlock &MBB) const;
27 MachineBasicBlock &MBB) const override;
29 MachineBasicBlock &MBB) const override;
31 Register &FrameReg) const override;
32
34 RegScavenger *RS = nullptr) const override;
36 RegScavenger *RS = nullptr) const;
38 bool NeedExecCopyReservedReg) const;
41 LiveRegUnits &LiveUnits, Register FrameReg,
42 Register FramePtrRegScratchCopy) const;
45 LiveRegUnits &LiveUnits, Register FrameReg,
46 Register FramePtrRegScratchCopy) const;
47 bool
50 std::vector<CalleeSavedInfo> &CSI) const override;
51
53 const MachineFunction &MF) const override;
54
55 bool isSupportedStackID(TargetStackID::Value ID) const override;
56
59 RegScavenger *RS = nullptr) const override;
60
62 MachineFunction &MF, RegScavenger *RS = nullptr) const override;
63
67 MachineBasicBlock::iterator MI) const override;
68
69private:
70 void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
73 const DebugLoc &DL,
74 Register ScratchWaveOffsetReg) const;
75
76 Register getEntryFunctionReservedScratchRsrcReg(MachineFunction &MF) const;
77
78 void emitEntryFunctionScratchRsrcRegSetup(
81 Register PreloadedPrivateBufferReg, Register ScratchRsrcReg,
82 Register ScratchWaveOffsetReg) const;
83
84public:
85 bool hasFP(const MachineFunction &MF) const override;
86
88};
89
90} // end namespace llvm
91
92#endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
Interface to describe a layout of a stack frame on an AMDGPU target.
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned const TargetRegisterInfo * TRI
Interface definition for SIRegisterInfo.
Information about the stack frame layout on the AMDGPU targets.
A debug info location.
Definition: DebugLoc.h:33
A set of register units used to track register liveness.
Definition: LiveRegUnits.h:30
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
void determinePrologEpilogSGPRSaves(MachineFunction &MF, BitVector &SavedRegs, bool NeedExecCopyReservedReg) const
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
bool allocateScavengingFrameIndexesNearIncomingSP(const MachineFunction &MF) const override
Control the placement of special register scavenging spill slots when allocating a stack frame.
SIFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl=Align(1))
bool requiresStackPointerReference(const MachineFunction &MF) const
void emitEntryFunctionPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void emitCSRSpillStores(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, LiveRegUnits &LiveUnits, Register FrameReg, Register FramePtrRegScratchCopy) const
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void emitCSRSpillRestores(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, LiveRegUnits &LiveUnits, Register FrameReg, Register FramePtrRegScratchCopy) const
~SIFrameLowering() override=default
void processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameIndicesReplaced - This method is called immediately before MO_FrameIndex op...
bool isSupportedStackID(TargetStackID::Value ID) const override
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
StackOffset holds a fixed and a scalable offset in bytes.
Definition: TypeSize.h:33
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39