LLVM 19.0.0git
ShrinkWrap.cpp
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1//===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass looks for safe point where the prologue and epilogue can be
10// inserted.
11// The safe point for the prologue (resp. epilogue) is called Save
12// (resp. Restore).
13// A point is safe for prologue (resp. epilogue) if and only if
14// it 1) dominates (resp. post-dominates) all the frame related operations and
15// between 2) two executions of the Save (resp. Restore) point there is an
16// execution of the Restore (resp. Save) point.
17//
18// For instance, the following points are safe:
19// for (int i = 0; i < 10; ++i) {
20// Save
21// ...
22// Restore
23// }
24// Indeed, the execution looks like Save -> Restore -> Save -> Restore ...
25// And the following points are not:
26// for (int i = 0; i < 10; ++i) {
27// Save
28// ...
29// }
30// for (int i = 0; i < 10; ++i) {
31// ...
32// Restore
33// }
34// Indeed, the execution looks like Save -> Save -> ... -> Restore -> Restore.
35//
36// This pass also ensures that the safe points are 3) cheaper than the regular
37// entry and exits blocks.
38//
39// Property #1 is ensured via the use of MachineDominatorTree and
40// MachinePostDominatorTree.
41// Property #2 is ensured via property #1 and MachineLoopInfo, i.e., both
42// points must be in the same loop.
43// Property #3 is ensured via the MachineBlockFrequencyInfo.
44//
45// If this pass found points matching all these properties, then
46// MachineFrameInfo is updated with this information.
47//
48//===----------------------------------------------------------------------===//
49
50#include "llvm/ADT/BitVector.h"
52#include "llvm/ADT/SetVector.h"
54#include "llvm/ADT/Statistic.h"
55#include "llvm/Analysis/CFG.h"
75#include "llvm/IR/Attributes.h"
76#include "llvm/IR/Function.h"
78#include "llvm/MC/MCAsmInfo.h"
79#include "llvm/Pass.h"
81#include "llvm/Support/Debug.h"
85#include <cassert>
86#include <cstdint>
87#include <memory>
88
89using namespace llvm;
90
91#define DEBUG_TYPE "shrink-wrap"
92
93STATISTIC(NumFunc, "Number of functions");
94STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
95STATISTIC(NumCandidatesDropped,
96 "Number of shrink-wrapping candidates dropped because of frequency");
97
99EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
100 cl::desc("enable the shrink-wrapping pass"));
102 "enable-shrink-wrap-region-split", cl::init(true), cl::Hidden,
103 cl::desc("enable splitting of the restore block if possible"));
104
105namespace {
106
107/// Class to determine where the safe point to insert the
108/// prologue and epilogue are.
109/// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
110/// shrink-wrapping term for prologue/epilogue placement, this pass
111/// does not rely on expensive data-flow analysis. Instead we use the
112/// dominance properties and loop information to decide which point
113/// are safe for such insertion.
114class ShrinkWrap : public MachineFunctionPass {
115 /// Hold callee-saved information.
117 MachineDominatorTree *MDT = nullptr;
118 MachinePostDominatorTree *MPDT = nullptr;
119
120 /// Current safe point found for the prologue.
121 /// The prologue will be inserted before the first instruction
122 /// in this basic block.
123 MachineBasicBlock *Save = nullptr;
124
125 /// Current safe point found for the epilogue.
126 /// The epilogue will be inserted before the first terminator instruction
127 /// in this basic block.
128 MachineBasicBlock *Restore = nullptr;
129
130 /// Hold the information of the basic block frequency.
131 /// Use to check the profitability of the new points.
132 MachineBlockFrequencyInfo *MBFI = nullptr;
133
134 /// Hold the loop information. Used to determine if Save and Restore
135 /// are in the same loop.
136 MachineLoopInfo *MLI = nullptr;
137
138 // Emit remarks.
140
141 /// Frequency of the Entry block.
142 BlockFrequency EntryFreq;
143
144 /// Current opcode for frame setup.
145 unsigned FrameSetupOpcode = ~0u;
146
147 /// Current opcode for frame destroy.
148 unsigned FrameDestroyOpcode = ~0u;
149
150 /// Stack pointer register, used by llvm.{savestack,restorestack}
151 Register SP;
152
153 /// Entry block.
154 const MachineBasicBlock *Entry = nullptr;
155
156 using SetOfRegs = SmallSetVector<unsigned, 16>;
157
158 /// Registers that need to be saved for the current function.
159 mutable SetOfRegs CurrentCSRs;
160
161 /// Current MachineFunction.
162 MachineFunction *MachineFunc = nullptr;
163
164 /// Is `true` for the block numbers where we assume possible stack accesses
165 /// or computation of stack-relative addresses on any CFG path including the
166 /// block itself. Is `false` for basic blocks where we can guarantee the
167 /// opposite. False positives won't lead to incorrect analysis results,
168 /// therefore this approach is fair.
169 BitVector StackAddressUsedBlockInfo;
170
171 /// Check if \p MI uses or defines a callee-saved register or
172 /// a frame index. If this is the case, this means \p MI must happen
173 /// after Save and before Restore.
174 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
175 bool StackAddressUsed) const;
176
177 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
178 if (CurrentCSRs.empty()) {
179 BitVector SavedRegs;
180 const TargetFrameLowering *TFI =
181 MachineFunc->getSubtarget().getFrameLowering();
182
183 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
184
185 for (int Reg = SavedRegs.find_first(); Reg != -1;
186 Reg = SavedRegs.find_next(Reg))
187 CurrentCSRs.insert((unsigned)Reg);
188 }
189 return CurrentCSRs;
190 }
191
192 /// Update the Save and Restore points such that \p MBB is in
193 /// the region that is dominated by Save and post-dominated by Restore
194 /// and Save and Restore still match the safe point definition.
195 /// Such point may not exist and Save and/or Restore may be null after
196 /// this call.
197 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
198
199 // Try to find safe point based on dominance and block frequency without
200 // any change in IR.
201 bool performShrinkWrapping(
203 RegScavenger *RS);
204
205 /// This function tries to split the restore point if doing so can shrink the
206 /// save point further. \return True if restore point is split.
207 bool postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
208 RegScavenger *RS);
209
210 /// This function analyzes if the restore point can split to create a new
211 /// restore point. This function collects
212 /// 1. Any preds of current restore that are reachable by callee save/FI
213 /// blocks
214 /// - indicated by DirtyPreds
215 /// 2. Any preds of current restore that are not DirtyPreds - indicated by
216 /// CleanPreds
217 /// Both sets should be non-empty for considering restore point split.
218 bool checkIfRestoreSplittable(
219 const MachineBasicBlock *CurRestore,
220 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
223 const TargetInstrInfo *TII, RegScavenger *RS);
224
225 /// Initialize the pass for \p MF.
226 void init(MachineFunction &MF) {
227 RCI.runOnMachineFunction(MF);
228 MDT = &getAnalysis<MachineDominatorTree>();
229 MPDT = &getAnalysis<MachinePostDominatorTree>();
230 Save = nullptr;
231 Restore = nullptr;
232 MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
233 MLI = &getAnalysis<MachineLoopInfo>();
234 ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
235 EntryFreq = MBFI->getEntryFreq();
236 const TargetSubtargetInfo &Subtarget = MF.getSubtarget();
237 const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
238 FrameSetupOpcode = TII.getCallFrameSetupOpcode();
239 FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
241 Entry = &MF.front();
242 CurrentCSRs.clear();
243 MachineFunc = &MF;
244
245 ++NumFunc;
246 }
247
248 /// Check whether or not Save and Restore points are still interesting for
249 /// shrink-wrapping.
250 bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
251
252 /// Check if shrink wrapping is enabled for this target and function.
253 static bool isShrinkWrapEnabled(const MachineFunction &MF);
254
255public:
256 static char ID;
257
258 ShrinkWrap() : MachineFunctionPass(ID) {
260 }
261
262 void getAnalysisUsage(AnalysisUsage &AU) const override {
263 AU.setPreservesAll();
270 }
271
274 MachineFunctionProperties::Property::NoVRegs);
275 }
276
277 StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
278
279 /// Perform the shrink-wrapping analysis and update
280 /// the MachineFrameInfo attached to \p MF with the results.
281 bool runOnMachineFunction(MachineFunction &MF) override;
282};
283
284} // end anonymous namespace
285
286char ShrinkWrap::ID = 0;
287
288char &llvm::ShrinkWrapID = ShrinkWrap::ID;
289
290INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
296INITIALIZE_PASS_END(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
297
298bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
299 bool StackAddressUsed) const {
300 /// Check if \p Op is known to access an address not on the function's stack .
301 /// At the moment, accesses where the underlying object is a global, function
302 /// argument, or jump table are considered non-stack accesses. Note that the
303 /// caller's stack may get accessed when passing an argument via the stack,
304 /// but not the stack of the current function.
305 ///
306 auto IsKnownNonStackPtr = [](MachineMemOperand *Op) {
307 if (Op->getValue()) {
308 const Value *UO = getUnderlyingObject(Op->getValue());
309 if (!UO)
310 return false;
311 if (auto *Arg = dyn_cast<Argument>(UO))
312 return !Arg->hasPassPointeeByValueCopyAttr();
313 return isa<GlobalValue>(UO);
314 }
315 if (const PseudoSourceValue *PSV = Op->getPseudoValue())
316 return PSV->isJumpTable();
317 return false;
318 };
319 // Load/store operations may access the stack indirectly when we previously
320 // computed an address to a stack location.
321 if (StackAddressUsed && MI.mayLoadOrStore() &&
322 (MI.isCall() || MI.hasUnmodeledSideEffects() || MI.memoperands_empty() ||
323 !all_of(MI.memoperands(), IsKnownNonStackPtr)))
324 return true;
325
326 if (MI.getOpcode() == FrameSetupOpcode ||
327 MI.getOpcode() == FrameDestroyOpcode) {
328 LLVM_DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
329 return true;
330 }
331 const MachineFunction *MF = MI.getParent()->getParent();
333 for (const MachineOperand &MO : MI.operands()) {
334 bool UseOrDefCSR = false;
335 if (MO.isReg()) {
336 // Ignore instructions like DBG_VALUE which don't read/def the register.
337 if (!MO.isDef() && !MO.readsReg())
338 continue;
339 Register PhysReg = MO.getReg();
340 if (!PhysReg)
341 continue;
342 assert(PhysReg.isPhysical() && "Unallocated register?!");
343 // The stack pointer is not normally described as a callee-saved register
344 // in calling convention definitions, so we need to watch for it
345 // separately. An SP mentioned by a call instruction, we can ignore,
346 // though, as it's harmless and we do not want to effectively disable tail
347 // calls by forcing the restore point to post-dominate them.
348 // PPC's LR is also not normally described as a callee-saved register in
349 // calling convention definitions, so we need to watch for it, too. An LR
350 // mentioned implicitly by a return (or "branch to link register")
351 // instruction we can ignore, otherwise we may pessimize shrinkwrapping.
352 UseOrDefCSR =
353 (!MI.isCall() && PhysReg == SP) ||
354 RCI.getLastCalleeSavedAlias(PhysReg) ||
355 (!MI.isReturn() && TRI->isNonallocatableRegisterCalleeSave(PhysReg));
356 } else if (MO.isRegMask()) {
357 // Check if this regmask clobbers any of the CSRs.
358 for (unsigned Reg : getCurrentCSRs(RS)) {
359 if (MO.clobbersPhysReg(Reg)) {
360 UseOrDefCSR = true;
361 break;
362 }
363 }
364 }
365 // Skip FrameIndex operands in DBG_VALUE instructions.
366 if (UseOrDefCSR || (MO.isFI() && !MI.isDebugValue())) {
367 LLVM_DEBUG(dbgs() << "Use or define CSR(" << UseOrDefCSR << ") or FI("
368 << MO.isFI() << "): " << MI << '\n');
369 return true;
370 }
371 }
372 return false;
373}
374
375/// Helper function to find the immediate (post) dominator.
376template <typename ListOfBBs, typename DominanceAnalysis>
378 DominanceAnalysis &Dom, bool Strict = true) {
379 MachineBasicBlock *IDom = &Block;
380 for (MachineBasicBlock *BB : BBs) {
381 IDom = Dom.findNearestCommonDominator(IDom, BB);
382 if (!IDom)
383 break;
384 }
385 if (Strict && IDom == &Block)
386 return nullptr;
387 return IDom;
388}
389
391 MachineBasicBlock &Entry) {
392 // Check if the block is analyzable.
393 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
395 return !TII.analyzeBranch(Entry, TBB, FBB, Cond);
396}
397
398/// Determines if any predecessor of MBB is on the path from block that has use
399/// or def of CSRs/FI to MBB.
400/// ReachableByDirty: All blocks reachable from block that has use or def of
401/// CSR/FI.
402static bool
404 const MachineBasicBlock &MBB) {
405 for (const MachineBasicBlock *PredBB : MBB.predecessors())
406 if (ReachableByDirty.count(PredBB))
407 return true;
408 return false;
409}
410
411/// Derives the list of all the basic blocks reachable from MBB.
413 const MachineBasicBlock &MBB) {
415 MBB.succ_end());
416 Visited.insert(&MBB);
417 while (!Worklist.empty()) {
418 MachineBasicBlock *SuccMBB = Worklist.pop_back_val();
419 if (!Visited.insert(SuccMBB).second)
420 continue;
421 Worklist.append(SuccMBB->succ_begin(), SuccMBB->succ_end());
422 }
423}
424
425/// Collect blocks reachable by use or def of CSRs/FI.
428 DenseSet<const MachineBasicBlock *> &ReachableByDirty) {
429 for (const MachineBasicBlock *MBB : DirtyBBs) {
430 if (ReachableByDirty.count(MBB))
431 continue;
432 // Mark all offsprings as reachable.
433 markAllReachable(ReachableByDirty, *MBB);
434 }
435}
436
437/// \return true if there is a clean path from SavePoint to the original
438/// Restore.
439static bool
443 SmallVector<MachineBasicBlock *, 4> Worklist(CleanPreds.begin(),
444 CleanPreds.end());
445 while (!Worklist.empty()) {
446 MachineBasicBlock *CleanBB = Worklist.pop_back_val();
447 if (CleanBB == SavePoint)
448 return true;
449 if (!Visited.insert(CleanBB).second || !CleanBB->pred_size())
450 continue;
451 Worklist.append(CleanBB->pred_begin(), CleanBB->pred_end());
452 }
453 return false;
454}
455
456/// This function updates the branches post restore point split.
457///
458/// Restore point has been split.
459/// Old restore point: MBB
460/// New restore point: NMBB
461/// Any basic block(say BBToUpdate) which had a fallthrough to MBB
462/// previously should
463/// 1. Fallthrough to NMBB iff NMBB is inserted immediately above MBB in the
464/// block layout OR
465/// 2. Branch unconditionally to NMBB iff NMBB is inserted at any other place.
466static void updateTerminator(MachineBasicBlock *BBToUpdate,
467 MachineBasicBlock *NMBB,
468 const TargetInstrInfo *TII) {
469 DebugLoc DL = BBToUpdate->findBranchDebugLoc();
470 // if NMBB isn't the new layout successor for BBToUpdate, insert unconditional
471 // branch to it
472 if (!BBToUpdate->isLayoutSuccessor(NMBB))
473 TII->insertUnconditionalBranch(*BBToUpdate, NMBB, DL);
474}
475
476/// This function splits the restore point and returns new restore point/BB.
477///
478/// DirtyPreds: Predessors of \p MBB that are ReachableByDirty
479///
480/// Decision has been made to split the restore point.
481/// old restore point: \p MBB
482/// new restore point: \p NMBB
483/// This function makes the necessary block layout changes so that
484/// 1. \p NMBB points to \p MBB unconditionally
485/// 2. All dirtyPreds that previously pointed to \p MBB point to \p NMBB
486static MachineBasicBlock *
489 const TargetInstrInfo *TII) {
491
492 // get the list of DirtyPreds who have a fallthrough to MBB
493 // before the block layout change. This is just to ensure that if the NMBB is
494 // inserted after MBB, then we create unconditional branch from
495 // DirtyPred/CleanPred to NMBB
497 for (MachineBasicBlock *BB : DirtyPreds)
498 if (BB->getFallThrough(false) == MBB)
499 MBBFallthrough.insert(BB);
500
502 // Insert this block at the end of the function. Inserting in between may
503 // interfere with control flow optimizer decisions.
504 MF->insert(MF->end(), NMBB);
505
507 NMBB->addLiveIn(LI.PhysReg);
508
509 TII->insertUnconditionalBranch(*NMBB, MBB, DebugLoc());
510
511 // After splitting, all predecessors of the restore point should be dirty
512 // blocks.
513 for (MachineBasicBlock *SuccBB : DirtyPreds)
514 SuccBB->ReplaceUsesOfBlockWith(MBB, NMBB);
515
516 NMBB->addSuccessor(MBB);
517
518 for (MachineBasicBlock *BBToUpdate : MBBFallthrough)
519 updateTerminator(BBToUpdate, NMBB, TII);
520
521 return NMBB;
522}
523
524/// This function undoes the restore point split done earlier.
525///
526/// DirtyPreds: All predecessors of \p NMBB that are ReachableByDirty.
527///
528/// Restore point was split and the change needs to be unrolled. Make necessary
529/// changes to reset restore point from \p NMBB to \p MBB.
533 const TargetInstrInfo *TII) {
534 // For a BB, if NMBB is fallthrough in the current layout, then in the new
535 // layout a. BB should fallthrough to MBB OR b. BB should undconditionally
536 // branch to MBB
538 for (MachineBasicBlock *BB : DirtyPreds)
539 if (BB->getFallThrough(false) == NMBB)
540 NMBBFallthrough.insert(BB);
541
542 NMBB->removeSuccessor(MBB);
543 for (MachineBasicBlock *SuccBB : DirtyPreds)
544 SuccBB->ReplaceUsesOfBlockWith(NMBB, MBB);
545
546 NMBB->erase(NMBB->begin(), NMBB->end());
547 NMBB->eraseFromParent();
548
549 for (MachineBasicBlock *BBToUpdate : NMBBFallthrough)
550 updateTerminator(BBToUpdate, MBB, TII);
551}
552
553// A block is deemed fit for restore point split iff there exist
554// 1. DirtyPreds - preds of CurRestore reachable from use or def of CSR/FI
555// 2. CleanPreds - preds of CurRestore that arent DirtyPreds
556bool ShrinkWrap::checkIfRestoreSplittable(
557 const MachineBasicBlock *CurRestore,
558 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
561 const TargetInstrInfo *TII, RegScavenger *RS) {
562 for (const MachineInstr &MI : *CurRestore)
563 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true))
564 return false;
565
566 for (MachineBasicBlock *PredBB : CurRestore->predecessors()) {
567 if (!isAnalyzableBB(*TII, *PredBB))
568 return false;
569
570 if (ReachableByDirty.count(PredBB))
571 DirtyPreds.push_back(PredBB);
572 else
573 CleanPreds.push_back(PredBB);
574 }
575
576 return !(CleanPreds.empty() || DirtyPreds.empty());
577}
578
579bool ShrinkWrap::postShrinkWrapping(bool HasCandidate, MachineFunction &MF,
580 RegScavenger *RS) {
582 return false;
583
584 MachineBasicBlock *InitSave = nullptr;
585 MachineBasicBlock *InitRestore = nullptr;
586
587 if (HasCandidate) {
588 InitSave = Save;
589 InitRestore = Restore;
590 } else {
591 InitRestore = nullptr;
592 InitSave = &MF.front();
593 for (MachineBasicBlock &MBB : MF) {
594 if (MBB.isEHFuncletEntry())
595 return false;
596 if (MBB.isReturnBlock()) {
597 // Do not support multiple restore points.
598 if (InitRestore)
599 return false;
600 InitRestore = &MBB;
601 }
602 }
603 }
604
605 if (!InitSave || !InitRestore || InitRestore == InitSave ||
606 !MDT->dominates(InitSave, InitRestore) ||
607 !MPDT->dominates(InitRestore, InitSave))
608 return false;
609
610 // Bail out of the optimization if any of the basic block is target of
611 // INLINEASM_BR instruction
612 for (MachineBasicBlock &MBB : MF)
614 return false;
615
617 for (MachineBasicBlock &MBB : MF) {
618 if (MBB.isEHPad()) {
619 DirtyBBs.insert(&MBB);
620 continue;
621 }
622 for (const MachineInstr &MI : MBB)
623 if (useOrDefCSROrFI(MI, RS, /*StackAddressUsed=*/true)) {
624 DirtyBBs.insert(&MBB);
625 break;
626 }
627 }
628
629 // Find blocks reachable from the use or def of CSRs/FI.
631 collectBlocksReachableByDirty(DirtyBBs, ReachableByDirty);
632
633 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
636 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,
637 CleanPreds, TII, RS))
638 return false;
639
640 // Trying to reach out to the new save point which dominates all dirty blocks.
641 MachineBasicBlock *NewSave =
642 FindIDom<>(**DirtyPreds.begin(), DirtyPreds, *MDT, false);
643
644 while (NewSave && (hasDirtyPred(ReachableByDirty, *NewSave) ||
645 EntryFreq < MBFI->getBlockFreq(NewSave) ||
646 /*Entry freq has been observed more than a loop block in
647 some cases*/
648 MLI->getLoopFor(NewSave)))
649 NewSave = FindIDom<>(**NewSave->pred_begin(), NewSave->predecessors(), *MDT,
650 false);
651
652 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
653 if (!NewSave || NewSave == InitSave ||
654 isSaveReachableThroughClean(NewSave, CleanPreds) ||
655 !TFI->canUseAsPrologue(*NewSave))
656 return false;
657
658 // Now we know that splitting a restore point can isolate the restore point
659 // from clean blocks and doing so can shrink the save point.
660 MachineBasicBlock *NewRestore =
661 tryToSplitRestore(InitRestore, DirtyPreds, TII);
662
663 // Make sure if the new restore point is valid as an epilogue, depending on
664 // targets.
665 if (!TFI->canUseAsEpilogue(*NewRestore)) {
666 rollbackRestoreSplit(MF, NewRestore, InitRestore, DirtyPreds, TII);
667 return false;
668 }
669
670 Save = NewSave;
671 Restore = NewRestore;
672
673 MDT->runOnMachineFunction(MF);
674 MPDT->runOnMachineFunction(MF);
675
676 assert((MDT->dominates(Save, Restore) && MPDT->dominates(Restore, Save)) &&
677 "Incorrect save or restore point due to dominance relations");
678 assert((!MLI->getLoopFor(Save) && !MLI->getLoopFor(Restore)) &&
679 "Unexpected save or restore point in a loop");
680 assert((EntryFreq >= MBFI->getBlockFreq(Save) &&
681 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
682 "Incorrect save or restore point based on block frequency");
683 return true;
684}
685
686void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB,
687 RegScavenger *RS) {
688 // Get rid of the easy cases first.
689 if (!Save)
690 Save = &MBB;
691 else
692 Save = MDT->findNearestCommonDominator(Save, &MBB);
693 assert(Save);
694
695 if (!Restore)
696 Restore = &MBB;
697 else if (MPDT->getNode(&MBB)) // If the block is not in the post dom tree, it
698 // means the block never returns. If that's the
699 // case, we don't want to call
700 // `findNearestCommonDominator`, which will
701 // return `Restore`.
702 Restore = MPDT->findNearestCommonDominator(Restore, &MBB);
703 else
704 Restore = nullptr; // Abort, we can't find a restore point in this case.
705
706 // Make sure we would be able to insert the restore code before the
707 // terminator.
708 if (Restore == &MBB) {
709 for (const MachineInstr &Terminator : MBB.terminators()) {
710 if (!useOrDefCSROrFI(Terminator, RS, /*StackAddressUsed=*/true))
711 continue;
712 // One of the terminator needs to happen before the restore point.
713 if (MBB.succ_empty()) {
714 Restore = nullptr; // Abort, we can't find a restore point in this case.
715 break;
716 }
717 // Look for a restore point that post-dominates all the successors.
718 // The immediate post-dominator is what we are looking for.
719 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
720 break;
721 }
722 }
723
724 if (!Restore) {
726 dbgs() << "Restore point needs to be spanned on several blocks\n");
727 return;
728 }
729
730 // Make sure Save and Restore are suitable for shrink-wrapping:
731 // 1. all path from Save needs to lead to Restore before exiting.
732 // 2. all path to Restore needs to go through Save from Entry.
733 // We achieve that by making sure that:
734 // A. Save dominates Restore.
735 // B. Restore post-dominates Save.
736 // C. Save and Restore are in the same loop.
737 bool SaveDominatesRestore = false;
738 bool RestorePostDominatesSave = false;
739 while (Restore &&
740 (!(SaveDominatesRestore = MDT->dominates(Save, Restore)) ||
741 !(RestorePostDominatesSave = MPDT->dominates(Restore, Save)) ||
742 // Post-dominance is not enough in loops to ensure that all uses/defs
743 // are after the prologue and before the epilogue at runtime.
744 // E.g.,
745 // while(1) {
746 // Save
747 // Restore
748 // if (...)
749 // break;
750 // use/def CSRs
751 // }
752 // All the uses/defs of CSRs are dominated by Save and post-dominated
753 // by Restore. However, the CSRs uses are still reachable after
754 // Restore and before Save are executed.
755 //
756 // For now, just push the restore/save points outside of loops.
757 // FIXME: Refine the criteria to still find interesting cases
758 // for loops.
759 MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
760 // Fix (A).
761 if (!SaveDominatesRestore) {
762 Save = MDT->findNearestCommonDominator(Save, Restore);
763 continue;
764 }
765 // Fix (B).
766 if (!RestorePostDominatesSave)
767 Restore = MPDT->findNearestCommonDominator(Restore, Save);
768
769 // Fix (C).
770 if (Restore && (MLI->getLoopFor(Save) || MLI->getLoopFor(Restore))) {
771 if (MLI->getLoopDepth(Save) > MLI->getLoopDepth(Restore)) {
772 // Push Save outside of this loop if immediate dominator is different
773 // from save block. If immediate dominator is not different, bail out.
774 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
775 if (!Save)
776 break;
777 } else {
778 // If the loop does not exit, there is no point in looking
779 // for a post-dominator outside the loop.
781 MLI->getLoopFor(Restore)->getExitingBlocks(ExitBlocks);
782 // Push Restore outside of this loop.
783 // Look for the immediate post-dominator of the loop exits.
784 MachineBasicBlock *IPdom = Restore;
785 for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
786 IPdom = FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
787 if (!IPdom)
788 break;
789 }
790 // If the immediate post-dominator is not in a less nested loop,
791 // then we are stuck in a program with an infinite loop.
792 // In that case, we will not find a safe point, hence, bail out.
793 if (IPdom && MLI->getLoopDepth(IPdom) < MLI->getLoopDepth(Restore))
794 Restore = IPdom;
795 else {
796 Restore = nullptr;
797 break;
798 }
799 }
800 }
801 }
802}
803
805 StringRef RemarkName, StringRef RemarkMessage,
806 const DiagnosticLocation &Loc,
807 const MachineBasicBlock *MBB) {
808 ORE->emit([&]() {
809 return MachineOptimizationRemarkMissed(DEBUG_TYPE, RemarkName, Loc, MBB)
810 << RemarkMessage;
811 });
812
813 LLVM_DEBUG(dbgs() << RemarkMessage << '\n');
814 return false;
815}
816
817bool ShrinkWrap::performShrinkWrapping(
819 RegScavenger *RS) {
820 for (MachineBasicBlock *MBB : RPOT) {
821 LLVM_DEBUG(dbgs() << "Look into: " << printMBBReference(*MBB) << '\n');
822
823 if (MBB->isEHFuncletEntry())
824 return giveUpWithRemarks(ORE, "UnsupportedEHFunclets",
825 "EH Funclets are not supported yet.",
826 MBB->front().getDebugLoc(), MBB);
827
829 // Push the prologue and epilogue outside of the region that may throw (or
830 // jump out via inlineasm_br), by making sure that all the landing pads
831 // are at least at the boundary of the save and restore points. The
832 // problem is that a basic block can jump out from the middle in these
833 // cases, which we do not handle.
834 updateSaveRestorePoints(*MBB, RS);
835 if (!ArePointsInteresting()) {
836 LLVM_DEBUG(dbgs() << "EHPad/inlineasm_br prevents shrink-wrapping\n");
837 return false;
838 }
839 continue;
840 }
841
842 bool StackAddressUsed = false;
843 // Check if we found any stack accesses in the predecessors. We are not
844 // doing a full dataflow analysis here to keep things simple but just
845 // rely on a reverse portorder traversal (RPOT) to guarantee predecessors
846 // are already processed except for loops (and accept the conservative
847 // result for loops).
848 for (const MachineBasicBlock *Pred : MBB->predecessors()) {
849 if (StackAddressUsedBlockInfo.test(Pred->getNumber())) {
850 StackAddressUsed = true;
851 break;
852 }
853 }
854
855 for (const MachineInstr &MI : *MBB) {
856 if (useOrDefCSROrFI(MI, RS, StackAddressUsed)) {
857 // Save (resp. restore) point must dominate (resp. post dominate)
858 // MI. Look for the proper basic block for those.
859 updateSaveRestorePoints(*MBB, RS);
860 // If we are at a point where we cannot improve the placement of
861 // save/restore instructions, just give up.
862 if (!ArePointsInteresting()) {
863 LLVM_DEBUG(dbgs() << "No Shrink wrap candidate found\n");
864 return false;
865 }
866 // No need to look for other instructions, this basic block
867 // will already be part of the handled region.
868 StackAddressUsed = true;
869 break;
870 }
871 }
872 StackAddressUsedBlockInfo[MBB->getNumber()] = StackAddressUsed;
873 }
874 if (!ArePointsInteresting()) {
875 // If the points are not interesting at this point, then they must be null
876 // because it means we did not encounter any frame/CSR related code.
877 // Otherwise, we would have returned from the previous loop.
878 assert(!Save && !Restore && "We miss a shrink-wrap opportunity?!");
879 LLVM_DEBUG(dbgs() << "Nothing to shrink-wrap\n");
880 return false;
881 }
882
883 LLVM_DEBUG(dbgs() << "\n ** Results **\nFrequency of the Entry: "
884 << EntryFreq.getFrequency() << '\n');
885
886 const TargetFrameLowering *TFI =
887 MachineFunc->getSubtarget().getFrameLowering();
888 do {
889 LLVM_DEBUG(dbgs() << "Shrink wrap candidates (#, Name, Freq):\nSave: "
890 << printMBBReference(*Save) << ' '
891 << printBlockFreq(*MBFI, *Save)
892 << "\nRestore: " << printMBBReference(*Restore) << ' '
893 << printBlockFreq(*MBFI, *Restore) << '\n');
894
895 bool IsSaveCheap, TargetCanUseSaveAsPrologue = false;
896 if (((IsSaveCheap = EntryFreq >= MBFI->getBlockFreq(Save)) &&
897 EntryFreq >= MBFI->getBlockFreq(Restore)) &&
898 ((TargetCanUseSaveAsPrologue = TFI->canUseAsPrologue(*Save)) &&
899 TFI->canUseAsEpilogue(*Restore)))
900 break;
902 dbgs() << "New points are too expensive or invalid for the target\n");
903 MachineBasicBlock *NewBB;
904 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
905 Save = FindIDom<>(*Save, Save->predecessors(), *MDT);
906 if (!Save)
907 break;
908 NewBB = Save;
909 } else {
910 // Restore is expensive.
911 Restore = FindIDom<>(*Restore, Restore->successors(), *MPDT);
912 if (!Restore)
913 break;
914 NewBB = Restore;
915 }
916 updateSaveRestorePoints(*NewBB, RS);
917 } while (Save && Restore);
918
919 if (!ArePointsInteresting()) {
920 ++NumCandidatesDropped;
921 return false;
922 }
923 return true;
924}
925
926bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
927 if (skipFunction(MF.getFunction()) || MF.empty() || !isShrinkWrapEnabled(MF))
928 return false;
929
930 LLVM_DEBUG(dbgs() << "**** Analysing " << MF.getName() << '\n');
931
932 init(MF);
933
935 if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *MLI)) {
936 // If MF is irreducible, a block may be in a loop without
937 // MachineLoopInfo reporting it. I.e., we may use the
938 // post-dominance property in loops, which lead to incorrect
939 // results. Moreover, we may miss that the prologue and
940 // epilogue are not in the same loop, leading to unbalanced
941 // construction/deconstruction of the stack frame.
942 return giveUpWithRemarks(ORE, "UnsupportedIrreducibleCFG",
943 "Irreducible CFGs are not supported yet.",
944 MF.getFunction().getSubprogram(), &MF.front());
945 }
946
948 std::unique_ptr<RegScavenger> RS(
949 TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
950
951 bool Changed = false;
952
953 // Initially, conservatively assume that stack addresses can be used in each
954 // basic block and change the state only for those basic blocks for which we
955 // were able to prove the opposite.
956 StackAddressUsedBlockInfo.resize(MF.getNumBlockIDs(), true);
957 bool HasCandidate = performShrinkWrapping(RPOT, RS.get());
958 StackAddressUsedBlockInfo.clear();
959 Changed = postShrinkWrapping(HasCandidate, MF, RS.get());
960 if (!HasCandidate && !Changed)
961 return false;
962 if (!ArePointsInteresting())
963 return Changed;
964
965 LLVM_DEBUG(dbgs() << "Final shrink wrap candidates:\nSave: "
966 << printMBBReference(*Save) << ' '
967 << "\nRestore: " << printMBBReference(*Restore) << '\n');
968
969 MachineFrameInfo &MFI = MF.getFrameInfo();
970 MFI.setSavePoint(Save);
971 MFI.setRestorePoint(Restore);
972 ++NumCandidates;
973 return Changed;
974}
975
976bool ShrinkWrap::isShrinkWrapEnabled(const MachineFunction &MF) {
978
979 switch (EnableShrinkWrapOpt) {
980 case cl::BOU_UNSET:
981 return TFI->enableShrinkWrapping(MF) &&
982 // Windows with CFI has some limitations that make it impossible
983 // to use shrink-wrapping.
985 // Sanitizers look at the value of the stack at the location
986 // of the crash. Since a crash can happen anywhere, the
987 // frame must be lowered before anything else happen for the
988 // sanitizers to be able to get a correct stack frame.
989 !(MF.getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
990 MF.getFunction().hasFnAttribute(Attribute::SanitizeThread) ||
991 MF.getFunction().hasFnAttribute(Attribute::SanitizeMemory) ||
992 MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress));
993 // If EnableShrinkWrap is set, it takes precedence on whatever the
994 // target sets. The rational is that we assume we want to test
995 // something related to shrink-wrapping.
996 case cl::BOU_TRUE:
997 return true;
998 case cl::BOU_FALSE:
999 return false;
1000 }
1001 llvm_unreachable("Invalid shrink-wrapping state");
1002}
aarch64 promote const
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file contains the simple types necessary to represent the attributes associated with functions a...
This file implements the BitVector class.
#define LLVM_DEBUG(X)
Definition: Debug.h:101
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*-—===//
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:55
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:59
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:52
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
This file declares the machine register scavenger class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file implements a set that has insertion order iteration characteristics.
static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)
Derives the list of all the basic blocks reachable from MBB.
Definition: ShrinkWrap.cpp:412
static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)
This function updates the branches post restore point split.
Definition: ShrinkWrap.cpp:466
static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function splits the restore point and returns new restore point/BB.
Definition: ShrinkWrap.cpp:487
static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)
Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.
Definition: ShrinkWrap.cpp:403
static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)
Definition: ShrinkWrap.cpp:804
static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))
static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function undoes the restore point split done earlier.
Definition: ShrinkWrap.cpp:530
static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)
Definition: ShrinkWrap.cpp:390
static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)
Definition: ShrinkWrap.cpp:440
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
#define DEBUG_TYPE
Definition: ShrinkWrap.cpp:91
static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)
Collect blocks reachable by use or def of CSRs/FI.
Definition: ShrinkWrap.cpp:426
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)
Helper function to find the immediate (post) dominator.
Definition: ShrinkWrap.cpp:377
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
Definition: Statistic.h:167
This file describes how to lower LLVM code to machine code.
Represent the analysis usage information of a pass.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
iterator end() const
Definition: ArrayRef.h:154
iterator begin() const
Definition: ArrayRef.h:153
bool test(unsigned Idx) const
Definition: BitVector.h:461
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
Definition: BitVector.h:300
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:341
void clear()
clear - Removes all bits from the bitvector.
Definition: BitVector.h:335
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
Definition: BitVector.h:308
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
This class represents an Operation in the Expression.
A debug info location.
Definition: DebugLoc.h:33
Implements a dense probed hash-table based set.
Definition: DenseSet.h:271
DISubprogram * getSubprogram() const
Get the attached subprogram.
Definition: Metadata.cpp:1831
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.cpp:675
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:799
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
unsigned pred_size() const
bool isEHPad() const
Returns true if the block is a landing pad.
iterator_range< livein_iterator > liveins() const
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
iterator_range< iterator > terminators()
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
iterator_range< pred_iterator > predecessors()
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
BlockFrequency getEntryFreq() const
Divide a block's BlockFrequency::getFrequency() value by this value to obtain the entry block - relat...
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
MachineBasicBlock * findNearestCommonDominator(MachineBasicBlock *A, MachineBasicBlock *B)
findNearestCommonDominator - Find nearest common dominator basic block for basic block A and B.
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
bool runOnMachineFunction(MachineFunction &F) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
void setRestorePoint(MachineBasicBlock *NewRestore)
void setSavePoint(MachineBasicBlock *NewSave)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
virtual MachineFunctionProperties getRequiredProperties() const
Properties which a MachineFunction may have at a given point in time.
MachineFunctionProperties & set(Property P)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void insert(iterator MBBI, MachineBasicBlock *MBB)
Representation of each machine instruction.
Definition: MachineInstr.h:69
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:475
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
Return the innermost loop that BB lives in.
unsigned getLoopDepth(const MachineBasicBlock *BB) const
Return the loop nesting level of the specified block.
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
void emit(DiagnosticInfoOptimizationBase &OptDiag)
Emit an optimization remark.
Diagnostic information for missed-optimization remarks.
MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...
bool dominates(const MachineDomTreeNode *A, const MachineDomTreeNode *B) const
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
MachineBasicBlock * findNearestCommonDominator(MachineBasicBlock *A, MachineBasicBlock *B) const
MachineDomTreeNode * getNode(MachineBasicBlock *BB) const
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Pass interface - Implemented by all 'passes'.
Definition: Pass.h:94
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Special value supplied for machine level alias analysis.
MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const
getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg,...
void runOnMachineFunction(const MachineFunction &MF)
runOnFunction - Prepare to answer questions about MF.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
constexpr bool isPhysical() const
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:95
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:342
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
A SetVector that performs no allocations if smaller than a certain size.
Definition: SetVector.h:370
bool empty() const
Definition: SmallVector.h:94
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
Definition: SmallVector.h:696
void push_back(const T &Elt)
Definition: SmallVector.h:426
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
TargetInstrInfo - Interface to description of machine instruction set.
Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetFrameLowering * getFrameLowering() const
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
LLVM Value Representation.
Definition: Value.h:74
std::pair< iterator, bool > insert(const ValueT &V)
Definition: DenseSet.h:206
size_type count(const_arg_type_t< ValueT > V) const
Return 1 if the specified key is in the set, 0 otherwise.
Definition: DenseSet.h:97
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:450
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1722
const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=6)
This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:288
void initializeShrinkWrapPass(PassRegistry &)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
DWARFExpression::Operation Op
Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)
Print the block frequency Freq relative to the current functions entry frequency.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Pair of physical register and lane mask.