14 #ifndef LLVM_LIB_TARGET_SPARC_SPARCISELLOWERING_H 15 #define LLVM_LIB_TARGET_SPARC_SPARCISELLOWERING_H 59 bool useSoftFloat()
const override;
64 void computeKnownBitsForTargetNode(
const SDValue Op,
66 const APInt &DemandedElts,
68 unsigned Depth = 0)
const override;
74 const char *getTargetNodeName(
unsigned Opcode)
const override;
79 const char *constraint)
const override;
80 void LowerAsmOperandForConstraint(
SDValue Op,
81 std::string &Constraint,
82 std::vector<SDValue> &Ops,
87 if (ConstraintCode ==
"o")
92 std::pair<unsigned, const TargetRegisterClass *>
101 Register getRegisterByName(
const char* RegName,
EVT VT,
119 bool useLoadStackGuardNode()
const override;
120 void insertSSPDeclarations(
Module &M)
const override;
124 EVT VT)
const override;
178 const char *LibFuncName,
179 unsigned numArgs)
const;
207 void ReplaceNodeResults(
SDNode *N,
212 unsigned BROpcode)
const;
216 #endif // SPARC_ISELLOWERING_H
BUILTIN_OP_END - This must be the last enum value in this list.
A parsed version of the target data layout string in and methods for querying it. ...
This class represents lattice values for constants.
A Module instance is used to store all the information related to an LLVM module. ...
Function Alias Analysis Results
unsigned const TargetRegisterInfo * TRI
bool shouldInsertFencesForAtomic(const Instruction *I) const override
Whether AtomicExpandPass should automatically insert fences and reduce ordering for this atomic...
an instruction that atomically reads a memory location, combines it with another value, and then stores the result back.
AtomicExpansionKind
Enum that specifies what an atomic load/AtomicRMWInst is expanded to, if at all.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override
EVT is not used in-tree, but is used by out-of-tree target.
This contains information for each constraint that we are lowering.
virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const
This is an important class for using LLVM in a threaded context.
This is an important base class in LLVM.
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
bool ShouldShrinkFPConstant(EVT VT) const override
If true, then instruction selection should seek to shrink the FP constant of the specified type to a ...
std::vector< ArgListEntry > ArgListTy
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This structure contains all information that is necessary for lowering calls.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
Class for arbitrary precision integers.
Representation of each machine instruction.
unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override
unsigned getExceptionPointerRegister(const Constant *PersonalityFn) const override
If a physical register, this returns the register that receives the exception address on entry to an ...
unsigned getExceptionSelectorRegister(const Constant *PersonalityFn) const override
If a physical register, this returns the register that receives the exception typeid on entry to a la...
Primary interface to the complete machine description for the target machine.
StringRef - Represent a constant reference to a string, i.e.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
Wrapper class representing virtual and physical registers.
This file describes how to lower LLVM code to machine code.