LLVM 19.0.0git
Support.cpp
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1//===--------------------- Support.cpp --------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9///
10/// This file implements a few helper functions used by various pipeline
11/// components.
12///
13//===----------------------------------------------------------------------===//
14
15#include "llvm/MCA/Support.h"
16#include "llvm/MC/MCSchedule.h"
17#include <numeric>
18
19namespace llvm {
20namespace mca {
21
22#define DEBUG_TYPE "llvm-mca"
23
25 if (Denominator == RHS.Denominator)
26 Numerator += RHS.Numerator;
27 else {
28 // Create a common denominator for LHS and RHS by calculating the least
29 // common multiple from the GCD.
30 unsigned GCD = std::gcd(Denominator, RHS.Denominator);
31 unsigned LCM = (Denominator * RHS.Denominator) / GCD;
32 unsigned LHSNumerator = Numerator * (LCM / Denominator);
33 unsigned RHSNumerator = RHS.Numerator * (LCM / RHS.Denominator);
34 Numerator = LHSNumerator + RHSNumerator;
35 Denominator = LCM;
36 }
37 return *this;
38}
39
42 unsigned ProcResourceID = 0;
43
44 assert(Masks.size() == SM.getNumProcResourceKinds() &&
45 "Invalid number of elements");
46 // Resource at index 0 is the 'InvalidUnit'. Set an invalid mask for it.
47 Masks[0] = 0;
48
49 // Create a unique bitmask for every processor resource unit.
50 for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
52 if (Desc.SubUnitsIdxBegin)
53 continue;
54 Masks[I] = 1ULL << ProcResourceID;
55 ProcResourceID++;
56 }
57
58 // Create a unique bitmask for every processor resource group.
59 for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
61 if (!Desc.SubUnitsIdxBegin)
62 continue;
63 Masks[I] = 1ULL << ProcResourceID;
64 for (unsigned U = 0; U < Desc.NumUnits; ++U) {
65 uint64_t OtherMask = Masks[Desc.SubUnitsIdxBegin[U]];
66 Masks[I] |= OtherMask;
67 }
68 ProcResourceID++;
69 }
70
71#ifndef NDEBUG
72 LLVM_DEBUG(dbgs() << "\nProcessor resource masks:"
73 << "\n");
74 for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
76 LLVM_DEBUG(dbgs() << '[' << format_decimal(I,2) << "] " << " - "
77 << format_hex(Masks[I],16) << " - "
78 << Desc.Name << '\n');
79 }
80#endif
81}
82
83double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth,
84 unsigned NumMicroOps,
85 ArrayRef<unsigned> ProcResourceUsage) {
86 // The block throughput is bounded from above by the hardware dispatch
87 // throughput. That is because the DispatchWidth is an upper bound on the
88 // number of opcodes that can be part of a single dispatch group.
89 double Max = static_cast<double>(NumMicroOps) / DispatchWidth;
90
91 // The block throughput is also limited by the amount of hardware parallelism.
92 // The number of available resource units affects the resource pressure
93 // distribution, as well as how many blocks can be executed every cycle.
94 for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
95 unsigned ReleaseAtCycles = ProcResourceUsage[I];
96 if (!ReleaseAtCycles)
97 continue;
98
99 const MCProcResourceDesc &MCDesc = *SM.getProcResource(I);
100 double Throughput = static_cast<double>(ReleaseAtCycles) / MCDesc.NumUnits;
101 Max = std::max(Max, Throughput);
102 }
103
104 // The block reciprocal throughput is computed as the MAX of:
105 // - (NumMicroOps / DispatchWidth)
106 // - (NumUnits / ReleaseAtCycles) for every consumed processor resource.
107 return Max;
108}
109
110} // namespace mca
111} // namespace llvm
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define LLVM_DEBUG(X)
Definition: Debug.h:101
#define I(x, y, z)
Definition: MD5.cpp:58
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Value * RHS
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:307
This class represents the number of cycles per resource (fractions of cycles).
Definition: Support.h:51
ReleaseAtCycles & operator+=(const ReleaseAtCycles &RHS)
Definition: Support.cpp:24
Helper functions used by various pipeline components.
double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth, unsigned NumMicroOps, ArrayRef< unsigned > ProcResourceUsage)
Compute the reciprocal block throughput from a set of processor resource cycles.
Definition: Support.cpp:83
void computeProcResourceMasks(const MCSchedModel &SM, MutableArrayRef< uint64_t > Masks)
Populates vector Masks with processor resource masks.
Definition: Support.cpp:40
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
FormattedNumber format_decimal(int64_t N, unsigned Width)
format_decimal - Output N as a right justified, fixed-width decimal.
Definition: Format.h:212
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
FormattedNumber format_hex(uint64_t N, unsigned Width, bool Upper=false)
format_hex - Output N as a fixed width hexadecimal.
Definition: Format.h:187
Description of the encoding of one expression Op.
Define a kind of processor resource that will be modeled by the scheduler.
Definition: MCSchedule.h:31
Machine model for scheduling, bundling, and heuristics.
Definition: MCSchedule.h:253
unsigned getNumProcResourceKinds() const
Definition: MCSchedule.h:349
const MCProcResourceDesc * getProcResource(unsigned ProcResourceIdx) const
Definition: MCSchedule.h:353