LLVM  9.0.0svn
SystemZSubtarget.h
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1 //===-- SystemZSubtarget.h - SystemZ subtarget information -----*- C++ -*--===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the SystemZ specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
14 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
15 
16 #include "SystemZFrameLowering.h"
17 #include "SystemZISelLowering.h"
18 #include "SystemZInstrInfo.h"
19 #include "SystemZRegisterInfo.h"
21 #include "llvm/ADT/Triple.h"
23 #include "llvm/IR/DataLayout.h"
24 #include <string>
25 
26 #define GET_SUBTARGETINFO_HEADER
27 #include "SystemZGenSubtargetInfo.inc"
28 
29 namespace llvm {
30 class GlobalValue;
31 class StringRef;
32 
34  virtual void anchor();
35 protected:
53  bool HasVector;
65 
66 private:
67  Triple TargetTriple;
68  SystemZInstrInfo InstrInfo;
69  SystemZTargetLowering TLInfo;
71  SystemZFrameLowering FrameLowering;
72 
73  SystemZSubtarget &initializeSubtargetDependencies(StringRef CPU,
74  StringRef FS);
75 public:
76  SystemZSubtarget(const Triple &TT, const std::string &CPU,
77  const std::string &FS, const TargetMachine &TM);
78 
79  const TargetFrameLowering *getFrameLowering() const override {
80  return &FrameLowering;
81  }
82  const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; }
83  const SystemZRegisterInfo *getRegisterInfo() const override {
84  return &InstrInfo.getRegisterInfo();
85  }
86  const SystemZTargetLowering *getTargetLowering() const override {
87  return &TLInfo;
88  }
89  const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
90  return &TSInfo;
91  }
92 
93  // True if the subtarget should run MachineScheduler after aggressive
94  // coalescing. This currently replaces the SelectionDAG scheduler with the
95  // "source" order scheduler.
96  bool enableMachineScheduler() const override { return true; }
97 
98  // This is important for reducing register pressure in vector code.
99  bool useAA() const override { return true; }
100 
101  // Always enable the early if-conversion pass.
102  bool enableEarlyIfConversion() const override { return true; }
103 
104  // Enable tracking of subregister liveness in register allocator.
105  bool enableSubRegLiveness() const override;
106 
107  // Automatically generated by tblgen.
109 
110  // Return true if the target has the distinct-operands facility.
111  bool hasDistinctOps() const { return HasDistinctOps; }
112 
113  // Return true if the target has the load/store-on-condition facility.
114  bool hasLoadStoreOnCond() const { return HasLoadStoreOnCond; }
115 
116  // Return true if the target has the load/store-on-condition facility 2.
117  bool hasLoadStoreOnCond2() const { return HasLoadStoreOnCond2; }
118 
119  // Return true if the target has the high-word facility.
120  bool hasHighWord() const { return HasHighWord; }
121 
122  // Return true if the target has the floating-point extension facility.
123  bool hasFPExtension() const { return HasFPExtension; }
124 
125  // Return true if the target has the population-count facility.
126  bool hasPopulationCount() const { return HasPopulationCount; }
127 
128  // Return true if the target has the message-security-assist
129  // extension facility 3.
131 
132  // Return true if the target has the message-security-assist
133  // extension facility 4.
135 
136  // Return true if the target has the reset-reference-bits-multiple facility.
139  }
140 
141  // Return true if the target has the fast-serialization facility.
143 
144  // Return true if the target has interlocked-access facility 1.
146 
147  // Return true if the target has the miscellaneous-extensions facility.
150  }
151 
152  // Return true if the target has the execution-hint facility.
153  bool hasExecutionHint() const { return HasExecutionHint; }
154 
155  // Return true if the target has the load-and-trap facility.
156  bool hasLoadAndTrap() const { return HasLoadAndTrap; }
157 
158  // Return true if the target has the transactional-execution facility.
160 
161  // Return true if the target has the processor-assist facility.
162  bool hasProcessorAssist() const { return HasProcessorAssist; }
163 
164  // Return true if the target has the DFP zoned-conversion facility.
166 
167  // Return true if the target has the enhanced-DAT facility 2.
168  bool hasEnhancedDAT2() const { return HasEnhancedDAT2; }
169 
170  // Return true if the target has the load-and-zero-rightmost-byte facility.
173  }
174 
175  // Return true if the target has the message-security-assist
176  // extension facility 5.
178 
179  // Return true if the target has the DFP packed-conversion facility.
181 
182  // Return true if the target has the vector facility.
183  bool hasVector() const { return HasVector; }
184 
185  // Return true if the target has the miscellaneous-extensions facility 2.
188  }
189 
190  // Return true if the target has the guarded-storage facility.
191  bool hasGuardedStorage() const { return HasGuardedStorage; }
192 
193  // Return true if the target has the message-security-assist
194  // extension facility 7.
196 
197  // Return true if the target has the message-security-assist
198  // extension facility 8.
200 
201  // Return true if the target has the vector-enhancements facility 1.
203 
204  // Return true if the target has the vector-packed-decimal facility.
206 
207  // Return true if the target has the insert-reference-bits-multiple facility.
210  }
211 
212  // Return true if GV can be accessed using LARL for reloc model RM
213  // and code model CM.
214  bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const;
215 
216  bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
217 };
218 } // end namespace llvm
219 
220 #endif
const SystemZRegisterInfo & getRegisterInfo() const
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool hasResetReferenceBitsMultiple() const
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
Definition: Triple.h:618
bool hasFastSerialization() const
bool hasLoadStoreOnCond() const
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
bool useAA() const override
bool hasGuardedStorage() const
bool hasMiscellaneousExtensions2() const
bool hasMiscellaneousExtensions() const
bool hasInterlockedAccess1() const
bool enableMachineScheduler() const override
bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const
bool enableSubRegLiveness() const override
bool hasMessageSecurityAssist7() const
bool enableEarlyIfConversion() const override
bool hasDFPPackedConversion() const
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
bool hasVectorEnhancements1() const
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
const SystemZInstrInfo * getInstrInfo() const override
bool hasVectorPackedDecimal() const
const SystemZTargetLowering * getTargetLowering() const override
const TargetFrameLowering * getFrameLowering() const override
Information about stack frame layout on the target.
bool hasMessageSecurityAssist4() const
bool hasDFPZonedConversion() const
bool hasMessageSecurityAssist8() const
bool hasProcessorAssist() const
bool hasTransactionalExecution() const
bool hasInsertReferenceBitsMultiple() const
bool hasMessageSecurityAssist3() const
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
bool hasLoadAndZeroRightmostByte() const
bool hasMessageSecurityAssist5() const
bool hasLoadStoreOnCond2() const
bool hasPopulationCount() const
const SystemZRegisterInfo * getRegisterInfo() const override
SystemZSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM)