28using namespace PatternMatch;
30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
66 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
75 ScalarizationCost(ScalarizationCost) {
77 if (
const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
78 FMF = FPMO->getFastMathFlags();
91 : II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
92 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
97 :
RetTy(Ty), IID(Id) {
99 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
100 ParamTys.reserve(Arguments.size());
102 ParamTys.push_back(Arguments[
Idx]->
getType());
111 : II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
112 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
113 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
140 if (isa<SCEVCouldNotCompute>(EC))
142 if (
const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
143 if (ConstEC->getValue()->isZero())
164 bool NotAlways =
false;
183 if (
BranchInst *BI = dyn_cast<BranchInst>(TI)) {
184 if (!BI->isConditional())
204 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(
DL))) {}
209 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
212 TTIImpl = std::move(
RHS.TTIImpl);
217 return TTIImpl->getInliningThresholdMultiplier();
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
233 return TTIImpl->adjustInliningThreshold(CB);
238 return TTIImpl->getCallerAllocaCost(CB, AI);
242 return TTIImpl->getInlinerVectorBonusPercent();
256 "If pointers have same base address it has to be provided.");
263 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
272 "TTI should not produce negative costs!");
279 : TTIImpl->getPredictableBranchThreshold();
283 return TTIImpl->hasBranchDivergence(
F);
287 return TTIImpl->isSourceOfDivergence(V);
291 return TTIImpl->isAlwaysUniform(V);
295 unsigned ToAS)
const {
296 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
300 unsigned ToAS)
const {
301 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
305 return TTIImpl->getFlatAddressSpace();
310 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
314 unsigned ToAS)
const {
315 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
320 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
324 return TTIImpl->getAssumedAddrSpace(V);
328 return TTIImpl->isSingleThreaded();
331std::pair<const Value *, unsigned>
333 return TTIImpl->getPredicatedAddrSpace(V);
338 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
342 return TTIImpl->isLoweredToCall(
F);
348 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
353 return TTIImpl->preferPredicateOverEpilogue(TFI);
357 bool IVUpdateMayOverflow)
const {
358 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
361std::optional<Instruction *>
364 return TTIImpl->instCombineIntrinsic(IC, II);
369 bool &KnownBitsComputed)
const {
370 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
378 SimplifyAndSetOp)
const {
379 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
380 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
387 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
392 return TTIImpl->getPeelingPreferences(L, SE, PP);
396 return TTIImpl->isLegalAddImmediate(Imm);
400 return TTIImpl->isLegalAddScalableImmediate(Imm);
404 return TTIImpl->isLegalICmpImmediate(Imm);
409 bool HasBaseReg, int64_t Scale,
412 int64_t ScalableOffset)
const {
413 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
414 Scale, AddrSpace,
I, ScalableOffset);
419 return TTIImpl->isLSRCostLess(C1, C2);
423 return TTIImpl->isNumRegsMajorCostOfLSR();
427 return TTIImpl->shouldFoldTerminatingConditionAfterLSR();
431 return TTIImpl->isProfitableLSRChainElement(
I);
435 return TTIImpl->canMacroFuseCmp();
442 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
448 return TTIImpl->getPreferredAddressingMode(L, SE);
452 Align Alignment)
const {
453 return TTIImpl->isLegalMaskedStore(DataType, Alignment);
457 Align Alignment)
const {
458 return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
462 Align Alignment)
const {
463 return TTIImpl->isLegalNTStore(DataType, Alignment);
467 return TTIImpl->isLegalNTLoad(DataType, Alignment);
472 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
476 Align Alignment)
const {
477 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
481 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
483 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
487 Align Alignment)
const {
488 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
492 Align Alignment)
const {
493 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
497 Align Alignment)
const {
498 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
502 Align Alignment)
const {
503 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
507 Align Alignment)
const {
508 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
512 Align Alignment)
const {
513 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
517 return TTIImpl->enableOrderedReductions();
521 return TTIImpl->hasDivRemOp(DataType, IsSigned);
525 unsigned AddrSpace)
const {
526 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
530 return TTIImpl->prefersVectorizedAddressing();
535 int64_t Scale,
unsigned AddrSpace)
const {
537 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
538 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
543 return TTIImpl->LSRWithInstrQueries();
547 return TTIImpl->isTruncateFree(Ty1, Ty2);
551 return TTIImpl->isProfitableToHoist(
I);
557 return TTIImpl->isTypeLegal(Ty);
561 return TTIImpl->getRegUsageForType(Ty);
565 return TTIImpl->shouldBuildLookupTables();
570 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
574 return TTIImpl->shouldBuildRelLookupTables();
578 return TTIImpl->useColdCCForColdCall(
F);
584 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
591 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys,
CostKind);
595 return TTIImpl->supportsEfficientVectorElementLoadStore();
599 return TTIImpl->supportsTailCalls();
603 return TTIImpl->supportsTailCallFor(CB);
607 bool LoopHasReductions)
const {
608 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
613 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
617 return TTIImpl->enableSelectOptimize();
622 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
626 return TTIImpl->enableInterleavedAccessVectorization();
630 return TTIImpl->enableMaskedInterleavedAccessVectorization();
634 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
642 unsigned *
Fast)
const {
649 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
653 return TTIImpl->haveFastSqrt(Ty);
658 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
662 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
667 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
676 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
684 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
689 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
692 TTIImpl->getIntImmCostInst(Opcode,
Idx, Imm, Ty,
CostKind, Inst);
693 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
702 TTIImpl->getIntImmCostIntrin(IID,
Idx, Imm, Ty,
CostKind);
703 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
709 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
713 return TTIImpl->getNumberOfRegisters(ClassID);
718 return TTIImpl->getRegisterClassForType(
Vector, Ty);
722 return TTIImpl->getRegisterClassName(ClassID);
727 return TTIImpl->getRegisterBitWidth(K);
731 return TTIImpl->getMinVectorRegisterBitWidth();
735 return TTIImpl->getMaxVScale();
739 return TTIImpl->getVScaleForTuning();
743 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
748 return TTIImpl->shouldMaximizeVectorBandwidth(K);
752 bool IsScalable)
const {
753 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
757 unsigned Opcode)
const {
758 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
762 Type *ScalarValTy)
const {
763 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
767 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
768 return TTIImpl->shouldConsiderAddressTypePromotion(
769 I, AllowPromotionWithoutCommonHeader);
774 : TTIImpl->getCacheLineSize();
777std::optional<unsigned>
779 return TTIImpl->getCacheSize(Level);
782std::optional<unsigned>
784 return TTIImpl->getCacheAssociativity(Level);
789 : TTIImpl->getMinPageSize();
793 return TTIImpl->getPrefetchDistance();
797 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
798 unsigned NumPrefetches,
bool HasCall)
const {
799 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
800 NumPrefetches, HasCall);
804 return TTIImpl->getMaxPrefetchIterationsAhead();
808 return TTIImpl->enableWritePrefetching();
812 return TTIImpl->shouldPrefetchAddressSpace(AS);
816 return TTIImpl->getMaxInterleaveFactor(VF);
824 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
825 if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
826 if (CI->getValue().isPowerOf2())
828 else if (CI->getValue().isNegatedPowerOf2())
837 if (
const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
838 if (ShuffleInst->isZeroEltSplat())
845 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
849 if (
auto *CI = dyn_cast<ConstantInt>(
Splat)) {
850 if (CI->getValue().isPowerOf2())
852 else if (CI->getValue().isNegatedPowerOf2())
855 }
else if (
const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
856 bool AllPow2 =
true, AllNegPow2 =
true;
857 for (
unsigned I = 0, E = CDS->getNumElements();
I != E; ++
I) {
858 if (
auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(
I))) {
859 AllPow2 &= CI->getValue().isPowerOf2();
860 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
861 if (AllPow2 || AllNegPow2)
864 AllPow2 = AllNegPow2 =
false;
877 return {OpInfo, OpProps};
889 if (TLibInfo && Opcode == Instruction::FRem) {
900 TTIImpl->getArithmeticInstrCost(Opcode, Ty,
CostKind,
903 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
908 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
911 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
912 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
921 Index, SubTp, Args, CxtI);
922 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
931 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
932 unsigned GatScatOp) {
937 if (
I->getOpcode() == LdStOp)
950 switch (
I->getOpcode()) {
951 case Instruction::ZExt:
952 case Instruction::SExt:
953 case Instruction::FPExt:
954 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
955 Intrinsic::masked_load, Intrinsic::masked_gather);
956 case Instruction::Trunc:
957 case Instruction::FPTrunc:
959 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
960 Intrinsic::masked_store,
961 Intrinsic::masked_scatter);
973 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
974 "Opcode should reflect passed instruction.");
976 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
977 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
984 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy,
Index);
985 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
991 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
992 "Opcode should reflect passed instruction.");
994 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1001 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1002 "Opcode should reflect passed instruction.");
1004 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred,
CostKind,
I);
1005 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1016 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind,
Index, Op0, Op1);
1017 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1024 unsigned Index)
const {
1029 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1034 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1037 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1038 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1046 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1047 "Opcode should reflect passed instruction.");
1050 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1059 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1064 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1067 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
1069 "TTI should not produce negative costs!");
1074 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1077 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
1078 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1085 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1088 UseMaskForCond, UseMaskForGaps);
1089 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1097 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1106 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1111 return TTIImpl->getNumberOfParts(Tp);
1118 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1124 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1129 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1133 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1136 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1137 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1145 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1146 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1153 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1160 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty,
CostKind);
1165 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1170 return TTIImpl->getTgtMemIntrinsic(Inst,
Info);
1174 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1179 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1184 unsigned DestAddrSpace,
unsigned SrcAlign,
unsigned DestAlign,
1185 std::optional<uint32_t> AtomicElementSize)
const {
1186 return TTIImpl->getMemcpyLoopLoweringType(
Context,
Length, SrcAddrSpace,
1187 DestAddrSpace, SrcAlign, DestAlign,
1193 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1194 unsigned SrcAlign,
unsigned DestAlign,
1195 std::optional<uint32_t> AtomicCpySize)
const {
1196 TTIImpl->getMemcpyLoopResidualLoweringType(
1197 OpsOut,
Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1198 DestAlign, AtomicCpySize);
1203 return TTIImpl->areInlineCompatible(Caller, Callee);
1209 unsigned DefaultCallPenalty)
const {
1210 return TTIImpl->getInlineCallPenalty(
F, Call, DefaultCallPenalty);
1216 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1221 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1226 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1230 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1234 return TTIImpl->isLegalToVectorizeLoad(LI);
1238 return TTIImpl->isLegalToVectorizeStore(SI);
1242 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1243 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1248 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1249 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1255 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1259 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1264 unsigned ChainSizeInBytes,
1266 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1271 unsigned ChainSizeInBytes,
1273 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1278 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1283 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1287 return TTIImpl->preferEpilogueVectorization();
1292 return TTIImpl->getVPLegalizationStrategy(VPI);
1296 return TTIImpl->hasArmWideBranch(Thumb);
1300 return TTIImpl->getMaxNumArgs();
1304 return TTIImpl->shouldExpandReduction(II);
1308 return TTIImpl->getGISelRematGlobalCost();
1312 return TTIImpl->getMinTripCountTailFoldingThreshold();
1316 return TTIImpl->supportsScalableVectors();
1320 return TTIImpl->enableScalableVectorization();
1324 Align Alignment)
const {
1325 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1334 : TTICallback(
std::
move(TTICallback)) {}
1338 return TTICallback(
F);
1344 return Result(
F.getParent()->getDataLayout());
1349 "Target Transform Information",
false,
true)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
mir Rename Register Operands
Module.h This file contains the declarations for the Module class.
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
A container for analyses that lazily runs them and caches their results.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
LLVMContext & getContext() const
Get the context in which this basic block lives.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
param_iterator param_begin() const
param_iterator param_end() const
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
BlockT * getHeader() const
bool isLoopLatch(const BlockT *BB) const
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
static IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
void initializeTargetTransformInfoWrapperPassPass(PassRegistry &)
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.