LLVM 19.0.0git
X86ATTInstPrinter.h
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1//=- X86ATTInstPrinter.h - Convert X86 MCInst to assembly syntax --*- C++ -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class prints an X86 MCInst to AT&T style .s file syntax.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86ATTINSTPRINTER_H
14#define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86ATTINSTPRINTER_H
15
17
18namespace llvm {
19
21public:
23 const MCRegisterInfo &MRI)
24 : X86InstPrinterCommon(MAI, MII, MRI), HasCustomInstComment(false) {}
25
26 void printRegName(raw_ostream &OS, MCRegister Reg) const override;
27 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
28 const MCSubtargetInfo &STI, raw_ostream &OS) override;
30
31 // Autogenerated by tblgen, returns true if we successfully printed an
32 // alias.
35 unsigned OpIdx, unsigned PrintMethodIdx,
36 raw_ostream &O);
37
38 // Autogenerated by tblgen.
39 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
41 static const char *getRegisterName(MCRegister Reg);
42
43 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override;
44 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
45 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
46 void printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O);
47 void printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O);
48 void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &OS);
49 void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
50
51 void printbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
52 printMemReference(MI, OpNo, O);
53 }
54 void printwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
55 printMemReference(MI, OpNo, O);
56 }
57 void printdwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
58 printMemReference(MI, OpNo, O);
59 }
60 void printqwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
61 printMemReference(MI, OpNo, O);
62 }
63 void printxmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
64 printMemReference(MI, OpNo, O);
65 }
66 void printymmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
67 printMemReference(MI, OpNo, O);
68 }
69 void printzmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
70 printMemReference(MI, OpNo, O);
71 }
72 void printtbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
73 printMemReference(MI, OpNo, O);
74 }
75
76 void printSrcIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
77 printSrcIdx(MI, OpNo, O);
78 }
79 void printSrcIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
80 printSrcIdx(MI, OpNo, O);
81 }
82 void printSrcIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
83 printSrcIdx(MI, OpNo, O);
84 }
85 void printSrcIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
86 printSrcIdx(MI, OpNo, O);
87 }
88 void printDstIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
89 printDstIdx(MI, OpNo, O);
90 }
91 void printDstIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
92 printDstIdx(MI, OpNo, O);
93 }
94 void printDstIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
95 printDstIdx(MI, OpNo, O);
96 }
97 void printDstIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
98 printDstIdx(MI, OpNo, O);
99 }
100 void printMemOffs8(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
101 printMemOffset(MI, OpNo, O);
102 }
103 void printMemOffs16(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
104 printMemOffset(MI, OpNo, O);
105 }
106 void printMemOffs32(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
107 printMemOffset(MI, OpNo, O);
108 }
109 void printMemOffs64(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
110 printMemOffset(MI, OpNo, O);
111 }
112
113private:
114 bool HasCustomInstComment;
115};
116
117} // end namespace llvm
118
119#endif // LLVM_LIB_TARGET_X86_MCTARGETDESC_X86ATTINSTPRINTER_H
IRTranslator LLVM IR MI
unsigned Reg
raw_pwrite_stream & OS
This class represents an Operation in the Expression.
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
const MCInstrInfo & MII
Definition: MCInstPrinter.h:52
const MCRegisterInfo & MRI
Definition: MCInstPrinter.h:53
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:51
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:26
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:33
Generic base class for all target subtargets.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
void printMemOffs8(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printSrcIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O)
static const char * getRegisterName(MCRegister Reg)
void printSrcIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printMemOffs64(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printSrcIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &OS)
void printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O)
void printSTiRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS)
void printDstIdx8(const MCInst *MI, unsigned OpNo, raw_ostream &O)
bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS)
void printtbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printdwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printSrcIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printDstIdx64(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override
void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &OS)
void printqwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS)
void printMemOffs32(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printymmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
X86ATTInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
void printDstIdx32(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS)
void printCustomAliasOperand(const MCInst *MI, uint64_t Address, unsigned OpIdx, unsigned PrintMethodIdx, raw_ostream &O)
void printDstIdx16(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &OS) override
Print the specified MCInst to the specified raw_ostream.
std::pair< const char *, uint64_t > getMnemonic(const MCInst *MI) override
Returns a pair containing the mnemonic for MI and the number of bits left for further processing by p...
void printxmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printMemOffs16(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printbytemem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printRegName(raw_ostream &OS, MCRegister Reg) const override
Print the assembler register name.
void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &OS)
void printzmmwordmem(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O)
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18