LLVM 19.0.0git
Public Member Functions | Protected Attributes | List of all members
llvm::CombinerHelper Class Reference

#include "llvm/CodeGen/GlobalISel/CombinerHelper.h"

Inheritance diagram for llvm::CombinerHelper:
Inheritance graph
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Public Member Functions

 CombinerHelper (GISelChangeObserver &Observer, MachineIRBuilder &B, bool IsPreLegalize, GISelKnownBits *KB=nullptr, MachineDominatorTree *MDT=nullptr, const LegalizerInfo *LI=nullptr)
 
GISelKnownBitsgetKnownBits () const
 
MachineIRBuildergetBuilder () const
 
const TargetLoweringgetTargetLowering () const
 
bool isPreLegalize () const
 
bool isLegal (const LegalityQuery &Query) const
 
bool isLegalOrBeforeLegalizer (const LegalityQuery &Query) const
 
bool isConstantLegalOrBeforeLegalizer (const LLT Ty) const
 
void replaceRegWith (MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const
 MachineRegisterInfo::replaceRegWith() and inform the observer of the changes.
 
void replaceRegOpWith (MachineRegisterInfo &MRI, MachineOperand &FromRegOp, Register ToReg) const
 Replace a single register operand with a new register and inform the observer of the changes.
 
void replaceOpcodeWith (MachineInstr &FromMI, unsigned ToOpcode) const
 Replace the opcode in instruction with a new opcode and inform the observer of the changes.
 
const RegisterBankgetRegBank (Register Reg) const
 Get the register bank of Reg.
 
void setRegBank (Register Reg, const RegisterBank *RegBank)
 Set the register bank of Reg.
 
bool tryCombineCopy (MachineInstr &MI)
 If MI is COPY, try to combine it.
 
bool matchCombineCopy (MachineInstr &MI)
 
void applyCombineCopy (MachineInstr &MI)
 
bool isPredecessor (const MachineInstr &DefMI, const MachineInstr &UseMI)
 Returns true if DefMI precedes UseMI or they are the same instruction.
 
bool dominates (const MachineInstr &DefMI, const MachineInstr &UseMI)
 Returns true if DefMI dominates UseMI.
 
bool tryCombineExtendingLoads (MachineInstr &MI)
 If MI is extend that consumes the result of a load, try to combine it.
 
bool matchCombineExtendingLoads (MachineInstr &MI, PreferredTuple &MatchInfo)
 
void applyCombineExtendingLoads (MachineInstr &MI, PreferredTuple &MatchInfo)
 
bool matchCombineLoadWithAndMask (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match (and (load x), mask) -> zextload x.
 
bool matchCombineExtractedVectorLoad (MachineInstr &MI, BuildFnTy &MatchInfo)
 Combine a G_EXTRACT_VECTOR_ELT of a load into a narrowed load.
 
bool matchCombineIndexedLoadStore (MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo)
 
void applyCombineIndexedLoadStore (MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo)
 
bool matchSextTruncSextLoad (MachineInstr &MI)
 
void applySextTruncSextLoad (MachineInstr &MI)
 
bool matchSextInRegOfLoad (MachineInstr &MI, std::tuple< Register, unsigned > &MatchInfo)
 Match sext_inreg(load p), imm -> sextload p.
 
void applySextInRegOfLoad (MachineInstr &MI, std::tuple< Register, unsigned > &MatchInfo)
 
bool matchCombineDivRem (MachineInstr &MI, MachineInstr *&OtherMI)
 Try to combine G_[SU]DIV and G_[SU]REM into a single G_[SU]DIVREM when their source operands are identical.
 
void applyCombineDivRem (MachineInstr &MI, MachineInstr *&OtherMI)
 
bool matchOptBrCondByInvertingCond (MachineInstr &MI, MachineInstr *&BrCond)
 If a brcond's true block is not the fallthrough, make it so by inverting the condition and swapping operands.
 
void applyOptBrCondByInvertingCond (MachineInstr &MI, MachineInstr *&BrCond)
 
bool matchCombineConcatVectors (MachineInstr &MI, SmallVector< Register > &Ops)
 If MI is G_CONCAT_VECTORS, try to combine it.
 
void applyCombineConcatVectors (MachineInstr &MI, SmallVector< Register > &Ops)
 Replace MI with a flattened build_vector with Ops or an implicit_def if Ops is empty.
 
bool matchCombineShuffleConcat (MachineInstr &MI, SmallVector< Register > &Ops)
 
void applyCombineShuffleConcat (MachineInstr &MI, SmallVector< Register > &Ops)
 Replace MI with a flattened build_vector with Ops or an implicit_def if Ops is empty.
 
bool tryCombineShuffleVector (MachineInstr &MI)
 Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS.
 
bool matchCombineShuffleVector (MachineInstr &MI, SmallVectorImpl< Register > &Ops)
 Check if the G_SHUFFLE_VECTOR MI can be replaced by a concat_vectors.
 
void applyCombineShuffleVector (MachineInstr &MI, const ArrayRef< Register > Ops)
 Replace MI with a concat_vectors with Ops.
 
bool matchShuffleToExtract (MachineInstr &MI)
 
void applyShuffleToExtract (MachineInstr &MI)
 
bool tryCombineMemCpyFamily (MachineInstr &MI, unsigned MaxLen=0)
 Optimize memcpy intrinsics et al, e.g.
 
bool matchPtrAddImmedChain (MachineInstr &MI, PtrAddChain &MatchInfo)
 
void applyPtrAddImmedChain (MachineInstr &MI, PtrAddChain &MatchInfo)
 
bool matchShiftImmedChain (MachineInstr &MI, RegisterImmPair &MatchInfo)
 Fold (shift (shift base, x), y) -> (shift base (x+y))
 
void applyShiftImmedChain (MachineInstr &MI, RegisterImmPair &MatchInfo)
 
bool matchShiftOfShiftedLogic (MachineInstr &MI, ShiftOfShiftedLogic &MatchInfo)
 If we have a shift-by-constant of a bitwise logic op that itself has a shift-by-constant operand with identical opcode, we may be able to convert that into 2 independent shifts followed by the logic op.
 
void applyShiftOfShiftedLogic (MachineInstr &MI, ShiftOfShiftedLogic &MatchInfo)
 
bool matchCommuteShift (MachineInstr &MI, BuildFnTy &MatchInfo)
 
bool matchCombineMulToShl (MachineInstr &MI, unsigned &ShiftVal)
 Transform a multiply by a power-of-2 value to a left shift.
 
void applyCombineMulToShl (MachineInstr &MI, unsigned &ShiftVal)
 
bool matchCombineShlOfExtend (MachineInstr &MI, RegisterImmPair &MatchData)
 
void applyCombineShlOfExtend (MachineInstr &MI, const RegisterImmPair &MatchData)
 
bool matchCombineMergeUnmerge (MachineInstr &MI, Register &MatchInfo)
 Fold away a merge of an unmerge of the corresponding values.
 
bool matchCombineShiftToUnmerge (MachineInstr &MI, unsigned TargetShiftSize, unsigned &ShiftVal)
 Reduce a shift by a constant to an unmerge and a shift on a half sized type.
 
void applyCombineShiftToUnmerge (MachineInstr &MI, const unsigned &ShiftVal)
 
bool tryCombineShiftToUnmerge (MachineInstr &MI, unsigned TargetShiftAmount)
 
bool matchCombineUnmergeMergeToPlainValues (MachineInstr &MI, SmallVectorImpl< Register > &Operands)
 Transform <ty,...> G_UNMERGE(G_MERGE ty X, Y, Z) -> ty X, Y, Z.
 
void applyCombineUnmergeMergeToPlainValues (MachineInstr &MI, SmallVectorImpl< Register > &Operands)
 
bool matchCombineUnmergeConstant (MachineInstr &MI, SmallVectorImpl< APInt > &Csts)
 Transform G_UNMERGE Constant -> Constant1, Constant2, ...
 
void applyCombineUnmergeConstant (MachineInstr &MI, SmallVectorImpl< APInt > &Csts)
 
bool matchCombineUnmergeUndef (MachineInstr &MI, std::function< void(MachineIRBuilder &)> &MatchInfo)
 Transform G_UNMERGE G_IMPLICIT_DEF -> G_IMPLICIT_DEF, G_IMPLICIT_DEF, ...
 
bool matchCombineUnmergeWithDeadLanesToTrunc (MachineInstr &MI)
 Transform X, Y<dead> = G_UNMERGE Z -> X = G_TRUNC Z.
 
void applyCombineUnmergeWithDeadLanesToTrunc (MachineInstr &MI)
 
bool matchCombineUnmergeZExtToZExt (MachineInstr &MI)
 Transform X, Y = G_UNMERGE(G_ZEXT(Z)) -> X = G_ZEXT(Z); Y = G_CONSTANT 0.
 
void applyCombineUnmergeZExtToZExt (MachineInstr &MI)
 
void applyCombineConstantFoldFpUnary (MachineInstr &MI, const ConstantFP *Cst)
 Transform fp_instr(cst) to constant result of the fp operation.
 
bool matchCombineI2PToP2I (MachineInstr &MI, Register &Reg)
 Transform IntToPtr(PtrToInt(x)) to x if cast is in the same address space.
 
void applyCombineI2PToP2I (MachineInstr &MI, Register &Reg)
 
void applyCombineP2IToI2P (MachineInstr &MI, Register &Reg)
 Transform PtrToInt(IntToPtr(x)) to x.
 
bool matchCombineAddP2IToPtrAdd (MachineInstr &MI, std::pair< Register, bool > &PtrRegAndCommute)
 Transform G_ADD (G_PTRTOINT x), y -> G_PTRTOINT (G_PTR_ADD x, y) Transform G_ADD y, (G_PTRTOINT x) -> G_PTRTOINT (G_PTR_ADD x, y)
 
void applyCombineAddP2IToPtrAdd (MachineInstr &MI, std::pair< Register, bool > &PtrRegAndCommute)
 
bool matchCombineConstPtrAddToI2P (MachineInstr &MI, APInt &NewCst)
 
void applyCombineConstPtrAddToI2P (MachineInstr &MI, APInt &NewCst)
 
bool matchCombineAnyExtTrunc (MachineInstr &MI, Register &Reg)
 Transform anyext(trunc(x)) to x.
 
bool matchCombineZextTrunc (MachineInstr &MI, Register &Reg)
 Transform zext(trunc(x)) to x.
 
bool matchCombineExtOfExt (MachineInstr &MI, std::tuple< Register, unsigned > &MatchInfo)
 Transform [asz]ext([asz]ext(x)) to [asz]ext x.
 
void applyCombineExtOfExt (MachineInstr &MI, std::tuple< Register, unsigned > &MatchInfo)
 
bool matchCombineTruncOfExt (MachineInstr &MI, std::pair< Register, unsigned > &MatchInfo)
 Transform trunc ([asz]ext x) to x or ([asz]ext x) or (trunc x).
 
void applyCombineTruncOfExt (MachineInstr &MI, std::pair< Register, unsigned > &MatchInfo)
 
bool matchCombineTruncOfShift (MachineInstr &MI, std::pair< MachineInstr *, LLT > &MatchInfo)
 Transform trunc (shl x, K) to shl (trunc x), K if K < VT.getScalarSizeInBits().
 
void applyCombineTruncOfShift (MachineInstr &MI, std::pair< MachineInstr *, LLT > &MatchInfo)
 
bool matchAnyExplicitUseIsUndef (MachineInstr &MI)
 Return true if any explicit use operand on MI is defined by a G_IMPLICIT_DEF.
 
bool matchAllExplicitUsesAreUndef (MachineInstr &MI)
 Return true if all register explicit use operands on MI are defined by a G_IMPLICIT_DEF.
 
bool matchUndefShuffleVectorMask (MachineInstr &MI)
 Return true if a G_SHUFFLE_VECTOR instruction MI has an undef mask.
 
bool matchUndefStore (MachineInstr &MI)
 Return true if a G_STORE instruction MI is storing an undef value.
 
bool matchUndefSelectCmp (MachineInstr &MI)
 Return true if a G_SELECT instruction MI has an undef comparison.
 
bool matchInsertExtractVecEltOutOfBounds (MachineInstr &MI)
 Return true if a G_{EXTRACT,INSERT}_VECTOR_ELT has an out of range index.
 
bool matchConstantSelectCmp (MachineInstr &MI, unsigned &OpIdx)
 Return true if a G_SELECT instruction MI has a constant comparison.
 
void replaceInstWithFConstant (MachineInstr &MI, double C)
 Replace an instruction with a G_FCONSTANT with value C.
 
void replaceInstWithFConstant (MachineInstr &MI, ConstantFP *CFP)
 Replace an instruction with an G_FCONSTANT with value CFP.
 
void replaceInstWithConstant (MachineInstr &MI, int64_t C)
 Replace an instruction with a G_CONSTANT with value C.
 
void replaceInstWithConstant (MachineInstr &MI, APInt C)
 Replace an instruction with a G_CONSTANT with value C.
 
void replaceInstWithUndef (MachineInstr &MI)
 Replace an instruction with a G_IMPLICIT_DEF.
 
void replaceSingleDefInstWithOperand (MachineInstr &MI, unsigned OpIdx)
 Delete MI and replace all of its uses with its OpIdx-th operand.
 
void replaceSingleDefInstWithReg (MachineInstr &MI, Register Replacement)
 Delete MI and replace all of its uses with Replacement.
 
void applyFunnelShiftConstantModulo (MachineInstr &MI)
 Replaces the shift amount in MI with ShiftAmt % BW.
 
bool matchEqualDefs (const MachineOperand &MOP1, const MachineOperand &MOP2)
 Return true if MOP1 and MOP2 are register operands are defined by equivalent instructions.
 
bool matchConstantOp (const MachineOperand &MOP, int64_t C)
 Return true if MOP is defined by a G_CONSTANT or splat with a value equal to C.
 
bool matchConstantFPOp (const MachineOperand &MOP, double C)
 Return true if MOP is defined by a G_FCONSTANT or splat with a value exactly equal to C.
 
bool matchConstantLargerBitWidth (MachineInstr &MI, unsigned ConstIdx)
 Checks if constant at ConstIdx is larger than MI 's bitwidth.
 
bool matchSelectSameVal (MachineInstr &MI)
 Optimize (cond ? x : x) -> x.
 
bool matchBinOpSameVal (MachineInstr &MI)
 Optimize (x op x) -> x.
 
bool matchOperandIsZero (MachineInstr &MI, unsigned OpIdx)
 Check if operand OpIdx is zero.
 
bool matchOperandIsUndef (MachineInstr &MI, unsigned OpIdx)
 Check if operand OpIdx is undef.
 
bool matchOperandIsKnownToBeAPowerOfTwo (MachineInstr &MI, unsigned OpIdx)
 Check if operand OpIdx is known to be a power of 2.
 
void eraseInst (MachineInstr &MI)
 Erase MI.
 
bool matchSimplifyAddToSub (MachineInstr &MI, std::tuple< Register, Register > &MatchInfo)
 Return true if MI is a G_ADD which can be simplified to a G_SUB.
 
void applySimplifyAddToSub (MachineInstr &MI, std::tuple< Register, Register > &MatchInfo)
 
bool matchHoistLogicOpWithSameOpcodeHands (MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo)
 Match (logic_op (op x...), (op y...)) -> (op (logic_op x, y))
 
void applyBuildInstructionSteps (MachineInstr &MI, InstructionStepsMatchInfo &MatchInfo)
 Replace MI with a series of instructions described in MatchInfo.
 
bool matchAshrShlToSextInreg (MachineInstr &MI, std::tuple< Register, int64_t > &MatchInfo)
 Match ashr (shl x, C), C -> sext_inreg (C)
 
void applyAshShlToSextInreg (MachineInstr &MI, std::tuple< Register, int64_t > &MatchInfo)
 
bool matchOverlappingAnd (MachineInstr &MI, BuildFnTy &MatchInfo)
 Fold and(and(x, C1), C2) -> C1&C2 ? and(x, C1&C2) : 0.
 
bool matchRedundantAnd (MachineInstr &MI, Register &Replacement)
 
bool matchRedundantOr (MachineInstr &MI, Register &Replacement)
 
bool matchRedundantSExtInReg (MachineInstr &MI)
 
bool matchNotCmp (MachineInstr &MI, SmallVectorImpl< Register > &RegsToNegate)
 Combine inverting a result of a compare into the opposite cond code.
 
void applyNotCmp (MachineInstr &MI, SmallVectorImpl< Register > &RegsToNegate)
 
bool matchXorOfAndWithSameReg (MachineInstr &MI, std::pair< Register, Register > &MatchInfo)
 Fold (xor (and x, y), y) -> (and (not x), y) {.
 
void applyXorOfAndWithSameReg (MachineInstr &MI, std::pair< Register, Register > &MatchInfo)
 
bool matchPtrAddZero (MachineInstr &MI)
 }
 
void applyPtrAddZero (MachineInstr &MI)
 
void applySimplifyURemByPow2 (MachineInstr &MI)
 Combine G_UREM x, (known power of 2) to an add and bitmasking.
 
bool matchFoldBinOpIntoSelect (MachineInstr &MI, unsigned &SelectOpNo)
 Push a binary operator through a select on constants.
 
void applyFoldBinOpIntoSelect (MachineInstr &MI, const unsigned &SelectOpNo)
 SelectOperand is the operand in binary operator MI that is the select to fold.
 
bool matchCombineInsertVecElts (MachineInstr &MI, SmallVectorImpl< Register > &MatchInfo)
 
void applyCombineInsertVecElts (MachineInstr &MI, SmallVectorImpl< Register > &MatchInfo)
 
bool matchLoadOrCombine (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match expression trees of the form.
 
bool matchExtendThroughPhis (MachineInstr &MI, MachineInstr *&ExtMI)
 
void applyExtendThroughPhis (MachineInstr &MI, MachineInstr *&ExtMI)
 
bool matchExtractVecEltBuildVec (MachineInstr &MI, Register &Reg)
 
void applyExtractVecEltBuildVec (MachineInstr &MI, Register &Reg)
 
bool matchExtractAllEltsFromBuildVector (MachineInstr &MI, SmallVectorImpl< std::pair< Register, MachineInstr * > > &MatchInfo)
 
void applyExtractAllEltsFromBuildVector (MachineInstr &MI, SmallVectorImpl< std::pair< Register, MachineInstr * > > &MatchInfo)
 
void applyBuildFn (MachineInstr &MI, BuildFnTy &MatchInfo)
 Use a function which takes in a MachineIRBuilder to perform a combine.
 
void applyBuildFnNoErase (MachineInstr &MI, BuildFnTy &MatchInfo)
 Use a function which takes in a MachineIRBuilder to perform a combine.
 
void applyBuildFnMO (const MachineOperand &MO, BuildFnTy &MatchInfo)
 Use a function which takes in a MachineIRBuilder to perform a combine.
 
bool matchOrShiftToFunnelShift (MachineInstr &MI, BuildFnTy &MatchInfo)
 
bool matchFunnelShiftToRotate (MachineInstr &MI)
 Match an FSHL or FSHR that can be combined to a ROTR or ROTL rotate.
 
void applyFunnelShiftToRotate (MachineInstr &MI)
 
bool matchRotateOutOfRange (MachineInstr &MI)
 
void applyRotateOutOfRange (MachineInstr &MI)
 
bool matchICmpToTrueFalseKnownBits (MachineInstr &MI, int64_t &MatchInfo)
 
bool matchICmpToLHSKnownBits (MachineInstr &MI, BuildFnTy &MatchInfo)
 
bool matchAndOrDisjointMask (MachineInstr &MI, BuildFnTy &MatchInfo)
 
bool matchBitfieldExtractFromSExtInReg (MachineInstr &MI, BuildFnTy &MatchInfo)
 Form a G_SBFX from a G_SEXT_INREG fed by a right shift.
 
bool matchBitfieldExtractFromAnd (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match: and (lshr x, cst), mask -> ubfx x, cst, width.
 
bool matchBitfieldExtractFromShr (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match: shr (shl x, n), k -> sbfx/ubfx x, pos, width.
 
bool matchBitfieldExtractFromShrAnd (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match: shr (and x, n), k -> ubfx x, pos, width.
 
bool matchReassocConstantInnerRHS (GPtrAdd &MI, MachineInstr *RHS, BuildFnTy &MatchInfo)
 
bool matchReassocFoldConstantsInSubTree (GPtrAdd &MI, MachineInstr *LHS, MachineInstr *RHS, BuildFnTy &MatchInfo)
 
bool matchReassocConstantInnerLHS (GPtrAdd &MI, MachineInstr *LHS, MachineInstr *RHS, BuildFnTy &MatchInfo)
 
bool matchReassocPtrAdd (MachineInstr &MI, BuildFnTy &MatchInfo)
 Reassociate pointer calculations with G_ADD involved, to allow better addressing mode usage.
 
bool tryReassocBinOp (unsigned Opc, Register DstReg, Register Op0, Register Op1, BuildFnTy &MatchInfo)
 Try to reassociate to reassociate operands of a commutative binop.
 
bool matchReassocCommBinOp (MachineInstr &MI, BuildFnTy &MatchInfo)
 Reassociate commutative binary operations like G_ADD.
 
bool matchConstantFoldCastOp (MachineInstr &MI, APInt &MatchInfo)
 Do constant folding when opportunities are exposed after MIR building.
 
bool matchConstantFoldBinOp (MachineInstr &MI, APInt &MatchInfo)
 Do constant folding when opportunities are exposed after MIR building.
 
bool matchConstantFoldFPBinOp (MachineInstr &MI, ConstantFP *&MatchInfo)
 Do constant FP folding when opportunities are exposed after MIR building.
 
bool matchConstantFoldFMA (MachineInstr &MI, ConstantFP *&MatchInfo)
 Constant fold G_FMA/G_FMAD.
 
bool matchNarrowBinopFeedingAnd (MachineInstr &MI, BuildFnTy &MatchInfo)
 
MachineInstrbuildUDivUsingMul (MachineInstr &MI)
 Given an G_UDIV MI expressing a divide by constant, return an expression that implements it by multiplying by a magic number.
 
bool matchUDivByConst (MachineInstr &MI)
 Combine G_UDIV by constant into a multiply by magic constant.
 
void applyUDivByConst (MachineInstr &MI)
 
MachineInstrbuildSDivUsingMul (MachineInstr &MI)
 Given an G_SDIV MI expressing a signed divide by constant, return an expression that implements it by multiplying by a magic number.
 
bool matchSDivByConst (MachineInstr &MI)
 
void applySDivByConst (MachineInstr &MI)
 
bool matchDivByPow2 (MachineInstr &MI, bool IsSigned)
 Given an G_SDIV MI expressing a signed divided by a pow2 constant, return expressions that implements it by shifting.
 
void applySDivByPow2 (MachineInstr &MI)
 
void applyUDivByPow2 (MachineInstr &MI)
 Given an G_UDIV MI expressing an unsigned divided by a pow2 constant, return expressions that implements it by shifting.
 
bool matchUMulHToLShr (MachineInstr &MI)
 
void applyUMulHToLShr (MachineInstr &MI)
 
bool tryCombine (MachineInstr &MI)
 Try to transform MI by using all of the above combine functions.
 
bool tryEmitMemcpyInline (MachineInstr &MI)
 Emit loads and stores that perform the given memcpy.
 
bool matchMulOBy2 (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match: (G_UMULO x, 2) -> (G_UADDO x, x) (G_SMULO x, 2) -> (G_SADDO x, x)
 
bool matchMulOBy0 (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match: (G_*MULO x, 0) -> 0 + no carry out.
 
bool matchAddEToAddO (MachineInstr &MI, BuildFnTy &MatchInfo)
 Match: (G_*ADDE x, y, 0) -> (G_*ADDO x, y) (G_*SUBE x, y, 0) -> (G_*SUBO x, y)
 
bool matchRedundantNegOperands (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fadd x, fneg(y)) -> (fsub x, y) (fadd fneg(x), y) -> (fsub y, x) (fsub x, fneg(y)) -> (fadd x, y) (fmul fneg(x), fneg(y)) -> (fmul x, y) (fdiv fneg(x), fneg(y)) -> (fdiv x, y) (fmad fneg(x), fneg(y), z) -> (fmad x, y, z) (fma fneg(x), fneg(y), z) -> (fma x, y, z)
 
bool matchFsubToFneg (MachineInstr &MI, Register &MatchInfo)
 
void applyFsubToFneg (MachineInstr &MI, Register &MatchInfo)
 
bool canCombineFMadOrFMA (MachineInstr &MI, bool &AllowFusionGlobally, bool &HasFMAD, bool &Aggressive, bool CanReassociate=false)
 
bool matchCombineFAddFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fadd (fmul x, y), z) -> (fma x, y, z) (fadd (fmul x, y), z) -> (fmad x, y, z)
 
bool matchCombineFAddFpExtFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z) (fadd (fpext (fmul x, y)), z) -> (fmad (fpext x), (fpext y), z)
 
bool matchCombineFAddFMAFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z)) (fadd (fmad x, y, (fmul u, v)), z) -> (fmad x, y, (fmad u, v, z))
 
bool matchCombineFAddFpExtFMulToFMadOrFMAAggressive (MachineInstr &MI, BuildFnTy &MatchInfo)
 
bool matchCombineFSubFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fsub (fmul x, y), z) -> (fma x, y, -z) (fsub (fmul x, y), z) -> (fmad x, y, -z)
 
bool matchCombineFSubFNegFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z)) (fsub (fneg (fmul, x, y)), z) -> (fmad (fneg x), y, (fneg z))
 
bool matchCombineFSubFpExtFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z)) (fsub (fpext (fmul x, y)), z) -> (fmad (fpext x), (fpext y), (fneg z))
 
bool matchCombineFSubFpExtFNegFMulToFMadOrFMA (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z)) (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fmad (fpext x), (fpext y), z))
 
bool matchCombineFMinMaxNaN (MachineInstr &MI, unsigned &Info)
 
bool matchAddSubSameReg (MachineInstr &MI, Register &Src)
 Transform G_ADD(x, G_SUB(y, x)) to y.
 
bool matchBuildVectorIdentityFold (MachineInstr &MI, Register &MatchInfo)
 
bool matchTruncBuildVectorFold (MachineInstr &MI, Register &MatchInfo)
 
bool matchTruncLshrBuildVectorFold (MachineInstr &MI, Register &MatchInfo)
 
bool matchSubAddSameReg (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform: (x + y) - y -> x (x + y) - x -> y x - (y + x) -> 0 - y x - (x + z) -> 0 - z.
 
bool matchSimplifySelectToMinMax (MachineInstr &MI, BuildFnTy &MatchInfo)
 
bool matchRedundantBinOpInEquality (MachineInstr &MI, BuildFnTy &MatchInfo)
 Transform: (X + Y) == X -> Y == 0 (X - Y) == X -> Y == 0 (X ^ Y) == X -> Y == 0 (X + Y) != X -> Y != 0 (X - Y) != X -> Y != 0 (X ^ Y) != X -> Y != 0.
 
bool matchShiftsTooBig (MachineInstr &MI)
 Match shifts greater or equal to the bitwidth of the operation.
 
bool matchCommuteConstantToRHS (MachineInstr &MI)
 Match constant LHS ops that should be commuted.
 
bool matchCommuteFPConstantToRHS (MachineInstr &MI)
 Match constant LHS FP ops that should be commuted.
 
void applyCommuteBinOpOperands (MachineInstr &MI)
 
bool matchSelect (MachineInstr &MI, BuildFnTy &MatchInfo)
 Combine selects.
 
bool matchAnd (MachineInstr &MI, BuildFnTy &MatchInfo)
 Combine ands.
 
bool matchOr (MachineInstr &MI, BuildFnTy &MatchInfo)
 Combine ors.
 
bool matchAddOverflow (MachineInstr &MI, BuildFnTy &MatchInfo)
 Combine addos.
 
bool matchExtractVectorElement (MachineInstr &MI, BuildFnTy &MatchInfo)
 Combine extract vector element.
 
bool matchExtractVectorElementWithFreeze (const MachineOperand &MO, BuildFnTy &MatchInfo)
 Combine extract vector element with freeze on the vector register.
 
bool matchExtractVectorElementWithBuildVector (const MachineOperand &MO, BuildFnTy &MatchInfo)
 Combine extract vector element with a build vector on the vector register.
 
bool matchExtractVectorElementWithBuildVectorTrunc (const MachineOperand &MO, BuildFnTy &MatchInfo)
 Combine extract vector element with a build vector trunc on the vector register.
 
bool matchExtractVectorElementWithDifferentIndices (const MachineOperand &MO, BuildFnTy &MatchInfo)
 Combine extract vector element with a insert vector element on the vector register and different indices.
 

Protected Attributes

MachineIRBuilderBuilder
 
MachineRegisterInfoMRI
 
GISelChangeObserverObserver
 
GISelKnownBitsKB
 
MachineDominatorTreeMDT
 
bool IsPreLegalize
 
const LegalizerInfoLI
 
const RegisterBankInfoRBI
 
const TargetRegisterInfoTRI
 

Detailed Description

Definition at line 103 of file CombinerHelper.h.

Constructor & Destructor Documentation

◆ CombinerHelper()

CombinerHelper::CombinerHelper ( GISelChangeObserver Observer,
MachineIRBuilder B,
bool  IsPreLegalize,
GISelKnownBits KB = nullptr,
MachineDominatorTree MDT = nullptr,
const LegalizerInfo LI = nullptr 
)

Definition at line 56 of file CombinerHelper.cpp.

Member Function Documentation

◆ applyAshShlToSextInreg()

void CombinerHelper::applyAshShlToSextInreg ( MachineInstr MI,
std::tuple< Register, int64_t > &  MatchInfo 
)

◆ applyBuildFn()

void CombinerHelper::applyBuildFn ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Use a function which takes in a MachineIRBuilder to perform a combine.

By default, it erases the instruction MI from the function.

Definition at line 4134 of file CombinerHelper.cpp.

References applyBuildFnNoErase(), and MI.

◆ applyBuildFnMO()

void CombinerHelper::applyBuildFnMO ( const MachineOperand MO,
BuildFnTy MatchInfo 
)

Use a function which takes in a MachineIRBuilder to perform a combine.

By default, it erases the instruction MI from the function.

Definition at line 4140 of file CombinerHelper.cpp.

References Builder, llvm::MachineInstr::eraseFromParent(), llvm::getDefIgnoringCopies(), llvm::MachineOperand::getReg(), MRI, and llvm::MachineIRBuilder::setInstrAndDebugLoc().

◆ applyBuildFnNoErase()

void CombinerHelper::applyBuildFnNoErase ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Use a function which takes in a MachineIRBuilder to perform a combine.

This variant does not erase MI after calling the build function.

Definition at line 4148 of file CombinerHelper.cpp.

References Builder.

Referenced by applyBuildFn().

◆ applyBuildInstructionSteps()

void CombinerHelper::applyBuildInstructionSteps ( MachineInstr MI,
InstructionStepsMatchInfo MatchInfo 
)

Replace MI with a series of instructions described in MatchInfo.

Definition at line 3129 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildInstr(), llvm::InstructionStepsMatchInfo::InstrsToBuild, and MI.

◆ applyCombineAddP2IToPtrAdd()

void CombinerHelper::applyCombineAddP2IToPtrAdd ( MachineInstr MI,
std::pair< Register, bool > &  PtrRegAndCommute 
)

◆ applyCombineConcatVectors()

void CombinerHelper::applyCombineConcatVectors ( MachineInstr MI,
SmallVector< Register > &  Ops 
)

◆ applyCombineConstantFoldFpUnary()

void CombinerHelper::applyCombineConstantFoldFpUnary ( MachineInstr MI,
const ConstantFP Cst 
)

Transform fp_instr(cst) to constant result of the fp operation.

Definition at line 1626 of file CombinerHelper.cpp.

References Builder, llvm::MachineIRBuilder::buildFConstant(), constantFoldFpUnary(), llvm::MachineIRBuilder::getContext(), llvm::ConstantFP::getValue(), MI, and MRI.

◆ applyCombineConstPtrAddToI2P()

void CombinerHelper::applyCombineConstPtrAddToI2P ( MachineInstr MI,
APInt NewCst 
)

Definition at line 2429 of file CombinerHelper.cpp.

References llvm::MachineIRBuilder::buildConstant(), Builder, and MI.

◆ applyCombineCopy()

void CombinerHelper::applyCombineCopy ( MachineInstr MI)

Definition at line 219 of file CombinerHelper.cpp.

References MI, MRI, and replaceRegWith().

Referenced by tryCombineCopy().

◆ applyCombineDivRem()

void CombinerHelper::applyCombineDivRem ( MachineInstr MI,
MachineInstr *&  OtherMI 
)

◆ applyCombineExtendingLoads()

void CombinerHelper::applyCombineExtendingLoads ( MachineInstr MI,
PreferredTuple MatchInfo 
)

◆ applyCombineExtOfExt()

void CombinerHelper::applyCombineExtOfExt ( MachineInstr MI,
std::tuple< Register, unsigned > &  MatchInfo 
)

◆ applyCombineI2PToP2I()

void CombinerHelper::applyCombineI2PToP2I ( MachineInstr MI,
Register Reg 
)

Definition at line 2351 of file CombinerHelper.cpp.

References assert(), llvm::MachineIRBuilder::buildCopy(), Builder, and MI.

◆ applyCombineIndexedLoadStore()

void CombinerHelper::applyCombineIndexedLoadStore ( MachineInstr MI,
IndexedLoadStoreMatchInfo MatchInfo 
)

◆ applyCombineInsertVecElts()

void CombinerHelper::applyCombineInsertVecElts ( MachineInstr MI,
SmallVectorImpl< Register > &  MatchInfo 
)

◆ applyCombineMulToShl()

void CombinerHelper::applyCombineMulToShl ( MachineInstr MI,
unsigned ShiftVal 
)

◆ applyCombineP2IToI2P()

void CombinerHelper::applyCombineP2IToI2P ( MachineInstr MI,
Register Reg 
)

Transform PtrToInt(IntToPtr(x)) to x.

Definition at line 2358 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildZExtOrTrunc(), and MI.

◆ applyCombineShiftToUnmerge()

void CombinerHelper::applyCombineShiftToUnmerge ( MachineInstr MI,
const unsigned ShiftVal 
)

◆ applyCombineShlOfExtend()

void CombinerHelper::applyCombineShlOfExtend ( MachineInstr MI,
const RegisterImmPair MatchData 
)

◆ applyCombineShuffleConcat()

void CombinerHelper::applyCombineShuffleConcat ( MachineInstr MI,
SmallVector< Register > &  Ops 
)

◆ applyCombineShuffleVector()

void CombinerHelper::applyCombineShuffleVector ( MachineInstr MI,
const ArrayRef< Register Ops 
)

◆ applyCombineTruncOfExt()

void CombinerHelper::applyCombineTruncOfExt ( MachineInstr MI,
std::pair< Register, unsigned > &  MatchInfo 
)

◆ applyCombineTruncOfShift()

void CombinerHelper::applyCombineTruncOfShift ( MachineInstr MI,
std::pair< MachineInstr *, LLT > &  MatchInfo 
)

◆ applyCombineUnmergeConstant()

void CombinerHelper::applyCombineUnmergeConstant ( MachineInstr MI,
SmallVectorImpl< APInt > &  Csts 
)

◆ applyCombineUnmergeMergeToPlainValues()

void CombinerHelper::applyCombineUnmergeMergeToPlainValues ( MachineInstr MI,
SmallVectorImpl< Register > &  Operands 
)

◆ applyCombineUnmergeWithDeadLanesToTrunc()

void CombinerHelper::applyCombineUnmergeWithDeadLanesToTrunc ( MachineInstr MI)

Definition at line 2169 of file CombinerHelper.cpp.

References Builder, llvm::MachineIRBuilder::buildTrunc(), and MI.

◆ applyCombineUnmergeZExtToZExt()

void CombinerHelper::applyCombineUnmergeZExtToZExt ( MachineInstr MI)

◆ applyCommuteBinOpOperands()

void CombinerHelper::applyCommuteBinOpOperands ( MachineInstr MI)

◆ applyExtendThroughPhis()

void CombinerHelper::applyExtendThroughPhis ( MachineInstr MI,
MachineInstr *&  ExtMI 
)

◆ applyExtractAllEltsFromBuildVector()

void CombinerHelper::applyExtractAllEltsFromBuildVector ( MachineInstr MI,
SmallVectorImpl< std::pair< Register, MachineInstr * > > &  MatchInfo 
)

Definition at line 4122 of file CombinerHelper.cpp.

References assert(), MI, MRI, and replaceRegWith().

◆ applyExtractVecEltBuildVec()

void CombinerHelper::applyExtractVecEltBuildVec ( MachineInstr MI,
Register Reg 
)

◆ applyFoldBinOpIntoSelect()

void CombinerHelper::applyFoldBinOpIntoSelect ( MachineInstr MI,
const unsigned SelectOpNo 
)

SelectOperand is the operand in binary operator MI that is the select to fold.

Definition at line 3549 of file CombinerHelper.cpp.

References Builder, llvm::MachineIRBuilder::buildInstr(), llvm::MachineIRBuilder::buildSelect(), getReg(), llvm::MachineRegisterInfo::getType(), llvm::MachineRegisterInfo::getVRegDef(), LHS, MI, MRI, RHS, and Select.

◆ applyFsubToFneg()

void CombinerHelper::applyFsubToFneg ( MachineInstr MI,
Register MatchInfo 
)

◆ applyFunnelShiftConstantModulo()

void CombinerHelper::applyFunnelShiftConstantModulo ( MachineInstr MI)

◆ applyFunnelShiftToRotate()

void CombinerHelper::applyFunnelShiftToRotate ( MachineInstr MI)

◆ applyNotCmp()

void CombinerHelper::applyNotCmp ( MachineInstr MI,
SmallVectorImpl< Register > &  RegsToNegate 
)

◆ applyOptBrCondByInvertingCond()

void CombinerHelper::applyOptBrCondByInvertingCond ( MachineInstr MI,
MachineInstr *&  BrCond 
)

◆ applyPtrAddImmedChain()

void CombinerHelper::applyPtrAddImmedChain ( MachineInstr MI,
PtrAddChain MatchInfo 
)

◆ applyPtrAddZero()

void CombinerHelper::applyPtrAddZero ( MachineInstr MI)

Definition at line 3475 of file CombinerHelper.cpp.

References Builder, llvm::MachineIRBuilder::buildIntToPtr(), and MI.

◆ applyRotateOutOfRange()

void CombinerHelper::applyRotateOutOfRange ( MachineInstr MI)

◆ applySDivByConst()

void CombinerHelper::applySDivByConst ( MachineInstr MI)

Definition at line 5238 of file CombinerHelper.cpp.

References buildSDivUsingMul(), MI, and replaceSingleDefInstWithReg().

◆ applySDivByPow2()

void CombinerHelper::applySDivByPow2 ( MachineInstr MI)

◆ applySextInRegOfLoad()

void CombinerHelper::applySextInRegOfLoad ( MachineInstr MI,
std::tuple< Register, unsigned > &  MatchInfo 
)

◆ applySextTruncSextLoad()

void CombinerHelper::applySextTruncSextLoad ( MachineInstr MI)

Definition at line 950 of file CombinerHelper.cpp.

References assert(), llvm::MachineIRBuilder::buildCopy(), Builder, and MI.

◆ applyShiftImmedChain()

void CombinerHelper::applyShiftImmedChain ( MachineInstr MI,
RegisterImmPair MatchInfo 
)

◆ applyShiftOfShiftedLogic()

void CombinerHelper::applyShiftOfShiftedLogic ( MachineInstr MI,
ShiftOfShiftedLogic MatchInfo 
)

◆ applyShuffleToExtract()

void CombinerHelper::applyShuffleToExtract ( MachineInstr MI)

◆ applySimplifyAddToSub()

void CombinerHelper::applySimplifyAddToSub ( MachineInstr MI,
std::tuple< Register, Register > &  MatchInfo 
)

Definition at line 3029 of file CombinerHelper.cpp.

References Builder, llvm::MachineIRBuilder::buildSub(), and MI.

◆ applySimplifyURemByPow2()

void CombinerHelper::applySimplifyURemByPow2 ( MachineInstr MI)

Combine G_UREM x, (known power of 2) to an add and bitmasking.

The second source operand is known to be a power of 2.

Definition at line 3482 of file CombinerHelper.cpp.

References llvm::Add, llvm::MachineIRBuilder::buildAdd(), llvm::MachineIRBuilder::buildAnd(), llvm::MachineIRBuilder::buildConstant(), Builder, llvm::MachineRegisterInfo::getType(), MI, and MRI.

◆ applyUDivByConst()

void CombinerHelper::applyUDivByConst ( MachineInstr MI)

Definition at line 5204 of file CombinerHelper.cpp.

References buildUDivUsingMul(), MI, and replaceSingleDefInstWithReg().

◆ applyUDivByPow2()

void CombinerHelper::applyUDivByPow2 ( MachineInstr MI)

Given an G_UDIV MI expressing an unsigned divided by a pow2 constant, return expressions that implements it by shifting.

Definition at line 5380 of file CombinerHelper.cpp.

References assert(), llvm::MachineIRBuilder::buildCTTZ(), Builder, llvm::MachineIRBuilder::buildLShr(), llvm::TargetLoweringBase::getPreferredShiftAmountTy(), getTargetLowering(), llvm::MachineRegisterInfo::getType(), LHS, MI, MRI, and RHS.

◆ applyUMulHToLShr()

void CombinerHelper::applyUMulHToLShr ( MachineInstr MI)

◆ applyXorOfAndWithSameReg()

void CombinerHelper::applyXorOfAndWithSameReg ( MachineInstr MI,
std::pair< Register, Register > &  MatchInfo 
)

◆ buildSDivUsingMul()

MachineInstr * CombinerHelper::buildSDivUsingMul ( MachineInstr MI)

◆ buildUDivUsingMul()

MachineInstr * CombinerHelper::buildUDivUsingMul ( MachineInstr MI)

◆ canCombineFMadOrFMA()

bool CombinerHelper::canCombineFMadOrFMA ( MachineInstr MI,
bool AllowFusionGlobally,
bool HasFMAD,
bool Aggressive,
bool  CanReassociate = false 
)

◆ dominates()

bool CombinerHelper::dominates ( const MachineInstr DefMI,
const MachineInstr UseMI 
)

Returns true if DefMI dominates UseMI.

By definition an instruction dominates itself.

If we haven't been provided with a MachineDominatorTree during construction, this function returns a conservative result that tracks just a single basic block.

Definition at line 911 of file CombinerHelper.cpp.

References assert(), DefMI, llvm::MachineDominatorTree::dominates(), isPredecessor(), MDT, and UseMI.

Referenced by applyCombineDivRem().

◆ eraseInst()

void CombinerHelper::eraseInst ( MachineInstr MI)

Erase MI.

Definition at line 2710 of file CombinerHelper.cpp.

References MI.

Referenced by applyCombineTruncOfShift(), and applyFsubToFneg().

◆ getBuilder()

MachineIRBuilder & llvm::CombinerHelper::getBuilder ( ) const
inline

Definition at line 126 of file CombinerHelper.h.

References Builder.

◆ getKnownBits()

GISelKnownBits * llvm::CombinerHelper::getKnownBits ( ) const
inline

Definition at line 122 of file CombinerHelper.h.

References KB.

◆ getRegBank()

const RegisterBank * CombinerHelper::getRegBank ( Register  Reg) const

Get the register bank of Reg.

If Reg has not been assigned a register, a register class, or a register bank, then this returns nullptr.

Precondition
Reg.isValid()

Definition at line 196 of file CombinerHelper.cpp.

References llvm::RegisterBankInfo::getRegBank(), MRI, RBI, and TRI.

Referenced by matchPtrAddImmedChain().

◆ getTargetLowering()

const TargetLowering & CombinerHelper::getTargetLowering ( ) const

◆ isConstantLegalOrBeforeLegalizer()

bool CombinerHelper::isConstantLegalOrBeforeLegalizer ( const LLT  Ty) const
Returns
true if the combine is running prior to legalization, or if Ty is a legal integer constant type on the target.

Definition at line 153 of file CombinerHelper.cpp.

References llvm::LLT::getElementType(), isLegal(), isLegalOrBeforeLegalizer(), isPreLegalize(), and llvm::LLT::isVector().

Referenced by matchAddOverflow(), and matchMulOBy0().

◆ isLegal()

bool CombinerHelper::isLegal ( const LegalityQuery Query) const
Returns
true if Query is legal on the target.

Definition at line 143 of file CombinerHelper.cpp.

References llvm::LegalizeActionStep::Action, assert(), llvm::LegalizerInfo::getAction(), llvm::LegalizeActions::Legal, and LI.

Referenced by isConstantLegalOrBeforeLegalizer(), and isLegalOrBeforeLegalizer().

◆ isLegalOrBeforeLegalizer()

bool CombinerHelper::isLegalOrBeforeLegalizer ( const LegalityQuery Query) const

◆ isPredecessor()

bool CombinerHelper::isPredecessor ( const MachineInstr DefMI,
const MachineInstr UseMI 
)

Returns true if DefMI precedes UseMI or they are the same instruction.

Both must be in the same basic block.

Definition at line 895 of file CombinerHelper.cpp.

References assert(), DefMI, llvm::MachineBasicBlock::end(), llvm::find_if(), llvm_unreachable, MBB, MI, and UseMI.

Referenced by dominates().

◆ isPreLegalize()

bool CombinerHelper::isPreLegalize ( ) const
Returns
true if the combiner is running pre-legalization.

Definition at line 141 of file CombinerHelper.cpp.

References IsPreLegalize.

Referenced by canCombineFMadOrFMA(), isConstantLegalOrBeforeLegalizer(), isLegalOrBeforeLegalizer(), matchCombineExtendingLoads(), and matchCommuteShift().

◆ matchAddEToAddO()

bool CombinerHelper::matchAddEToAddO ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Match: (G_*ADDE x, y, 0) -> (G_*ADDO x, y) (G_*SUBE x, y, 0) -> (G_*SUBO x, y)

Definition at line 4984 of file CombinerHelper.cpp.

References assert(), B, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::MIPatternMatch::m_SpecificICstOrSplat(), MI, llvm::MIPatternMatch::mi_match(), MRI, and Observer.

◆ matchAddOverflow()

bool CombinerHelper::matchAddOverflow ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchAddSubSameReg()

bool CombinerHelper::matchAddSubSameReg ( MachineInstr MI,
Register Src 
)

Transform G_ADD(x, G_SUB(y, x)) to y.

Transform G_ADD(G_SUB(y, x), x) to y.

Definition at line 6087 of file CombinerHelper.cpp.

References assert(), LHS, llvm::MIPatternMatch::m_GSub(), llvm::MIPatternMatch::m_Reg(), MI, llvm::MIPatternMatch::mi_match(), MRI, and RHS.

◆ matchAllExplicitUsesAreUndef()

bool CombinerHelper::matchAllExplicitUsesAreUndef ( MachineInstr MI)

Return true if all register explicit use operands on MI are defined by a G_IMPLICIT_DEF.

Definition at line 2662 of file CombinerHelper.cpp.

References llvm::all_of(), and MI.

◆ matchAnd()

bool CombinerHelper::matchAnd ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Combine ands.

Definition at line 7058 of file CombinerHelper.cpp.

References MI.

◆ matchAndOrDisjointMask()

bool CombinerHelper::matchAndOrDisjointMask ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchAnyExplicitUseIsUndef()

bool CombinerHelper::matchAnyExplicitUseIsUndef ( MachineInstr MI)

Return true if any explicit use operand on MI is defined by a G_IMPLICIT_DEF.

Definition at line 2655 of file CombinerHelper.cpp.

References llvm::any_of(), and MI.

◆ matchAshrShlToSextInreg()

bool CombinerHelper::matchAshrShlToSextInreg ( MachineInstr MI,
std::tuple< Register, int64_t > &  MatchInfo 
)

◆ matchBinOpSameVal()

bool CombinerHelper::matchBinOpSameVal ( MachineInstr MI)

Optimize (x op x) -> x.

Definition at line 2893 of file CombinerHelper.cpp.

References llvm::canReplaceReg(), matchEqualDefs(), MI, and MRI.

◆ matchBitfieldExtractFromAnd()

bool CombinerHelper::matchBitfieldExtractFromAnd ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Match: and (lshr x, cst), mask -> ubfx x, cst, width.

Form a G_UBFX from "(a srl b) & mask", where b and mask are constants.

Definition at line 4420 of file CombinerHelper.cpp.

References assert(), llvm::TargetLoweringBase::getPreferredShiftAmountTy(), getTargetLowering(), llvm::MachineRegisterInfo::getType(), llvm::LegalizerInfo::isLegalOrCustom(), LI, MI, and MRI.

◆ matchBitfieldExtractFromSExtInReg()

bool CombinerHelper::matchBitfieldExtractFromSExtInReg ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchBitfieldExtractFromShr()

bool CombinerHelper::matchBitfieldExtractFromShr ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchBitfieldExtractFromShrAnd()

bool CombinerHelper::matchBitfieldExtractFromShrAnd ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchBuildVectorIdentityFold()

bool CombinerHelper::matchBuildVectorIdentityFold ( MachineInstr MI,
Register MatchInfo 
)

◆ matchCombineAddP2IToPtrAdd()

bool CombinerHelper::matchCombineAddP2IToPtrAdd ( MachineInstr MI,
std::pair< Register, bool > &  PtrRegAndCommute 
)

Transform G_ADD (G_PTRTOINT x), y -> G_PTRTOINT (G_PTR_ADD x, y) Transform G_ADD y, (G_PTRTOINT x) -> G_PTRTOINT (G_PTR_ADD x, y)

Definition at line 2365 of file CombinerHelper.cpp.

References assert(), llvm::LLT::getScalarSizeInBits(), llvm::MachineRegisterInfo::getType(), LHS, llvm::MIPatternMatch::m_GPtrToInt(), llvm::MIPatternMatch::m_Reg(), MI, llvm::MIPatternMatch::mi_match(), MRI, and RHS.

◆ matchCombineAnyExtTrunc()

bool CombinerHelper::matchCombineAnyExtTrunc ( MachineInstr MI,
Register Reg 
)

◆ matchCombineConcatVectors()

bool CombinerHelper::matchCombineConcatVectors ( MachineInstr MI,
SmallVector< Register > &  Ops 
)

If MI is G_CONCAT_VECTORS, try to combine it.

Returns true if MI changed. Right now, we support:

  • concat_vector(undef, undef) => undef
  • concat_vector(build_vector(A, B), build_vector(C, D)) =>

build_vector(A, B, C, D)

Check if the G_CONCAT_VECTORS MI is undef or if it can be flattened into a build_vector. In the first case Ops will be empty In the second case Ops will contain the operands needed to produce the flattened build_vector.

Precondition
MI.getOpcode() == G_CONCAT_VECTORS.

Definition at line 226 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildUndef(), llvm::SmallVectorImpl< T >::clear(), llvm::LLT::getNumElements(), llvm::LLT::getScalarType(), llvm::MachineRegisterInfo::getType(), llvm::MachineRegisterInfo::getVRegDef(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), isLegalOrBeforeLegalizer(), MI, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::MachineIRBuilder::setInsertPt().

◆ matchCombineConstPtrAddToI2P()

bool CombinerHelper::matchCombineConstPtrAddToI2P ( MachineInstr MI,
APInt NewCst 
)

◆ matchCombineCopy()

bool CombinerHelper::matchCombineCopy ( MachineInstr MI)

Definition at line 212 of file CombinerHelper.cpp.

References llvm::canReplaceReg(), MI, and MRI.

Referenced by tryCombineCopy().

◆ matchCombineDivRem()

bool CombinerHelper::matchCombineDivRem ( MachineInstr MI,
MachineInstr *&  OtherMI 
)

Try to combine G_[SU]DIV and G_[SU]REM into a single G_[SU]DIVREM when their source operands are identical.

Definition at line 1410 of file CombinerHelper.cpp.

References llvm::MachineRegisterInfo::getType(), isLegalOrBeforeLegalizer(), llvm_unreachable, matchEqualDefs(), MI, MRI, llvm::MachineRegisterInfo::use_nodbg_instructions(), and UseMI.

◆ matchCombineExtendingLoads()

bool CombinerHelper::matchCombineExtendingLoads ( MachineInstr MI,
PreferredTuple MatchInfo 
)

◆ matchCombineExtOfExt()

bool CombinerHelper::matchCombineExtOfExt ( MachineInstr MI,
std::tuple< Register, unsigned > &  MatchInfo 
)

◆ matchCombineExtractedVectorLoad()

bool CombinerHelper::matchCombineExtractedVectorLoad ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineFAddFMAFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineFAddFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFAddFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Transform (fadd (fmul x, y), z) -> (fma x, y, z) (fadd (fmul x, y), z) -> (fmad x, y, z)

Definition at line 5552 of file CombinerHelper.cpp.

References llvm::Aggressive, assert(), B, canCombineFMadOrFMA(), llvm::MachineRegisterInfo::getVRegDef(), hasMoreUses(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), isContractableFMul(), LHS, MI, MRI, RHS, and std::swap().

◆ matchCombineFAddFpExtFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineFAddFpExtFMulToFMadOrFMAAggressive()

bool CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMAAggressive ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineFMinMaxNaN()

bool CombinerHelper::matchCombineFMinMaxNaN ( MachineInstr MI,
unsigned Info 
)

◆ matchCombineFSubFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFSubFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Transform (fsub (fmul x, y), z) -> (fma x, y, -z) (fsub (fmul x, y), z) -> (fmad x, y, -z)

Definition at line 5850 of file CombinerHelper.cpp.

References llvm::Aggressive, assert(), B, canCombineFMadOrFMA(), getReg(), llvm::MachineRegisterInfo::getType(), llvm::MachineRegisterInfo::getVRegDef(), hasMoreUses(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), isContractableFMul(), LHS, MI, MRI, and RHS.

◆ matchCombineFSubFNegFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFSubFNegFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineFSubFpExtFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFSubFpExtFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z)) (fsub (fpext (fmul x, y)), z) -> (fmad (fpext x), (fpext y), (fneg z))

Definition at line 5949 of file CombinerHelper.cpp.

References llvm::Aggressive, assert(), B, canCombineFMadOrFMA(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), getReg(), llvm::MachineRegisterInfo::getType(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), isContractableFMul(), llvm::MIPatternMatch::m_GFPExt(), llvm::MIPatternMatch::m_MInstr(), MI, llvm::MIPatternMatch::mi_match(), and MRI.

◆ matchCombineFSubFpExtFNegFMulToFMadOrFMA()

bool CombinerHelper::matchCombineFSubFpExtFNegFMulToFMadOrFMA ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineI2PToP2I()

bool CombinerHelper::matchCombineI2PToP2I ( MachineInstr MI,
Register Reg 
)

◆ matchCombineIndexedLoadStore()

bool CombinerHelper::matchCombineIndexedLoadStore ( MachineInstr MI,
IndexedLoadStoreMatchInfo MatchInfo 
)

◆ matchCombineInsertVecElts()

bool CombinerHelper::matchCombineInsertVecElts ( MachineInstr MI,
SmallVectorImpl< Register > &  MatchInfo 
)

◆ matchCombineLoadWithAndMask()

bool CombinerHelper::matchCombineLoadWithAndMask ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchCombineMergeUnmerge()

bool CombinerHelper::matchCombineMergeUnmerge ( MachineInstr MI,
Register MatchInfo 
)

Fold away a merge of an unmerge of the corresponding values.

Definition at line 2019 of file CombinerHelper.cpp.

References llvm::SmallVectorImpl< T >::emplace_back(), I, Merge, MI, MRI, and llvm::SmallVectorBase< Size_T >::size().

◆ matchCombineMulToShl()

bool CombinerHelper::matchCombineMulToShl ( MachineInstr MI,
unsigned ShiftVal 
)

Transform a multiply by a power-of-2 value to a left shift.

Definition at line 1941 of file CombinerHelper.cpp.

References assert(), llvm::getIConstantVRegValWithLookThrough(), MI, and MRI.

◆ matchCombineShiftToUnmerge()

bool CombinerHelper::matchCombineShiftToUnmerge ( MachineInstr MI,
unsigned  TargetShiftSize,
unsigned ShiftVal 
)

Reduce a shift by a constant to an unmerge and a shift on a half sized type.

This will not produce a shift smaller than TargetShiftSize.

Definition at line 2234 of file CombinerHelper.cpp.

References assert(), llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isVector(), MI, MRI, and Size.

Referenced by tryCombineShiftToUnmerge().

◆ matchCombineShlOfExtend()

bool CombinerHelper::matchCombineShlOfExtend ( MachineInstr MI,
RegisterImmPair MatchData 
)

◆ matchCombineShuffleConcat()

bool CombinerHelper::matchCombineShuffleConcat ( MachineInstr MI,
SmallVector< Register > &  Ops 
)

◆ matchCombineShuffleVector()

bool CombinerHelper::matchCombineShuffleVector ( MachineInstr MI,
SmallVectorImpl< Register > &  Ops 
)

Check if the G_SHUFFLE_VECTOR MI can be replaced by a concat_vectors.

Ops will contain the operands needed to produce the flattened concat_vectors.

Precondition
MI.getOpcode() == G_SHUFFLE_VECTOR.

Definition at line 392 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildUndef(), llvm::LLT::getNumElements(), llvm::MachineInstrBuilder::getReg(), llvm::MachineRegisterInfo::getType(), Idx, llvm::LLT::isVector(), MI, MRI, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::MachineIRBuilder::setInsertPt().

Referenced by tryCombineShuffleVector().

◆ matchCombineTruncOfExt()

bool CombinerHelper::matchCombineTruncOfExt ( MachineInstr MI,
std::pair< Register, unsigned > &  MatchInfo 
)

Transform trunc ([asz]ext x) to x or ([asz]ext x) or (trunc x).

Definition at line 2518 of file CombinerHelper.cpp.

References assert(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getVRegDef(), MI, and MRI.

◆ matchCombineTruncOfShift()

bool CombinerHelper::matchCombineTruncOfShift ( MachineInstr MI,
std::pair< MachineInstr *, LLT > &  MatchInfo 
)

Transform trunc (shl x, K) to shl (trunc x), K if K < VT.getScalarSizeInBits().

Transforms trunc ([al]shr x, K) to (trunc ([al]shr (MidVT (trunc x)), K)) if K <= (MidVT.getScalarSizeInBits() - VT.getScalarSizeInBits()) MidVT is obtained by finding a legal type between the trunc's src and dst types.

Definition at line 2569 of file CombinerHelper.cpp.

References assert(), llvm::getDefIgnoringCopies(), llvm::GISelKnownBits::getKnownBits(), llvm::KnownBits::getMaxValue(), getMidVTForTruncRightShiftCombine(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::LLT::getScalarSizeInBits(), getTargetLowering(), llvm::MachineRegisterInfo::getType(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), isLegalOrBeforeLegalizer(), KB, MI, MRI, llvm::APInt::uge(), llvm::APInt::ugt(), and llvm::MachineRegisterInfo::use_instructions().

◆ matchCombineUnmergeConstant()

bool CombinerHelper::matchCombineUnmergeConstant ( MachineInstr MI,
SmallVectorImpl< APInt > &  Csts 
)

◆ matchCombineUnmergeMergeToPlainValues()

bool CombinerHelper::matchCombineUnmergeMergeToPlainValues ( MachineInstr MI,
SmallVectorImpl< Register > &  Operands 
)

Transform <ty,...> G_UNMERGE(G_MERGE ty X, Y, Z) -> ty X, Y, Z.

Definition at line 2046 of file CombinerHelper.cpp.

References assert(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), Idx, MI, MRI, Operands, and peekThroughBitcast().

◆ matchCombineUnmergeUndef()

bool CombinerHelper::matchCombineUnmergeUndef ( MachineInstr MI,
std::function< void(MachineIRBuilder &)> &  MatchInfo 
)

Transform G_UNMERGE G_IMPLICIT_DEF -> G_IMPLICIT_DEF, G_IMPLICIT_DEF, ...

Definition at line 2141 of file CombinerHelper.cpp.

References B, llvm::MachineRegisterInfo::getVRegDef(), Idx, MI, and MRI.

◆ matchCombineUnmergeWithDeadLanesToTrunc()

bool CombinerHelper::matchCombineUnmergeWithDeadLanesToTrunc ( MachineInstr MI)

Transform X, Y<dead> = G_UNMERGE Z -> X = G_TRUNC Z.

Definition at line 2155 of file CombinerHelper.cpp.

References assert(), llvm::MachineRegisterInfo::getType(), Idx, llvm::LLT::isVector(), MI, MRI, and llvm::MachineRegisterInfo::use_nodbg_empty().

◆ matchCombineUnmergeZExtToZExt()

bool CombinerHelper::matchCombineUnmergeZExtToZExt ( MachineInstr MI)

◆ matchCombineZextTrunc()

bool CombinerHelper::matchCombineZextTrunc ( MachineInstr MI,
Register Reg 
)

◆ matchCommuteConstantToRHS()

bool CombinerHelper::matchCommuteConstantToRHS ( MachineInstr MI)

Match constant LHS ops that should be commuted.

Definition at line 6348 of file CombinerHelper.cpp.

References llvm::getIConstantVRegVal(), llvm::MachineInstr::getOpcode(), llvm::MachineRegisterInfo::getVRegDef(), LHS, MI, MRI, and RHS.

◆ matchCommuteFPConstantToRHS()

bool CombinerHelper::matchCommuteFPConstantToRHS ( MachineInstr MI)

Match constant LHS FP ops that should be commuted.

Definition at line 6378 of file CombinerHelper.cpp.

References LHS, llvm::MIPatternMatch::m_GFCstOrSplat(), MI, llvm::MIPatternMatch::mi_match(), MRI, and RHS.

◆ matchCommuteShift()

bool CombinerHelper::matchCommuteShift ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchConstantFoldBinOp()

bool CombinerHelper::matchConstantFoldBinOp ( MachineInstr MI,
APInt MatchInfo 
)

Do constant folding when opportunities are exposed after MIR building.

Definition at line 4811 of file CombinerHelper.cpp.

References llvm::ConstantFoldBinOp(), MI, and MRI.

◆ matchConstantFoldCastOp()

bool CombinerHelper::matchConstantFoldCastOp ( MachineInstr MI,
APInt MatchInfo 
)

Do constant folding when opportunities are exposed after MIR building.

Definition at line 4799 of file CombinerHelper.cpp.

References llvm::ConstantFoldCastOp(), llvm::MachineRegisterInfo::getType(), MI, and MRI.

◆ matchConstantFoldFMA()

bool CombinerHelper::matchConstantFoldFMA ( MachineInstr MI,
ConstantFP *&  MatchInfo 
)

◆ matchConstantFoldFPBinOp()

bool CombinerHelper::matchConstantFoldFPBinOp ( MachineInstr MI,
ConstantFP *&  MatchInfo 
)

Do constant FP folding when opportunities are exposed after MIR building.

Definition at line 4821 of file CombinerHelper.cpp.

References llvm::ConstantFoldFPBinOp(), MI, and MRI.

◆ matchConstantFPOp()

bool CombinerHelper::matchConstantFPOp ( const MachineOperand MOP,
double  C 
)

Return true if MOP is defined by a G_FCONSTANT or splat with a value exactly equal to C.

Definition at line 2818 of file CombinerHelper.cpp.

References llvm::CallingConv::C, llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), llvm::MIPatternMatch::m_GFCstOrSplat(), llvm::MIPatternMatch::mi_match(), and MRI.

◆ matchConstantLargerBitWidth()

bool CombinerHelper::matchConstantLargerBitWidth ( MachineInstr MI,
unsigned  ConstIdx 
)

Checks if constant at ConstIdx is larger than MI 's bitwidth.

Parameters
ConstIdxIndex of the constant

Definition at line 2847 of file CombinerHelper.cpp.

References llvm::getIConstantVRegValWithLookThrough(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), MI, and MRI.

◆ matchConstantOp()

bool CombinerHelper::matchConstantOp ( const MachineOperand MOP,
int64_t  C 
)

Return true if MOP is defined by a G_CONSTANT or splat with a value equal to C.

Definition at line 2809 of file CombinerHelper.cpp.

References llvm::CallingConv::C, llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getVRegDef(), llvm::isConstantOrConstantSplatVector(), llvm::MachineOperand::isReg(), MI, and MRI.

Referenced by matchOperandIsZero().

◆ matchConstantSelectCmp()

bool CombinerHelper::matchConstantSelectCmp ( MachineInstr MI,
unsigned OpIdx 
)

Return true if a G_SELECT instruction MI has a constant comparison.

If true, OpIdx will store the operand index of the known selected value.

Definition at line 2700 of file CombinerHelper.cpp.

References llvm::GSelect::getCondReg(), llvm::MachineRegisterInfo::getVRegDef(), llvm::isConstantOrConstantSplatVector(), MI, and MRI.

◆ matchDivByPow2()

bool CombinerHelper::matchDivByPow2 ( MachineInstr MI,
bool  IsSigned 
)

Given an G_SDIV MI expressing a signed divided by a pow2 constant, return expressions that implements it by shifting.

Definition at line 5307 of file CombinerHelper.cpp.

References assert(), llvm::CallingConv::C, llvm::matchUnaryPredicate(), MI, MRI, and RHS.

◆ matchEqualDefs()

bool CombinerHelper::matchEqualDefs ( const MachineOperand MOP1,
const MachineOperand MOP2 
)

◆ matchExtendThroughPhis()

bool CombinerHelper::matchExtendThroughPhis ( MachineInstr MI,
MachineInstr *&  ExtMI 
)

◆ matchExtractAllEltsFromBuildVector()

bool CombinerHelper::matchExtractAllEltsFromBuildVector ( MachineInstr MI,
SmallVectorImpl< std::pair< Register, MachineInstr * > > &  MatchInfo 
)

◆ matchExtractVecEltBuildVec()

bool CombinerHelper::matchExtractVecEltBuildVec ( MachineInstr MI,
Register Reg 
)

◆ matchExtractVectorElement()

bool CombinerHelper::matchExtractVectorElement ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchExtractVectorElementWithBuildVector()

bool CombinerHelper::matchExtractVectorElementWithBuildVector ( const MachineOperand MO,
BuildFnTy MatchInfo 
)

◆ matchExtractVectorElementWithBuildVectorTrunc()

bool CombinerHelper::matchExtractVectorElementWithBuildVectorTrunc ( const MachineOperand MO,
BuildFnTy MatchInfo 
)

◆ matchExtractVectorElementWithDifferentIndices()

bool CombinerHelper::matchExtractVectorElementWithDifferentIndices ( const MachineOperand MO,
BuildFnTy MatchInfo 
)

◆ matchExtractVectorElementWithFreeze()

bool CombinerHelper::matchExtractVectorElementWithFreeze ( const MachineOperand MO,
BuildFnTy MatchInfo 
)

◆ matchFoldBinOpIntoSelect()

bool CombinerHelper::matchFoldBinOpIntoSelect ( MachineInstr MI,
unsigned SelectOpNo 
)

Push a binary operator through a select on constants.

binop (select cond, K0, K1), K2 -> select cond, (binop K0, K2), (binop K1, K2)

Definition at line 3495 of file CombinerHelper.cpp.

References llvm::MachineRegisterInfo::getVRegDef(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), llvm::isAllOnesOrAllOnesSplat(), llvm::isConstantOrConstantVector(), llvm::isNullOrNullSplat(), LHS, MI, MRI, RHS, and Select.

◆ matchFsubToFneg()

bool CombinerHelper::matchFsubToFneg ( MachineInstr MI,
Register MatchInfo 
)

◆ matchFunnelShiftToRotate()

bool CombinerHelper::matchFunnelShiftToRotate ( MachineInstr MI)

Match an FSHL or FSHR that can be combined to a ROTR or ROTL rotate.

Definition at line 4207 of file CombinerHelper.cpp.

References assert(), llvm::MachineRegisterInfo::getType(), isLegalOrBeforeLegalizer(), MI, MRI, X, and Y.

◆ matchHoistLogicOpWithSameOpcodeHands()

bool CombinerHelper::matchHoistLogicOpWithSameOpcodeHands ( MachineInstr MI,
InstructionStepsMatchInfo MatchInfo 
)

◆ matchICmpToLHSKnownBits()

bool CombinerHelper::matchICmpToLHSKnownBits ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchICmpToTrueFalseKnownBits()

bool CombinerHelper::matchICmpToTrueFalseKnownBits ( MachineInstr MI,
int64_t &  MatchInfo 
)

◆ matchInsertExtractVecEltOutOfBounds()

bool CombinerHelper::matchInsertExtractVecEltOutOfBounds ( MachineInstr MI)

Return true if a G_{EXTRACT,INSERT}_VECTOR_ELT has an out of range index.

Definition at line 2687 of file CombinerHelper.cpp.

References assert(), llvm::getIConstantVRegVal(), llvm::LLT::getNumElements(), llvm::MachineRegisterInfo::getType(), Idx, MI, and MRI.

◆ matchLoadOrCombine()

bool CombinerHelper::matchLoadOrCombine ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchMulOBy0()

bool CombinerHelper::matchMulOBy0 ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchMulOBy2()

bool CombinerHelper::matchMulOBy2 ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchNarrowBinopFeedingAnd()

bool CombinerHelper::matchNarrowBinopFeedingAnd ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchNotCmp()

bool CombinerHelper::matchNotCmp ( MachineInstr MI,
SmallVectorImpl< Register > &  RegsToNegate 
)

◆ matchOperandIsKnownToBeAPowerOfTwo()

bool CombinerHelper::matchOperandIsKnownToBeAPowerOfTwo ( MachineInstr MI,
unsigned  OpIdx 
)

Check if operand OpIdx is known to be a power of 2.

Definition at line 2911 of file CombinerHelper.cpp.

References llvm::MachineOperand::getReg(), llvm::isKnownToBeAPowerOfTwo(), KB, MI, and MRI.

◆ matchOperandIsUndef()

bool CombinerHelper::matchOperandIsUndef ( MachineInstr MI,
unsigned  OpIdx 
)

Check if operand OpIdx is undef.

Definition at line 2905 of file CombinerHelper.cpp.

References llvm::getOpcodeDef(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), MI, and MRI.

◆ matchOperandIsZero()

bool CombinerHelper::matchOperandIsZero ( MachineInstr MI,
unsigned  OpIdx 
)

Check if operand OpIdx is zero.

Definition at line 2899 of file CombinerHelper.cpp.

References llvm::canReplaceReg(), matchConstantOp(), MI, and MRI.

◆ matchOptBrCondByInvertingCond()

bool CombinerHelper::matchOptBrCondByInvertingCond ( MachineInstr MI,
MachineInstr *&  BrCond 
)

If a brcond's true block is not the fallthrough, make it so by inverting the condition and swapping operands.

Definition at line 1505 of file CombinerHelper.cpp.

References assert(), llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::isLayoutSuccessor(), MBB, and MI.

◆ matchOr()

bool CombinerHelper::matchOr ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Combine ors.

Definition at line 7070 of file CombinerHelper.cpp.

References MI.

◆ matchOrShiftToFunnelShift()

bool CombinerHelper::matchOrShiftToFunnelShift ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchOverlappingAnd()

bool CombinerHelper::matchOverlappingAnd ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Fold and(and(x, C1), C2) -> C1&C2 ? and(x, C1&C2) : 0.

and(and(x, C1), C2) -> C1&C2 ? and(x, C1&C2) : 0

Definition at line 3173 of file CombinerHelper.cpp.

References assert(), B, llvm::MachineRegisterInfo::getType(), llvm::MIPatternMatch::m_GAnd(), llvm::MIPatternMatch::m_ICst(), llvm::MIPatternMatch::m_Reg(), MI, llvm::MIPatternMatch::mi_match(), MRI, and replaceRegWith().

◆ matchPtrAddImmedChain()

bool CombinerHelper::matchPtrAddImmedChain ( MachineInstr MI,
PtrAddChain MatchInfo 
)

◆ matchPtrAddZero()

bool CombinerHelper::matchPtrAddZero ( MachineInstr MI)

◆ matchReassocCommBinOp()

bool CombinerHelper::matchReassocCommBinOp ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Reassociate commutative binary operations like G_ADD.

Definition at line 4783 of file CombinerHelper.cpp.

References MI, and tryReassocBinOp().

◆ matchReassocConstantInnerLHS()

bool CombinerHelper::matchReassocConstantInnerLHS ( GPtrAdd MI,
MachineInstr LHS,
MachineInstr RHS,
BuildFnTy MatchInfo 
)

◆ matchReassocConstantInnerRHS()

bool CombinerHelper::matchReassocConstantInnerRHS ( GPtrAdd MI,
MachineInstr RHS,
BuildFnTy MatchInfo 
)

◆ matchReassocFoldConstantsInSubTree()

bool CombinerHelper::matchReassocFoldConstantsInSubTree ( GPtrAdd MI,
MachineInstr LHS,
MachineInstr RHS,
BuildFnTy MatchInfo 
)

◆ matchReassocPtrAdd()

bool CombinerHelper::matchReassocPtrAdd ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Reassociate pointer calculations with G_ADD involved, to allow better addressing mode usage.

Definition at line 4710 of file CombinerHelper.cpp.

References llvm::MachineRegisterInfo::getVRegDef(), LHS, matchReassocConstantInnerLHS(), matchReassocConstantInnerRHS(), matchReassocFoldConstantsInSubTree(), MI, MRI, and RHS.

◆ matchRedundantAnd()

bool CombinerHelper::matchRedundantAnd ( MachineInstr MI,
Register Replacement 
)
Returns
true if MI is a G_AND instruction whose operands are x and y where x & y == x or x & y == y. (E.g., one of operands is all-ones value.)
Parameters
[in]MI- The G_AND instruction.
[out]Replacement- A register the G_AND should be replaced with on success.

Definition at line 3199 of file CombinerHelper.cpp.

References assert(), llvm::canReplaceReg(), llvm::GISelKnownBits::getKnownBits(), KB, LHS, MI, MRI, llvm::KnownBits::One, RHS, and llvm::KnownBits::Zero.

◆ matchRedundantBinOpInEquality()

bool CombinerHelper::matchRedundantBinOpInEquality ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchRedundantNegOperands()

bool CombinerHelper::matchRedundantNegOperands ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Transform (fadd x, fneg(y)) -> (fsub x, y) (fadd fneg(x), y) -> (fsub y, x) (fsub x, fneg(y)) -> (fadd x, y) (fmul fneg(x), fneg(y)) -> (fmul x, y) (fdiv fneg(x), fneg(y)) -> (fdiv x, y) (fmad fneg(x), fneg(y), z) -> (fmad x, y, z) (fma fneg(x), fneg(y), z) -> (fma x, y, z)

fold (fsub x, fneg(y)) -> (fadd x, y)

Definition at line 5426 of file CombinerHelper.cpp.

References assert(), B, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::MachineRegisterInfo::getType(), isLegalOrBeforeLegalizer(), llvm::MIPatternMatch::m_GFAdd(), llvm::MIPatternMatch::m_GFNeg(), llvm::MIPatternMatch::m_GFSub(), llvm::MIPatternMatch::m_Reg(), MI, llvm::MIPatternMatch::mi_match(), MRI, Observer, X, and Y.

◆ matchRedundantOr()

bool CombinerHelper::matchRedundantOr ( MachineInstr MI,
Register Replacement 
)
Returns
true if MI is a G_OR instruction whose operands are x and y where x | y == x or x | y == y. (E.g., one of operands is all-zeros value.)
Parameters
[in]MI- The G_OR instruction.
[out]Replacement- A register the G_OR should be replaced with on success.

Definition at line 3248 of file CombinerHelper.cpp.

References assert(), llvm::canReplaceReg(), llvm::GISelKnownBits::getKnownBits(), KB, LHS, MI, MRI, llvm::KnownBits::One, RHS, and llvm::KnownBits::Zero.

◆ matchRedundantSExtInReg()

bool CombinerHelper::matchRedundantSExtInReg ( MachineInstr MI)
Returns
true if MI is a G_SEXT_INREG that can be erased.

Definition at line 3288 of file CombinerHelper.cpp.

References llvm::GISelKnownBits::computeNumSignBits(), llvm::LLT::getScalarSizeInBits(), llvm::MachineRegisterInfo::getType(), KB, MI, and MRI.

◆ matchRotateOutOfRange()

bool CombinerHelper::matchRotateOutOfRange ( MachineInstr MI)

◆ matchSDivByConst()

bool CombinerHelper::matchSDivByConst ( MachineInstr MI)

◆ matchSelect()

bool CombinerHelper::matchSelect ( MachineInstr MI,
BuildFnTy MatchInfo 
)

Combine selects.

Definition at line 6805 of file CombinerHelper.cpp.

References MI, and Select.

◆ matchSelectSameVal()

bool CombinerHelper::matchSelectSameVal ( MachineInstr MI)

Optimize (cond ? x : x) -> x.

Definition at line 2885 of file CombinerHelper.cpp.

References assert(), llvm::canReplaceReg(), matchEqualDefs(), MI, and MRI.

◆ matchSextInRegOfLoad()

bool CombinerHelper::matchSextInRegOfLoad ( MachineInstr MI,
std::tuple< Register, unsigned > &  MatchInfo 
)

◆ matchSextTruncSextLoad()

bool CombinerHelper::matchSextTruncSextLoad ( MachineInstr MI)

◆ matchShiftImmedChain()

bool CombinerHelper::matchShiftImmedChain ( MachineInstr MI,
RegisterImmPair MatchInfo 
)

◆ matchShiftOfShiftedLogic()

bool CombinerHelper::matchShiftOfShiftedLogic ( MachineInstr MI,
ShiftOfShiftedLogic MatchInfo 
)

◆ matchShiftsTooBig()

bool CombinerHelper::matchShiftsTooBig ( MachineInstr MI)

Match shifts greater or equal to the bitwidth of the operation.

Definition at line 6338 of file CombinerHelper.cpp.

References llvm::CallingConv::C, llvm::LLT::getScalarSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::matchUnaryPredicate(), MI, and MRI.

◆ matchShuffleToExtract()

bool CombinerHelper::matchShuffleToExtract ( MachineInstr MI)

Definition at line 483 of file CombinerHelper.cpp.

References assert(), and MI.

◆ matchSimplifyAddToSub()

bool CombinerHelper::matchSimplifyAddToSub ( MachineInstr MI,
std::tuple< Register, Register > &  MatchInfo 
)

Return true if MI is a G_ADD which can be simplified to a G_SUB.

Definition at line 2948 of file CombinerHelper.cpp.

References LHS, llvm::PatternMatch::m_Neg(), llvm::MIPatternMatch::m_Reg(), MI, llvm::MIPatternMatch::mi_match(), MRI, and RHS.

◆ matchSimplifySelectToMinMax()

bool CombinerHelper::matchSimplifySelectToMinMax ( MachineInstr MI,
BuildFnTy MatchInfo 
)
Returns
true if it is possible to simplify a select instruction MI to a min/max instruction of some sort.

Definition at line 6291 of file CombinerHelper.cpp.

References assert(), Cond, llvm::MIPatternMatch::m_GTrunc(), llvm::MIPatternMatch::m_OneNonDBGUse(), llvm::MIPatternMatch::m_Reg(), MI, llvm::MIPatternMatch::mi_match(), and MRI.

◆ matchSubAddSameReg()

bool CombinerHelper::matchSubAddSameReg ( MachineInstr MI,
BuildFnTy MatchInfo 
)

◆ matchTruncBuildVectorFold()

bool CombinerHelper::matchTruncBuildVectorFold ( MachineInstr MI,
Register MatchInfo 
)

◆ matchTruncLshrBuildVectorFold()

bool CombinerHelper::matchTruncLshrBuildVectorFold ( MachineInstr MI,
Register MatchInfo 
)

◆ matchUDivByConst()

bool CombinerHelper::matchUDivByConst ( MachineInstr MI)

◆ matchUMulHToLShr()

bool CombinerHelper::matchUMulHToLShr ( MachineInstr MI)

◆ matchUndefSelectCmp()

bool CombinerHelper::matchUndefSelectCmp ( MachineInstr MI)

Return true if a G_SELECT instruction MI has an undef comparison.

Definition at line 2681 of file CombinerHelper.cpp.

References assert(), llvm::getOpcodeDef(), MI, and MRI.

◆ matchUndefShuffleVectorMask()

bool CombinerHelper::matchUndefShuffleVectorMask ( MachineInstr MI)

Return true if a G_SHUFFLE_VECTOR instruction MI has an undef mask.

Definition at line 2669 of file CombinerHelper.cpp.

References llvm::all_of(), assert(), and MI.

◆ matchUndefStore()

bool CombinerHelper::matchUndefStore ( MachineInstr MI)

Return true if a G_STORE instruction MI is storing an undef value.

Definition at line 2675 of file CombinerHelper.cpp.

References assert(), llvm::getOpcodeDef(), MI, and MRI.

◆ matchXorOfAndWithSameReg()

bool CombinerHelper::matchXorOfAndWithSameReg ( MachineInstr MI,
std::pair< Register, Register > &  MatchInfo 
)

◆ replaceInstWithConstant() [1/2]

void CombinerHelper::replaceInstWithConstant ( MachineInstr MI,
APInt  C 
)

Replace an instruction with a G_CONSTANT with value C.

Definition at line 2929 of file CombinerHelper.cpp.

References assert(), llvm::MachineIRBuilder::buildConstant(), Builder, llvm::CallingConv::C, and MI.

◆ replaceInstWithConstant() [2/2]

void CombinerHelper::replaceInstWithConstant ( MachineInstr MI,
int64_t  C 
)

Replace an instruction with a G_CONSTANT with value C.

Definition at line 2923 of file CombinerHelper.cpp.

References assert(), llvm::MachineIRBuilder::buildConstant(), Builder, llvm::CallingConv::C, and MI.

◆ replaceInstWithFConstant() [1/2]

void CombinerHelper::replaceInstWithFConstant ( MachineInstr MI,
ConstantFP CFP 
)

Replace an instruction with an G_FCONSTANT with value CFP.

Definition at line 2935 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildFConstant(), llvm::ConstantFP::getValueAPF(), and MI.

◆ replaceInstWithFConstant() [2/2]

void CombinerHelper::replaceInstWithFConstant ( MachineInstr MI,
double  C 
)

Replace an instruction with a G_FCONSTANT with value C.

Definition at line 2917 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildFConstant(), llvm::CallingConv::C, and MI.

◆ replaceInstWithUndef()

void CombinerHelper::replaceInstWithUndef ( MachineInstr MI)

Replace an instruction with a G_IMPLICIT_DEF.

Definition at line 2942 of file CombinerHelper.cpp.

References assert(), Builder, llvm::MachineIRBuilder::buildUndef(), and MI.

◆ replaceOpcodeWith()

void CombinerHelper::replaceOpcodeWith ( MachineInstr FromMI,
unsigned  ToOpcode 
) const

Replace the opcode in instruction with a new opcode and inform the observer of the changes.

Definition at line 187 of file CombinerHelper.cpp.

References Builder, llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::MCInstrInfo::get(), llvm::MachineIRBuilder::getTII(), Observer, and llvm::MachineInstr::setDesc().

Referenced by AMDGPUCombinerHelper::applyFoldableFneg().

◆ replaceRegOpWith()

void CombinerHelper::replaceRegOpWith ( MachineRegisterInfo MRI,
MachineOperand FromRegOp,
Register  ToReg 
) const

Replace a single register operand with a new register and inform the observer of the changes.

Definition at line 176 of file CombinerHelper.cpp.

References assert(), llvm::GISelChangeObserver::changedInstr(), llvm::GISelChangeObserver::changingInstr(), llvm::MachineOperand::getParent(), Observer, and llvm::MachineOperand::setReg().

Referenced by applyCombineExtendingLoads(), and AMDGPUCombinerHelper::applyFoldableFneg().

◆ replaceRegWith()

void CombinerHelper::replaceRegWith ( MachineRegisterInfo MRI,
Register  FromReg,
Register  ToReg 
) const

◆ replaceSingleDefInstWithOperand()

void CombinerHelper::replaceSingleDefInstWithOperand ( MachineInstr MI,
unsigned  OpIdx 
)

Delete MI and replace all of its uses with its OpIdx-th operand.

Definition at line 2828 of file CombinerHelper.cpp.

References assert(), llvm::canReplaceReg(), MI, MRI, and replaceRegWith().

◆ replaceSingleDefInstWithReg()

void CombinerHelper::replaceSingleDefInstWithReg ( MachineInstr MI,
Register  Replacement 
)

Delete MI and replace all of its uses with Replacement.

Definition at line 2838 of file CombinerHelper.cpp.

References assert(), llvm::canReplaceReg(), MI, MRI, and replaceRegWith().

Referenced by applyExtractVecEltBuildVec(), applySDivByConst(), and applyUDivByConst().

◆ setRegBank()

void CombinerHelper::setRegBank ( Register  Reg,
const RegisterBank RegBank 
)

Set the register bank of Reg.

Does nothing if the RegBank is null. This is the counterpart to getRegBank.

Definition at line 200 of file CombinerHelper.cpp.

References MRI, and llvm::MachineRegisterInfo::setRegBank().

Referenced by applyPtrAddImmedChain().

◆ tryCombine()

bool llvm::CombinerHelper::tryCombine ( MachineInstr MI)

Try to transform MI by using all of the above combine functions.

Returns true if changed.

◆ tryCombineCopy()

bool CombinerHelper::tryCombineCopy ( MachineInstr MI)

If MI is COPY, try to combine it.

Returns true if MI changed.

Definition at line 205 of file CombinerHelper.cpp.

References applyCombineCopy(), matchCombineCopy(), and MI.

◆ tryCombineExtendingLoads()

bool CombinerHelper::tryCombineExtendingLoads ( MachineInstr MI)

If MI is extend that consumes the result of a load, try to combine it.

Returns true if MI changed.

Definition at line 604 of file CombinerHelper.cpp.

References applyCombineExtendingLoads(), matchCombineExtendingLoads(), and MI.

◆ tryCombineMemCpyFamily()

bool CombinerHelper::tryCombineMemCpyFamily ( MachineInstr MI,
unsigned  MaxLen = 0 
)

Optimize memcpy intrinsics et al, e.g.

constant len calls. /p MaxLen if non-zero specifies the max length of a mem libcall to inline.

For example (pre-indexed):

$addr = G_PTR_ADD $base, $offset
[...]
$val = G_LOAD $addr
[...]
$whatever = COPY $addr

-->

$val, $addr = G_INDEXED_LOAD $base, $offset, 1 (IsPre)
[...]
$whatever = COPY $addr

or (post-indexed):

G_STORE $val, $base
[...]
$addr = G_PTR_ADD $base, $offset
[...]
$whatever = COPY $addr

-->

$addr = G_INDEXED_STORE $val, $base, $offset
[...]
$whatever = COPY $addr 

Definition at line 1573 of file CombinerHelper.cpp.

References llvm::MachineIRBuilder::getMF(), llvm::LegalizerHelper::Legalized, llvm::LegalizerHelper::lowerMemCpyFamily(), and MI.

◆ tryCombineShiftToUnmerge()

bool CombinerHelper::tryCombineShiftToUnmerge ( MachineInstr MI,
unsigned  TargetShiftAmount 
)

◆ tryCombineShuffleVector()

bool CombinerHelper::tryCombineShuffleVector ( MachineInstr MI)

Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS.

Returns true if MI changed.

Precondition
MI.getOpcode() == G_SHUFFLE_VECTOR.

Definition at line 383 of file CombinerHelper.cpp.

References applyCombineShuffleVector(), matchCombineShuffleVector(), and MI.

◆ tryEmitMemcpyInline()

bool CombinerHelper::tryEmitMemcpyInline ( MachineInstr MI)

Emit loads and stores that perform the given memcpy.

Assumes MI is a G_MEMCPY_INLINE TODO: implement dynamically sized inline memcpy, and rename: s/bool tryEmit/void emit/

Definition at line 1565 of file CombinerHelper.cpp.

References llvm::MachineIRBuilder::getMF(), llvm::LegalizerHelper::Legalized, and MI.

◆ tryReassocBinOp()

bool CombinerHelper::tryReassocBinOp ( unsigned  Opc,
Register  DstReg,
Register  Op0,
Register  Op1,
BuildFnTy MatchInfo 
)

Member Data Documentation

◆ Builder

MachineIRBuilder& llvm::CombinerHelper::Builder
protected

Definition at line 105 of file CombinerHelper.h.

Referenced by applyAshShlToSextInreg(), applyBuildFnMO(), applyBuildFnNoErase(), applyBuildInstructionSteps(), applyCombineAddP2IToPtrAdd(), applyCombineConcatVectors(), applyCombineConstantFoldFpUnary(), applyCombineConstPtrAddToI2P(), applyCombineDivRem(), applyCombineExtendingLoads(), applyCombineExtOfExt(), applyCombineI2PToP2I(), applyCombineIndexedLoadStore(), applyCombineInsertVecElts(), applyCombineP2IToI2P(), applyCombineShiftToUnmerge(), applyCombineShlOfExtend(), applyCombineShuffleConcat(), applyCombineShuffleVector(), applyCombineTruncOfExt(), applyCombineTruncOfShift(), applyCombineUnmergeConstant(), applyCombineUnmergeMergeToPlainValues(), applyCombineUnmergeWithDeadLanesToTrunc(), applyCombineUnmergeZExtToZExt(), AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), applyExtendThroughPhis(), applyExtractVecEltBuildVec(), AMDGPUCombinerHelper::applyFoldableFneg(), applyFoldBinOpIntoSelect(), applyFsubToFneg(), applyFunnelShiftConstantModulo(), applyFunnelShiftToRotate(), applyNotCmp(), applyOptBrCondByInvertingCond(), applyPtrAddZero(), applyRotateOutOfRange(), applySDivByPow2(), applySextInRegOfLoad(), applySextTruncSextLoad(), applyShiftImmedChain(), applyShiftOfShiftedLogic(), applyShuffleToExtract(), applySimplifyAddToSub(), applySimplifyURemByPow2(), applyUDivByPow2(), applyUMulHToLShr(), applyXorOfAndWithSameReg(), buildSDivUsingMul(), buildUDivUsingMul(), getBuilder(), getTargetLowering(), matchCombineConcatVectors(), matchCombineConstPtrAddToI2P(), matchCombineShuffleVector(), matchEqualDefs(), matchExtendThroughPhis(), matchMulOBy2(), matchNarrowBinopFeedingAnd(), matchNotCmp(), matchPtrAddZero(), matchReassocConstantInnerRHS(), replaceInstWithConstant(), replaceInstWithFConstant(), replaceInstWithUndef(), replaceOpcodeWith(), and replaceRegWith().

◆ IsPreLegalize

bool llvm::CombinerHelper::IsPreLegalize
protected

Definition at line 110 of file CombinerHelper.h.

Referenced by isPreLegalize().

◆ KB

GISelKnownBits* llvm::CombinerHelper::KB
protected

◆ LI

const LegalizerInfo* llvm::CombinerHelper::LI
protected

◆ MDT

MachineDominatorTree* llvm::CombinerHelper::MDT
protected

Definition at line 109 of file CombinerHelper.h.

Referenced by dominates().

◆ MRI

MachineRegisterInfo& llvm::CombinerHelper::MRI
protected

Definition at line 106 of file CombinerHelper.h.

Referenced by applyAshShlToSextInreg(), applyBuildFnMO(), applyCombineAddP2IToPtrAdd(), applyCombineConcatVectors(), applyCombineConstantFoldFpUnary(), applyCombineCopy(), applyCombineExtendingLoads(), applyCombineIndexedLoadStore(), applyCombineInsertVecElts(), applyCombineMulToShl(), applyCombineShiftToUnmerge(), applyCombineShlOfExtend(), applyCombineShuffleConcat(), applyCombineShuffleVector(), applyCombineTruncOfExt(), applyCombineTruncOfShift(), applyCombineUnmergeMergeToPlainValues(), applyCombineUnmergeZExtToZExt(), AMDGPUCombinerHelper::applyExpandPromotedF16FMed3(), applyExtendThroughPhis(), applyExtractAllEltsFromBuildVector(), applyExtractVecEltBuildVec(), AMDGPUCombinerHelper::applyFoldableFneg(), applyFoldBinOpIntoSelect(), applyFsubToFneg(), applyFunnelShiftConstantModulo(), applyNotCmp(), applyOptBrCondByInvertingCond(), applyPtrAddImmedChain(), applyRotateOutOfRange(), applySDivByPow2(), applySextInRegOfLoad(), applyShiftImmedChain(), applyShiftOfShiftedLogic(), applyShuffleToExtract(), applySimplifyURemByPow2(), applyUDivByPow2(), applyUMulHToLShr(), applyXorOfAndWithSameReg(), buildSDivUsingMul(), buildUDivUsingMul(), canCombineFMadOrFMA(), getRegBank(), matchAddEToAddO(), matchAddOverflow(), matchAddSubSameReg(), matchAndOrDisjointMask(), matchAshrShlToSextInreg(), matchBinOpSameVal(), matchBitfieldExtractFromAnd(), matchBitfieldExtractFromSExtInReg(), matchBitfieldExtractFromShr(), matchBitfieldExtractFromShrAnd(), matchBuildVectorIdentityFold(), matchCombineAddP2IToPtrAdd(), matchCombineAnyExtTrunc(), matchCombineConcatVectors(), matchCombineConstPtrAddToI2P(), matchCombineCopy(), matchCombineDivRem(), matchCombineExtendingLoads(), matchCombineExtOfExt(), matchCombineExtractedVectorLoad(), matchCombineFAddFMAFMulToFMadOrFMA(), matchCombineFAddFMulToFMadOrFMA(), matchCombineFAddFpExtFMulToFMadOrFMA(), matchCombineFAddFpExtFMulToFMadOrFMAAggressive(), matchCombineFMinMaxNaN(), matchCombineFSubFMulToFMadOrFMA(), matchCombineFSubFNegFMulToFMadOrFMA(), matchCombineFSubFpExtFMulToFMadOrFMA(), matchCombineFSubFpExtFNegFMulToFMadOrFMA(), matchCombineI2PToP2I(), matchCombineInsertVecElts(), matchCombineLoadWithAndMask(), matchCombineMergeUnmerge(), matchCombineMulToShl(), matchCombineShiftToUnmerge(), matchCombineShlOfExtend(), matchCombineShuffleConcat(), matchCombineShuffleVector(), matchCombineTruncOfExt(), matchCombineTruncOfShift(), matchCombineUnmergeConstant(), matchCombineUnmergeMergeToPlainValues(), matchCombineUnmergeUndef(), matchCombineUnmergeWithDeadLanesToTrunc(), matchCombineUnmergeZExtToZExt(), matchCombineZextTrunc(), matchCommuteConstantToRHS(), matchCommuteFPConstantToRHS(), matchCommuteShift(), matchConstantFoldBinOp(), matchConstantFoldCastOp(), matchConstantFoldFMA(), matchConstantFoldFPBinOp(), matchConstantFPOp(), matchConstantLargerBitWidth(), matchConstantOp(), matchConstantSelectCmp(), matchDivByPow2(), matchEqualDefs(), AMDGPUCombinerHelper::matchExpandPromotedF16FMed3(), matchExtendThroughPhis(), matchExtractAllEltsFromBuildVector(), matchExtractVecEltBuildVec(), matchExtractVectorElement(), matchExtractVectorElementWithBuildVector(), matchExtractVectorElementWithBuildVectorTrunc(), matchExtractVectorElementWithDifferentIndices(), matchExtractVectorElementWithFreeze(), AMDGPUCombinerHelper::matchFoldableFneg(), matchFoldBinOpIntoSelect(), matchFsubToFneg(), matchFunnelShiftToRotate(), matchHoistLogicOpWithSameOpcodeHands(), matchICmpToLHSKnownBits(), matchICmpToTrueFalseKnownBits(), matchInsertExtractVecEltOutOfBounds(), matchLoadOrCombine(), matchMulOBy0(), matchMulOBy2(), matchNarrowBinopFeedingAnd(), matchNotCmp(), matchOperandIsKnownToBeAPowerOfTwo(), matchOperandIsUndef(), matchOperandIsZero(), matchOrShiftToFunnelShift(), matchOverlappingAnd(), matchPtrAddImmedChain(), matchPtrAddZero(), matchReassocConstantInnerLHS(), matchReassocConstantInnerRHS(), matchReassocFoldConstantsInSubTree(), matchReassocPtrAdd(), matchRedundantAnd(), matchRedundantBinOpInEquality(), matchRedundantNegOperands(), matchRedundantOr(), matchRedundantSExtInReg(), matchRotateOutOfRange(), matchSDivByConst(), matchSelectSameVal(), matchSextInRegOfLoad(), matchSextTruncSextLoad(), matchShiftImmedChain(), matchShiftOfShiftedLogic(), matchShiftsTooBig(), matchSimplifyAddToSub(), matchSimplifySelectToMinMax(), matchSubAddSameReg(), matchTruncBuildVectorFold(), matchTruncLshrBuildVectorFold(), matchUDivByConst(), matchUMulHToLShr(), matchUndefSelectCmp(), matchUndefStore(), matchXorOfAndWithSameReg(), replaceRegWith(), replaceSingleDefInstWithOperand(), replaceSingleDefInstWithReg(), setRegBank(), and tryReassocBinOp().

◆ Observer

GISelChangeObserver& llvm::CombinerHelper::Observer
protected

◆ RBI

const RegisterBankInfo* llvm::CombinerHelper::RBI
protected

Definition at line 112 of file CombinerHelper.h.

Referenced by getRegBank().

◆ TRI

const TargetRegisterInfo* llvm::CombinerHelper::TRI
protected

Definition at line 113 of file CombinerHelper.h.

Referenced by getRegBank().


The documentation for this class was generated from the following files: