LLVM  10.0.0svn
Public Member Functions | Static Public Member Functions | List of all members
llvm::Register Class Reference

Wrapper class representing virtual and physical registers. More...

#include "llvm/CodeGen/Register.h"

Public Member Functions

 Register (unsigned Val=0)
 
 Register (MCRegister Val)
 
bool isVirtual () const
 Return true if the specified register number is in the virtual register namespace. More...
 
bool isPhysical () const
 Return true if the specified register number is in the physical register namespace. More...
 
unsigned virtRegIndex () const
 Convert a virtual register number to a 0-based index. More...
 
 operator unsigned () const
 
unsigned id () const
 
 operator MCRegister () const
 
bool isValid () const
 
bool operator== (const Register &Other) const
 Comparisons between register objects. More...
 
bool operator!= (const Register &Other) const
 
bool operator== (const MCRegister &Other) const
 
bool operator!= (const MCRegister &Other) const
 
bool operator== (unsigned Other) const
 Comparisons against register constants. More...
 
bool operator!= (unsigned Other) const
 
bool operator== (int Other) const
 
bool operator!= (int Other) const
 
bool operator== (MCPhysReg Other) const
 
bool operator!= (MCPhysReg Other) const
 

Static Public Member Functions

static bool isStackSlot (unsigned Reg)
 isStackSlot - Sometimes it is useful the be able to store a non-negative frame index in a variable that normally holds a register. More...
 
static int stackSlot2Index (unsigned Reg)
 Compute the frame index from a register value representing a stack slot. More...
 
static unsigned index2StackSlot (int FI)
 Convert a non-negative frame index to a stack slot register value. More...
 
static bool isPhysicalRegister (unsigned Reg)
 Return true if the specified register number is in the physical register namespace. More...
 
static bool isVirtualRegister (unsigned Reg)
 Return true if the specified register number is in the virtual register namespace. More...
 
static unsigned virtReg2Index (unsigned Reg)
 Convert a virtual register number to a 0-based index. More...
 
static unsigned index2VirtReg (unsigned Index)
 Convert a 0-based index to a virtual register number. More...
 

Detailed Description

Wrapper class representing virtual and physical registers.

Should be passed by value.

Definition at line 19 of file Register.h.

Constructor & Destructor Documentation

◆ Register() [1/2]

llvm::Register::Register ( unsigned  Val = 0)
inline

Definition at line 23 of file Register.h.

Referenced by llvm::HexagonMCChecker::reportBranchErrors().

◆ Register() [2/2]

llvm::Register::Register ( MCRegister  Val)
inline

Definition at line 24 of file Register.h.

Member Function Documentation

◆ id()

unsigned llvm::Register::id ( ) const
inline

◆ index2StackSlot()

static unsigned llvm::Register::index2StackSlot ( int  FI)
inlinestatic

Convert a non-negative frame index to a stack slot register value.

Definition at line 56 of file Register.h.

References assert().

Referenced by llvm::LiveStacks::getOrCreateInterval(), and llvm::rdf::PhysicalRegisterInfo::getRegMaskId().

◆ index2VirtReg()

static unsigned llvm::Register::index2VirtReg ( unsigned  Index)
inlinestatic

◆ isPhysical()

bool llvm::Register::isPhysical ( ) const
inline

◆ isPhysicalRegister()

static bool llvm::Register::isPhysicalRegister ( unsigned  Reg)
inlinestatic

Return true if the specified register number is in the physical register namespace.

Definition at line 63 of file Register.h.

References llvm::MCRegister::isPhysicalRegister().

Referenced by llvm::LiveRegUnits::accumulate(), addDefsUsesToList(), llvm::ARMBaseInstrInfo::AddDReg(), llvm::DwarfExpression::addMachineReg(), addRegAndItsAliases(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), addSegmentsWithValNo(), AddSubReg(), addToListsIfDependent(), llvm::LivePhysRegs::addUses(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::LiveRangeEdit::anyRematerializable(), llvm::HexagonSubtarget::CallMutation::apply(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::VirtRegMap::assignVirt2Phys(), llvm::biasPhysReg(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::calculateDbgEntityHistory(), canCompareBeNewValueJump(), canFoldCopy(), canFoldIntoSelect(), llvm::X86InstrInfo::classifyLEAReg(), llvm::MachineInstr::clearRegisterKills(), collectCallSiteParameters(), llvm::ARMBaseInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::constrainSelectedInstRegOperands(), llvm::TargetRegisterClass::contains(), ConvertDoubleToBytes(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createBBSelectReg(), llvm::createSIPreAllocateWWMRegsPass(), definesFullReg(), llvm::X86InstrInfo::describeLoadedValue(), llvm::RegScavenger::enterBasicBlockEnd(), llvm::LiveRangeEdit::eraseVirtReg(), llvm::HexagonEvaluator::evaluate(), llvm::InstructionSelector::executeMatchTable(), llvm::HexagonBlockRanges::expandToSubRegs(), llvm::finalizeBundle(), findHoistingInsertPosAndDeps(), findOnlyInterestingUse(), llvm::MachineInstr::findRegisterDefOperandIdx(), findSingleRegDef(), llvm::CoalescerPair::flip(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldVGPRCopyIntoRegSequence(), llvm::RegScavenger::forward(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), llvm::rdf::PhysicalRegisterInfo::getAliasSet(), llvm::RegBankSelect::getAnalysisUsage(), llvm::BitTracker::MachineEvaluator::getCell(), llvm::getConstantVRegValWithLookThrough(), getDataDeps(), getDwarfRegNum(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::RegisterClassInfo::getLastCalleeSavedAlias(), getMappedReg(), llvm::TargetRegisterInfo::getMinimalPhysRegClass(), llvm::RegisterBankInfo::getMinimalPhysRegClass(), getMopState(), getNewSource(), getNewValueJumpOpcode(), llvm::rdf::DataFlowGraph::getNextShadow(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::HexagonEvaluator::getPhysRegBitWidth(), llvm::BitTracker::MachineEvaluator::getPhysRegBitWidth(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::RegisterBankInfo::getRegBank(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), getRegisterName(), llvm::TargetRegisterInfo::getRegSizeInBits(), llvm::getRegState(), getRegUnits(), getSubRegForIndex(), llvm::X86InstrInfo::getUndefRegClearance(), llvm::LiveVariables::HandleVirtRegDef(), llvm::VirtRegMap::hasKnownPreference(), hasUseAfterLoop(), INITIALIZE_PASS(), instAccessReg(), InstructionStoresToFI(), llvm::rdf::CopyPropagation::interpretAsCopy(), isAmbiguous(), llvm::TargetRegisterInfo::isCalleeSavedPhysReg(), llvm::PPCRegisterInfo::isCallerPreservedPhysReg(), llvm::CoalescerPair::isCoalescable(), isCoalescable(), llvm::MachineRegisterInfo::isConstantPhysReg(), isCopyFeedingInvariantStore(), isCopyToReg(), isCrossCopy(), llvm::HexagonInstrInfo::isDependent(), isEvenReg(), isIdenticalOp(), isImplicitlyDef(), isKilled(), isLocalCopy(), isPhysical(), llvm::MachineOperand::isRenamable(), isSafeToMove(), isSCC(), llvm::SITargetLowering::isSDNodeSourceOfDivergence(), isSubRegOf(), isTerminalReg(), llvm::isTriviallyDead(), llvm::SMSchedule::isValidSchedule(), isVirtualRegisterOperand(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::Thumb1InstrInfo::loadRegFromStackSlot(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::ARMBaseInstrInfo::loadRegFromStackSlot(), loadRegPairFromStackSlot(), llvm::ARMCallLowering::lowerCall(), llvm::rdf::DataFlowGraph::makeRegRef(), matchSwap(), MIIsInTerminatorSequence(), moveAndTeeForMultiUse(), llvm::SIInstrInfo::moveToVALU(), performSink(), llvm::LiveIntervals::print(), llvm::MachineOperand::print(), llvm::ARMAsmPrinter::printOperand(), llvm::recomputeLivenessFlags(), llvm::LivePhysRegs::removeDefs(), llvm::MachineRegisterInfo::replaceRegWith(), llvm::GenericScheduler::reschedulePhysReg(), llvm::rdf::Liveness::resetKills(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::MachineOperand::setIsRenamable(), llvm::CoalescerPair::setRegisters(), llvm::SystemZRegisterInfo::shouldCoalesce(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::LiveDebugVariables::splitRegister(), llvm::LiveRegUnits::stepBackward(), llvm::LivePhysRegs::stepForward(), storeRegPairToStackSlot(), llvm::Thumb1InstrInfo::storeRegToStackSlot(), llvm::MachineInstr::substituteRegister(), unstackifyVRegsUsedInSplitBB(), llvm::LiveIntervals::HMEditor::updateAllRanges(), UpdateOperandRegClass(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), llvm::DwarfCompileUnit::updateSubprogramScopeDIE(), llvm::SIInstrInfo::verifyInstruction(), and llvm::VirtRegAuxInfo::weightCalcHelper().

◆ isStackSlot()

static bool llvm::Register::isStackSlot ( unsigned  Reg)
inlinestatic

isStackSlot - Sometimes it is useful the be able to store a non-negative frame index in a variable that normally holds a register.

isStackSlot() returns true if Reg is in the range used for stack slots.

Note that isVirtualRegister() and isPhysicalRegister() cannot handle stack slots, so if a variable may contains a stack slot, always check isStackSlot() first.

Definition at line 45 of file Register.h.

References llvm::MCRegister::isStackSlot().

Referenced by isFullUndefDef(), isLoadStoreThatCanHandleDisplacement(), llvm::rdf::PhysicalRegisterInfo::isRegMaskId(), isVirtualRegister(), llvm::printReg(), and stackSlot2Index().

◆ isValid()

bool llvm::Register::isValid ( ) const
inline

◆ isVirtual()

bool llvm::Register::isVirtual ( ) const
inline

◆ isVirtualRegister()

static bool llvm::Register::isVirtualRegister ( unsigned  Reg)
inlinestatic

Return true if the specified register number is in the virtual register namespace.

Definition at line 69 of file Register.h.

References assert(), and isStackSlot().

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::LiveVariables::addNewBlock(), llvm::MachineRegisterInfo::addRegAllocationHint(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), addSegmentsWithValNo(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::RegisterOperands::adjustLaneLiveness(), llvm::GCNDownwardRPTracker::advanceToNext(), llvm::RegAllocBase::allocatePhysRegs(), allPhiOperandsUndefined(), atomicReadDroppedOnZero(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::calculateDbgEntityHistory(), canClobberPhysRegDefs(), canCombine(), canFoldCopy(), canFoldIntoCSel(), canFoldIntoSelect(), CheckForPhysRegDependency(), llvm::X86InstrInfo::classifyLEAReg(), collectVirtualRegUses(), llvm::ScheduleDAGMILive::collectVRegUses(), llvm::ARMBaseInstrInfo::commuteInstructionImpl(), computeBranchTargetAndInversion(), llvm::ScheduleDAGMILive::computeCyclicCriticalPath(), llvm::HexagonBlockRanges::computeDeadMap(), computeLiveOuts(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::FunctionLoweringInfo::ComputePHILiveOutRegInfo(), llvm::LiveInterval::computeSubRangeUndefs(), llvm::constrainOperandRegClass(), llvm::FastISel::constrainOperandRegClass(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), copyHint(), llvm::WebAssemblyInstrInfo::copyPhysReg(), createBBSelectReg(), llvm::createCopyConstrainDAGMutation(), llvm::createGreedyRegisterAllocator(), llvm::createR600ISelDag(), llvm::createSIWholeQuadModePass(), definesFullReg(), dominatesAllUsesOf(), dumpMachineInstrRangeWithSlotIndex(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::InstrEmitter::EmitDbgLabel(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::ThumbRegisterInfo::emitLoadConstPool(), emitThumbRegPlusImmInReg(), llvm::LiveRangeEdit::eraseVirtReg(), llvm::HexagonEvaluator::evaluate(), llvm::BitTracker::MachineEvaluator::evaluate(), llvm::HexagonBlockRanges::expandToSubRegs(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::SIRegisterInfo::findReachingDef(), findSinkableLocalRegDef(), findSRegBaseAndIndex(), findSurvivorBackwards(), llvm::SIInstrInfo::FoldImmediate(), foldImmediates(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), genFusedMultiply(), genMaddR(), getCallTargetRegOpnd(), llvm::BitTracker::MachineEvaluator::getCell(), llvm::RegsForValue::getCopyFromRegs(), getCopyRegClasses(), llvm::PPCInstrInfo::getDefMIPostRA(), getDefRegMask(), getDepthOfOptCmov(), llvm::NVPTXAsmPrinter::getFunctionFrameSymbol(), llvm::MachineInstrExpressionTrait::getHashValue(), getImmOrMaterializedImm(), llvm::R600InstrInfo::getIndirectIndexBegin(), getLanesWithProperty(), getLiveLanesAt(), getLiveRange(), getMappedReg(), llvm::MachineRegisterInfo::getMaxLaneMaskForVReg(), getMopState(), getNewSource(), getOModValue(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), llvm::SIRegisterInfo::getPhysRegClass(), llvm::TargetRegisterInfo::getRegAllocationHints(), llvm::MachineRegisterInfo::getRegAllocationHints(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), llvm::SIRegisterInfo::getRegClassForReg(), llvm::RegScavenger::getRegsAvailable(), getRegsUsedByPHIs(), llvm::MachineRegisterInfo::getType(), getUsedRegMask(), llvm::LiveVariables::getVarInfo(), llvm::getVRegSubRegDef(), llvm::LiveVariables::HandleVirtRegDef(), llvm::VirtRegMap::hasKnownPreference(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), llvm::TargetInstrInfo::hasReassociableOperands(), hasUseAfterLoop(), hasVectorOperands(), hoistAndMergeSGPRInits(), INITIALIZE_PASS(), llvm::RegPressureTracker::initLiveThru(), instAccessReg(), isCallerPreservedOrConstPhysReg(), llvm::WebAssembly::isChild(), isCoalescable(), isCopyFeedingInvariantStore(), isCrossCopy(), isCVTAToLocalCombinationCandidate(), isDebug(), isDefBetween(), isDefInSubRange(), isEFLAGSLive(), llvm::isEqual(), isFPR64(), isFullCopyOf(), llvm::MachineInstr::isIdenticalTo(), isImplicitOperandIn(), isInvariantStore(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::R600InstrInfo::isLegalToSplitMBBAt(), isLoadStoreThatCanHandleDisplacement(), isNopCopy(), isPhysicalRegCopy(), llvm::R600RegisterInfo::isPhysRegLiveAcrossClauses(), isPlainlyKilled(), isRematerializable(), llvm::SIRegisterInfo::isSGPRReg(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isUncheckedLoadOrStoreOpcode(), isVirtual(), isVirtualRegisterOperand(), isVRegCompatibleReg(), llvm::SIInstrInfo::legalizeOperands(), llvm::Mips16InstrInfo::loadImmediate(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::TargetRegisterInfo::lookThruCopyLike(), MatchingStackOffset(), matchSwap(), llvm::BitTracker::RegisterCell::meet(), llvm::SIInstrInfo::moveToVALU(), needsStackFrame(), oneUseDominatesOtherUses(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), optimizeVcndVcmpPair(), llvm::SMSchedule::orderDependence(), llvm::MachineOperand::print(), llvm::printReg(), llvm::printVRegOrUnit(), llvm::ARMBaseInstrInfo::produceSameValue(), profitImm(), propagateLocalCopies(), llvm::PSetIterator::PSetIterator(), pushDepHeight(), llvm::BitTracker::MachineEvaluator::putCell(), llvm::R600InstrInfo::readsLDSSrcReg(), llvm::TargetInstrInfo::reassociateOps(), llvm::GCNUpwardRPTracker::recede(), llvm::RegPressureTracker::recede(), regIsPICBase(), llvm::WebAssemblyAsmPrinter::regToString(), llvm::R600SchedStrategy::releaseBottomNode(), removeCopies(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::LiveIntervals::repairIntervalsInRange(), rescheduleCanonically(), llvm::rewriteT2FrameIndex(), llvm::InstructionSelect::runOnMachineFunction(), llvm::SelectionDAGISel::runOnMachineFunction(), scavengeFrameVirtualRegsInBlock(), llvm::RegScavenger::scavengeRegister(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::MachineRegisterInfo::setRegAllocationHint(), llvm::CoalescerPair::setRegisters(), llvm::SIInstrInfo::shouldClusterMemOps(), shrinkScalarLogicOp(), llvm::LiveIntervals::shrinkToUses(), llvm::SIScheduleBlockScheduler::SIScheduleBlockScheduler(), llvm::LiveDebugVariables::splitRegister(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), llvm::SIInstrInfo::storeRegToStackSlot(), stripValuesNotDefiningMask(), swapMIOperands(), tryChangeVGPRtoSGPRinCopy(), tryFoldInst(), tryToElideArgumentCopy(), tryToFoldACImm(), llvm::LiveIntervals::HMEditor::updateAllRanges(), updateOperandRegConstraints(), updatePhysDepsDownwards(), llvm::ScheduleDAGMILive::updatePressureDiffs(), llvm::ARMBaseRegisterInfo::updateRegAllocHint(), usedAsAddr(), llvm::SIInstrInfo::usesConstantBus(), llvm::MachineTraceMetrics::Ensemble::verify(), llvm::MachineFunction::verify(), llvm::SIInstrInfo::verifyInstruction(), virtReg2Index(), VisitGlobalVariableForEmission(), and llvm::VirtRegAuxInfo::weightCalcHelper().

◆ operator MCRegister()

llvm::Register::operator MCRegister ( ) const
inline

Definition at line 111 of file Register.h.

◆ operator unsigned()

llvm::Register::operator unsigned ( ) const
inline

Definition at line 105 of file Register.h.

◆ operator!=() [1/5]

bool llvm::Register::operator!= ( const Register Other) const
inline

Definition at line 121 of file Register.h.

◆ operator!=() [2/5]

bool llvm::Register::operator!= ( const MCRegister Other) const
inline

Definition at line 123 of file Register.h.

References llvm::MCRegister::id().

◆ operator!=() [3/5]

bool llvm::Register::operator!= ( unsigned  Other) const
inline

Definition at line 130 of file Register.h.

◆ operator!=() [4/5]

bool llvm::Register::operator!= ( int  Other) const
inline

Definition at line 132 of file Register.h.

◆ operator!=() [5/5]

bool llvm::Register::operator!= ( MCPhysReg  Other) const
inline

Definition at line 135 of file Register.h.

◆ operator==() [1/5]

bool llvm::Register::operator== ( const Register Other) const
inline

Comparisons between register objects.

Definition at line 120 of file Register.h.

◆ operator==() [2/5]

bool llvm::Register::operator== ( const MCRegister Other) const
inline

Definition at line 122 of file Register.h.

References llvm::MCRegister::id().

◆ operator==() [3/5]

bool llvm::Register::operator== ( unsigned  Other) const
inline

Comparisons against register constants.

E.g.

Definition at line 129 of file Register.h.

◆ operator==() [4/5]

bool llvm::Register::operator== ( int  Other) const
inline

Definition at line 131 of file Register.h.

◆ operator==() [5/5]

bool llvm::Register::operator== ( MCPhysReg  Other) const
inline

Definition at line 134 of file Register.h.

◆ stackSlot2Index()

static int llvm::Register::stackSlot2Index ( unsigned  Reg)
inlinestatic

Compute the frame index from a register value representing a stack slot.

Definition at line 50 of file Register.h.

References assert(), and isStackSlot().

Referenced by llvm::rdf::PhysicalRegisterInfo::getMaskUnits(), llvm::rdf::PhysicalRegisterInfo::getRegMaskBits(), false::IntervalSorter::operator()(), and llvm::printReg().

◆ virtReg2Index()

static unsigned llvm::Register::virtReg2Index ( unsigned  Reg)
inlinestatic

◆ virtRegIndex()

unsigned llvm::Register::virtRegIndex ( ) const
inline

Convert a virtual register number to a 0-based index.

The first virtual register in a function will get the index 0.

Definition at line 101 of file Register.h.

References virtReg2Index().


The documentation for this class was generated from the following file: