llvm::SUnit Member List

This is the complete list of members for llvm::SUnit, including all inherited members.

addPred(const SDep &D, bool Required=true)	llvm::SUnit
addPredBarrier(SUnit *SU)	llvm::SUnit	inline
biasCriticalPath()	llvm::SUnit
BotReadyCycle	llvm::SUnit
const_pred_iterator typedef	llvm::SUnit
const_succ_iterator typedef	llvm::SUnit
CopyDstRC	llvm::SUnit
CopySrcRC	llvm::SUnit
dumpAttributes() const	llvm::SUnit
getDepth() const	llvm::SUnit	inline
getHeight() const	llvm::SUnit	inline
getInstr() const	llvm::SUnit	inline
getNode() const	llvm::SUnit	inline
hasPhysRegClobbers	llvm::SUnit
hasPhysRegDefs	llvm::SUnit
hasPhysRegUses	llvm::SUnit
hasReservedResource	llvm::SUnit
isAvailable	llvm::SUnit
isBottomReady() const	llvm::SUnit	inline
isBoundaryNode() const	llvm::SUnit	inline
isCall	llvm::SUnit
isCallOp	llvm::SUnit
isCloned	llvm::SUnit
isCommutable	llvm::SUnit
isInstr() const	llvm::SUnit	inline
isPending	llvm::SUnit
isPred(const SUnit *N) const	llvm::SUnit	inline
isScheduled	llvm::SUnit
isScheduleHigh	llvm::SUnit
isScheduleLow	llvm::SUnit
isSucc(const SUnit *N) const	llvm::SUnit	inline
isTopReady() const	llvm::SUnit	inline
isTwoAddress	llvm::SUnit
isUnbuffered	llvm::SUnit
isVRegCycle	llvm::SUnit
Latency	llvm::SUnit
NodeNum	llvm::SUnit
NodeQueueId	llvm::SUnit
NumPreds	llvm::SUnit
NumPredsLeft	llvm::SUnit
NumRegDefsLeft	llvm::SUnit
NumSuccs	llvm::SUnit
NumSuccsLeft	llvm::SUnit
OrigNode	llvm::SUnit
pred_iterator typedef	llvm::SUnit
Preds	llvm::SUnit
removePred(const SDep &D)	llvm::SUnit
SchedClass	llvm::SUnit
SchedulingPref	llvm::SUnit
setDepthDirty()	llvm::SUnit
setDepthToAtLeast(unsigned NewDepth)	llvm::SUnit
setHeightDirty()	llvm::SUnit
setHeightToAtLeast(unsigned NewHeight)	llvm::SUnit
setInstr(MachineInstr *MI)	llvm::SUnit	inline
setNode(SDNode *N)	llvm::SUnit	inline
succ_iterator typedef	llvm::SUnit
Succs	llvm::SUnit
SUnit(SDNode *node, unsigned nodenum)	llvm::SUnit	inline
SUnit(MachineInstr *instr, unsigned nodenum)	llvm::SUnit	inline
SUnit()	llvm::SUnit	inline
TopReadyCycle	llvm::SUnit
WeakPredsLeft	llvm::SUnit
WeakSuccsLeft	llvm::SUnit