RISCVCallLowering.cpp File Reference

This file implements the lowering of LLVM calls to machine code calls for GlobalISel. More...

#include "RISCVCallLowering.h"
#include "RISCVCallingConv.h"
#include "RISCVISelLowering.h"
#include "RISCVMachineFunctionInfo.h"
#include "RISCVSubtarget.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include <functional>

Go to the source code of this file.

Functions
static bool	isLegalElementTypeForRVV (Type *EltTy, const RISCVSubtarget &Subtarget)
	Return true if scalable vector with ScalarTy is legal for lowering.
static bool	isSupportedArgumentType (Type *T, const RISCVSubtarget &Subtarget, bool IsLowerArgs=false)
static bool	isSupportedReturnType (Type *T, const RISCVSubtarget &Subtarget, bool IsLowerRetVal=false)
static void	markSExt32Registers (MachineFunction &MF, ArrayRef< CallLowering::ArgInfo > Args, ArrayRef< CCValAssign > ArgLocs)
	Note the registers holding incoming arguments that the ABI guarantees are sign extended from 32 bits for the RISCVOptWInstrs pass.

Detailed Description

This file implements the lowering of LLVM calls to machine code calls for GlobalISel.

Definition in file RISCVCallLowering.cpp.

Function Documentation

isLegalElementTypeForRVV()

bool isLegalElementTypeForRVV ( Type * EltTy, const RISCVSubtarget & Subtarget )

static

Return true if scalable vector with ScalarTy is legal for lowering.

Definition at line 298 of file RISCVCallLowering.cpp.

References llvm::RISCVSubtarget::hasVInstructionsBF16Minimal(), llvm::RISCVSubtarget::hasVInstructionsF16Minimal(), llvm::RISCVSubtarget::hasVInstructionsF32(), llvm::RISCVSubtarget::hasVInstructionsF64(), llvm::RISCVSubtarget::hasVInstructionsI64(), llvm::RISCVSubtarget::is64Bit(), llvm::Type::isBFloatTy(), llvm::Type::isDoubleTy(), llvm::Type::isFloatTy(), llvm::Type::isHalfTy(), llvm::Type::isIntegerTy(), and llvm::Type::isPointerTy().

Referenced by isSupportedArgumentType(), and isSupportedReturnType().

isSupportedArgumentType()

bool isSupportedArgumentType ( Type * T, const RISCVSubtarget & Subtarget, bool IsLowerArgs = false )

static

Definition at line 320 of file RISCVCallLowering.cpp.

References llvm::RISCVSubtarget::hasVInstructions(), isLegalElementTypeForRVV(), isSupportedArgumentType(), and T.

isSupportedReturnType()

bool isSupportedReturnType ( Type * T, const RISCVSubtarget & Subtarget, bool IsLowerRetVal = false )

static

Definition at line 345 of file RISCVCallLowering.cpp.

References llvm::cast(), llvm::RISCVSubtarget::hasVInstructions(), isLegalElementTypeForRVV(), isSupportedReturnType(), and T.

markSExt32Registers()

void markSExt32Registers ( MachineFunction & MF, ArrayRef< CallLowering::ArgInfo > Args, ArrayRef< CCValAssign > ArgLocs )

static

Note the registers holding incoming arguments that the ABI guarantees are sign extended from 32 bits for the RISCVOptWInstrs pass.

Definition at line 497 of file RISCVCallLowering.cpp.

References llvm::RISCVMachineFunctionInfo::addSExt32Register(), llvm::BitWidth, llvm::dyn_cast(), llvm::CallLowering::BaseArgInfo::Flags, llvm::MachineFunction::getInfo(), llvm::CCValAssign::getLocVT(), llvm::MachineFunction::getSubtarget(), llvm::CCValAssign::getValNo(), llvm::RISCVSubtarget::is64Bit(), llvm::CCValAssign::isRegLoc(), llvm::CallLowering::ArgInfo::Regs, and llvm::CallLowering::BaseArgInfo::Ty.

Referenced by llvm::RISCVCallLowering::lowerFormalArguments().