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LLVM 23.0.0git
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#include "MCTargetDesc/RISCVBaseInfo.h"#include "MCTargetDesc/RISCVMCTargetDesc.h"#include "TargetInfo/RISCVTargetInfo.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDecoder.h"#include "llvm/MC/MCDecoderOps.h"#include "llvm/MC/MCDisassembler/MCDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrInfo.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/MC/TargetRegistry.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Endian.h"#include "RISCVGenDisassemblerTables.inc"Go to the source code of this file.
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| #define | DEBUG_TYPE "riscv-disassembler" |
Variables | |
| constexpr auto | DecodeGPRRegisterClass |
| constexpr auto | DecodeGPRNoX0RegisterClass |
| constexpr auto | DecodeGPRNoX2RegisterClass |
| constexpr auto | DecodeGPRNoX31RegisterClass |
| constexpr auto | DecodeGPRPairNoX0RegisterClass |
| static constexpr FeatureBitset | XCVFeatureGroup |
| static constexpr FeatureBitset | XRivosFeatureGroup |
| static constexpr FeatureBitset | XqciFeatureGroup |
| static constexpr FeatureBitset | XSfVectorGroup |
| static constexpr FeatureBitset | XSfSystemGroup |
| static constexpr FeatureBitset | XMIPSGroup |
| static constexpr FeatureBitset | XTHeadGroup |
| static constexpr FeatureBitset | XAndesGroup |
| static constexpr FeatureBitset | XSMTGroup = {RISCV::FeatureVendorXSMTVDot} |
| static constexpr FeatureBitset | XAIFGroup = {RISCV::FeatureVendorXAIFET} |
| static constexpr DecoderListEntry | DecoderList32 [] |
| static constexpr DecoderListEntry | DecoderList16 [] |
| static constexpr DecoderListEntry | DecoderList48 [] |
| #define DEBUG_TYPE "riscv-disassembler" |
Definition at line 31 of file RISCVDisassembler.cpp.
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Definition at line 62 of file RISCVDisassembler.cpp.
References T.
Referenced by LLVMInitializeRISCVDisassembler().
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Definition at line 388 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 137 of file RISCVDisassembler.cpp.
References llvm::MCDisassembler::Fail.
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Definition at line 399 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), llvm::RISCVFPRndMode::isValidRoundingMode(), and llvm::MCDisassembler::Success.
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Definition at line 175 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, and llvm::MCDisassembler::Success.
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Definition at line 156 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, and llvm::MCDisassembler::Success.
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Definition at line 110 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 99 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.
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Definition at line 130 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 260 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 254 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 349 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 368 of file RISCVDisassembler.cpp.
References decodeSImmOperand(), and llvm::MCDisassembler::Fail.
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Definition at line 358 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
Referenced by decodeSImmNonZeroOperand().
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Definition at line 377 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), N, llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 82 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), Reg, and llvm::MCDisassembler::Success.
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Definition at line 116 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 122 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 191 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.
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Definition at line 220 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.
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Definition at line 231 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.
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Definition at line 333 of file RISCVDisassembler.cpp.
References decodeUImmLog2XLenOperand(), and llvm::MCDisassembler::Fail.
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Definition at line 310 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), llvm::isUInt(), and llvm::MCDisassembler::Success.
Referenced by decodeUImmLog2XLenNonZeroOperand().
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Definition at line 324 of file RISCVDisassembler.cpp.
References decodeUImmOperand(), and llvm::MCDisassembler::Fail.
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Definition at line 267 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.
Referenced by decodeUImmNonZeroOperand().
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Definition at line 276 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 341 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 289 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 301 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::isUInt(), and llvm::MCDisassembler::Success.
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Definition at line 203 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCRegisterInfo::getMatchingSuperReg(), Reg, and llvm::MCDisassembler::Success.
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Definition at line 242 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Reg, and llvm::MCDisassembler::Success.
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Definition at line 419 of file RISCVDisassembler.cpp.
References decodeZcmpRlist(), llvm::MCDisassembler::Fail, and llvm::RISCVZC::RA_S0.
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Definition at line 409 of file RISCVDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::getSubtargetInfo(), llvm::MCSubtargetInfo::hasFeature(), llvm::RISCVZC::RA, llvm::RISCVZC::RA_S0_S2, and llvm::MCDisassembler::Success.
Referenced by decodeXqccmpRlistS0().
| LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVDisassembler | ( | ) |
Definition at line 69 of file RISCVDisassembler.cpp.
References createRISCVDisassembler(), llvm::getTheRISCV32beTarget(), llvm::getTheRISCV32Target(), llvm::getTheRISCV64beTarget(), llvm::getTheRISCV64Target(), and llvm::TargetRegistry::RegisterMCDisassembler().
Definition at line 145 of file RISCVDisassembler.cpp.
Definition at line 146 of file RISCVDisassembler.cpp.
Definition at line 147 of file RISCVDisassembler.cpp.
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Definition at line 149 of file RISCVDisassembler.cpp.
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Definition at line 151 of file RISCVDisassembler.cpp.
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Definition at line 153 of file RISCVDisassembler.cpp.
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Definition at line 172 of file RISCVDisassembler.cpp.
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Definition at line 96 of file RISCVDisassembler.cpp.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5FP16Operand(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeForVMRSandVMSR(), DecodeGPRnopcRegisterClass(), DecodeGPRNoR0R1RegisterClass(), DecodeGPRnospRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeGPRwithZRRegisterClass(), DecodeLazyLoadStoreMul(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeMVEVMOVDRegtoQ(), DecodeMVEVMOVQtoDReg(), DecodeRegListOperand(), DecodeRegSeqOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 562 of file RISCVDisassembler.cpp.
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Definition at line 503 of file RISCVDisassembler.cpp.
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Definition at line 609 of file RISCVDisassembler.cpp.
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Definition at line 501 of file RISCVDisassembler.cpp.
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Definition at line 493 of file RISCVDisassembler.cpp.
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Definition at line 444 of file RISCVDisassembler.cpp.
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Definition at line 478 of file RISCVDisassembler.cpp.
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Definition at line 454 of file RISCVDisassembler.cpp.
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Definition at line 450 of file RISCVDisassembler.cpp.
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Definition at line 473 of file RISCVDisassembler.cpp.
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Definition at line 466 of file RISCVDisassembler.cpp.
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Definition at line 499 of file RISCVDisassembler.cpp.
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Definition at line 485 of file RISCVDisassembler.cpp.