LLVM  14.0.0git
AMDGPUMCCodeEmitter.h
Go to the documentation of this file.
1 //===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// CodeEmitter interface for SI codegen.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
15 #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCCODEEMITTER_H
16 
17 #include "llvm/MC/MCCodeEmitter.h"
18 #include <cstdint>
19 
20 namespace llvm {
21 
22 class MCInst;
23 class MCInstrInfo;
24 class MCOperand;
25 class MCSubtargetInfo;
26 class FeatureBitset;
27 
29  virtual void anchor();
30 
31 protected:
32  const MCInstrInfo &MCII;
33 
34  AMDGPUMCCodeEmitter(const MCInstrInfo &mcii) : MCII(mcii) {}
35 
36 public:
37 
40  const MCSubtargetInfo &STI) const;
41 
42  virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
44  const MCSubtargetInfo &STI) const {
45  return 0;
46  }
47 
48  virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
50  const MCSubtargetInfo &STI) const {
51  return 0;
52  }
53 
54  virtual unsigned getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo,
56  const MCSubtargetInfo &STI) const {
57  return 0;
58  }
59 
60  virtual unsigned getSDWASrcEncoding(const MCInst &MI, unsigned OpNo,
62  const MCSubtargetInfo &STI) const {
63  return 0;
64  }
65 
66  virtual unsigned getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo,
68  const MCSubtargetInfo &STI) const {
69  return 0;
70  }
71 
72  virtual unsigned getAVOperandEncoding(const MCInst &MI, unsigned OpNo,
74  const MCSubtargetInfo &STI) const {
75  return 0;
76  }
77 
78 protected:
80  void
82  const FeatureBitset &AvailableFeatures) const;
83 };
84 
85 } // End namespace llvm
86 
87 #endif
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::AMDGPUMCCodeEmitter::getSOPPBrEncoding
virtual unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: AMDGPUMCCodeEmitter.h:48
MCCodeEmitter.h
llvm::AMDGPUMCCodeEmitter::getSDWAVopcDstEncoding
virtual unsigned getSDWAVopcDstEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: AMDGPUMCCodeEmitter.h:66
llvm::FeatureBitset
Container class for subtarget features.
Definition: SubtargetFeature.h:40
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:184
llvm::AMDGPUMCCodeEmitter::computeAvailableFeatures
FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const
llvm::AMDGPUMCCodeEmitter::verifyInstructionPredicates
void verifyInstructionPredicates(const MCInst &MI, const FeatureBitset &AvailableFeatures) const
llvm::AMDGPUMCCodeEmitter::getMachineOpValue
virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: AMDGPUMCCodeEmitter.h:42
llvm::AArch64::Fixups
Fixups
Definition: AArch64FixupKinds.h:17
llvm::AMDGPUMCCodeEmitter::AMDGPUMCCodeEmitter
AMDGPUMCCodeEmitter(const MCInstrInfo &mcii)
Definition: AMDGPUMCCodeEmitter.h:34
uint64_t
llvm::AMDGPUMCCodeEmitter::getSMEMOffsetEncoding
virtual unsigned getSMEMOffsetEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: AMDGPUMCCodeEmitter.h:54
llvm::AMDGPUMCCodeEmitter::MCII
const MCInstrInfo & MCII
Definition: AMDGPUMCCodeEmitter.h:32
llvm::AMDGPUMCCodeEmitter::getBinaryCodeForInstr
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
llvm::AMDGPUMCCodeEmitter
Definition: AMDGPUMCCodeEmitter.h:28
llvm::AMDGPUMCCodeEmitter::getSDWASrcEncoding
virtual unsigned getSDWASrcEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: AMDGPUMCCodeEmitter.h:60
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:25
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
llvm::AMDGPUMCCodeEmitter::getAVOperandEncoding
virtual unsigned getAVOperandEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: AMDGPUMCCodeEmitter.h:72
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:36
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75