LLVM  16.0.0git
HexagonDepArch.h
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1 //===----------------------------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
11 
12 #include "llvm/ADT/StringSwitch.h"
13 #include <optional>
14 
15 namespace llvm {
16 namespace Hexagon {
17 enum class ArchEnum {
18  NoArch,
19  Generic,
20  V5,
21  V55,
22  V60,
23  V62,
24  V65,
25  V66,
26  V67,
27  V68,
28  V69,
29  V71,
30  V73
31 };
32 
33 inline std::optional<Hexagon::ArchEnum> getCpu(StringRef CPU) {
35  .Case("generic", Hexagon::ArchEnum::V5)
36  .Case("hexagonv5", Hexagon::ArchEnum::V5)
37  .Case("hexagonv55", Hexagon::ArchEnum::V55)
38  .Case("hexagonv60", Hexagon::ArchEnum::V60)
39  .Case("hexagonv62", Hexagon::ArchEnum::V62)
40  .Case("hexagonv65", Hexagon::ArchEnum::V65)
41  .Case("hexagonv66", Hexagon::ArchEnum::V66)
42  .Case("hexagonv67", Hexagon::ArchEnum::V67)
43  .Case("hexagonv67t", Hexagon::ArchEnum::V67)
44  .Case("hexagonv68", Hexagon::ArchEnum::V68)
45  .Case("hexagonv69", Hexagon::ArchEnum::V69)
46  .Case("hexagonv71", Hexagon::ArchEnum::V71)
47  .Case("hexagonv71t", Hexagon::ArchEnum::V71)
48  .Case("hexagonv73", Hexagon::ArchEnum::V73)
49  .Default(std::nullopt);
50 }
51 } // namespace Hexagon
52 } // namespace llvm
53 
54 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H
llvm::StringSwitch::Case
StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:69
llvm::Hexagon::ArchEnum::V73
@ V73
llvm::Hexagon::ArchEnum
ArchEnum
Definition: HexagonDepArch.h:17
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::Hexagon::ArchEnum::NoArch
@ NoArch
llvm::Hexagon::ArchEnum::V65
@ V65
llvm::Hexagon::ArchEnum::V5
@ V5
llvm::Hexagon::ArchEnum::V66
@ V66
llvm::Hexagon::ArchEnum::Generic
@ Generic
llvm::Hexagon::ArchEnum::V71
@ V71
llvm::Hexagon::ArchEnum::V62
@ V62
llvm::Hexagon::ArchEnum::V67
@ V67
llvm::Hexagon::ArchEnum::V55
@ V55
llvm::Hexagon::getCpu
std::optional< Hexagon::ArchEnum > getCpu(StringRef CPU)
Definition: HexagonDepArch.h:33
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::Hexagon::ArchEnum::V69
@ V69
StringSwitch.h
llvm::Hexagon::ArchEnum::V68
@ V68
llvm::StringSwitch::Default
R Default(T Value)
Definition: StringSwitch.h:182
llvm::Hexagon::ArchEnum::V60
@ V60
llvm::StringSwitch
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:44