RISCVMCInstLower.cpp File Reference

#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "MCTargetDesc/RISCVMCExpr.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"

Go to the source code of this file.

Functions
static MCOperand	lowerSymbolOperand (const MachineOperand &MO, MCSymbol *Sym, const AsmPrinter &AP)
static bool	lowerRISCVVMachineInstrToMCInst (const MachineInstr *MI, MCInst &OutMI)

Function Documentation

lowerRISCVVMachineInstrToMCInst()

static bool lowerRISCVVMachineInstrToMCInst ( const MachineInstr *  MI, MCInst &  OutMI  )

static

Definition at line 135 of file RISCVMCInstLower.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::RISCVVPseudosTable::PseudoInfo::BaseInstr, contains(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MachineOperand::getImm(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::getType(), llvm::RISCVII::hasDummyMaskOp(), llvm::RISCVII::hasMergeOp(), llvm::RISCVII::hasSEWOp(), llvm::RISCVII::hasVecPolicyOp(), llvm::RISCVII::hasVLOp(), llvm::RISCV::isFaultFirstLoad(), llvm_unreachable, MBB, MI, llvm::MachineOperand::MO_Immediate, llvm::MachineOperand::MO_Register, llvm::MCInst::setOpcode(), TRI, and TSFlags.

Referenced by llvm::lowerRISCVMachineInstrToMCInst().

lowerSymbolOperand()

static MCOperand lowerSymbolOperand ( const MachineOperand &  MO, MCSymbol *  Sym, const AsmPrinter &  AP  )

static

Definition at line 29 of file RISCVMCInstLower.cpp.

References llvm::RISCVMCExpr::create(), llvm::MCSymbolRefExpr::create(), llvm::MCConstantExpr::create(), llvm::MCBinaryExpr::createAdd(), llvm::MCOperand::createExpr(), llvm::MachineOperand::getOffset(), llvm::MachineOperand::getTargetFlags(), llvm::MachineOperand::isJTI(), llvm::MachineOperand::isMBB(), llvm_unreachable, llvm::RISCVII::MO_CALL, llvm::RISCVII::MO_GOT_HI, llvm::RISCVII::MO_HI, llvm::RISCVII::MO_LO, llvm::RISCVII::MO_None, llvm::RISCVII::MO_PCREL_HI, llvm::RISCVII::MO_PCREL_LO, llvm::RISCVII::MO_PLT, llvm::RISCVII::MO_TLS_GD_HI, llvm::RISCVII::MO_TLS_GOT_HI, llvm::RISCVII::MO_TPREL_ADD, llvm::RISCVII::MO_TPREL_HI, llvm::RISCVII::MO_TPREL_LO, llvm::AsmPrinter::OutContext, Sym, llvm::MCSymbolRefExpr::VK_None, llvm::RISCVMCExpr::VK_RISCV_CALL, llvm::RISCVMCExpr::VK_RISCV_CALL_PLT, llvm::RISCVMCExpr::VK_RISCV_GOT_HI, llvm::RISCVMCExpr::VK_RISCV_HI, llvm::RISCVMCExpr::VK_RISCV_LO, llvm::RISCVMCExpr::VK_RISCV_None, llvm::RISCVMCExpr::VK_RISCV_PCREL_HI, llvm::RISCVMCExpr::VK_RISCV_PCREL_LO, llvm::RISCVMCExpr::VK_RISCV_TLS_GD_HI, llvm::RISCVMCExpr::VK_RISCV_TLS_GOT_HI, llvm::RISCVMCExpr::VK_RISCV_TPREL_ADD, llvm::RISCVMCExpr::VK_RISCV_TPREL_HI, and llvm::RISCVMCExpr::VK_RISCV_TPREL_LO.

Referenced by llvm::lowerRISCVMachineOperandToMCOperand().