LLVM 19.0.0git
llvm::AArch64Subtarget Member List

This is the complete list of members for llvm::AArch64Subtarget, including all inherited members.

AArch64Subtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const TargetMachine &TM, bool LittleEndian, unsigned MinSVEVectorSizeInBitsOverride=0, unsigned MaxSVEVectorSizeInBitsOverride=0, bool IsStreaming=false, bool IsStreamingCompatible=false, bool HasMinSize=false)llvm::AArch64Subtarget
addrSinkUsingGEPs() const overridellvm::AArch64Subtargetinline
adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use, int UseOpIdx, SDep &Dep, const TargetSchedModel *SchedModel) const overridellvm::AArch64Subtarget
ARMProcFamilyllvm::AArch64Subtargetprotected
ARMProcFamilyEnum enum namellvm::AArch64Subtarget
CacheLineSizellvm::AArch64Subtargetprotected
CallLoweringInfollvm::AArch64Subtargetprotected
classifyGlobalFunctionReference(const GlobalValue *GV, const TargetMachine &TM) constllvm::AArch64Subtarget
classifyGlobalFunctionReference(const GlobalValue *GV) const overridellvm::AArch64Subtargetinline
ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) constllvm::AArch64Subtarget
CustomCallSavedXRegsllvm::AArch64Subtargetprotected
DefaultSVETFOptsllvm::AArch64Subtargetprotected
enableEarlyIfConversion() const overridellvm::AArch64Subtarget
enableMachinePipeliner() const overridellvm::AArch64Subtarget
enableMachineScheduler() const overridellvm::AArch64Subtargetinline
enablePostRAScheduler() const overridellvm::AArch64Subtargetinline
FrameLoweringllvm::AArch64Subtargetprotected
getAddressCheckPSV() constllvm::AArch64Subtargetinline
getAuthenticatedLRCheckMethod() constllvm::AArch64Subtarget
getCacheLineSize() const overridellvm::AArch64Subtargetinline
getCallLowering() const overridellvm::AArch64Subtarget
getChkStkName() constllvm::AArch64Subtargetinline
getCustomPBQPConstraints() const overridellvm::AArch64Subtarget
getFrameLowering() const overridellvm::AArch64Subtargetinline
getInlineAsmLowering() const overridellvm::AArch64Subtarget
getInstrInfo() const overridellvm::AArch64Subtargetinline
getInstructionSelector() const overridellvm::AArch64Subtarget
getLegalizerInfo() const overridellvm::AArch64Subtarget
getMaxBytesForLoopAlignment() constllvm::AArch64Subtargetinline
getMaximumJumpTableSize() constllvm::AArch64Subtargetinline
getMaxInterleaveFactor() constllvm::AArch64Subtargetinline
getMaxPrefetchIterationsAhead() const overridellvm::AArch64Subtargetinline
getMaxSVEVectorSizeInBits() constllvm::AArch64Subtargetinline
getMinimumJumpTableEntries() constllvm::AArch64Subtargetinline
getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const overridellvm::AArch64Subtargetinline
getMinSVEVectorSizeInBits() constllvm::AArch64Subtargetinline
getMinVectorRegisterBitWidth() constllvm::AArch64Subtargetinline
getNumXRegisterReserved() constllvm::AArch64Subtargetinline
getPrefetchDistance() const overridellvm::AArch64Subtargetinline
getPrefFunctionAlignment() constllvm::AArch64Subtargetinline
getPrefLoopAlignment() constllvm::AArch64Subtargetinline
getProcFamily() constllvm::AArch64Subtargetinline
getRegBankInfo() const overridellvm::AArch64Subtarget
getRegisterInfo() const overridellvm::AArch64Subtargetinline
getSecurityCheckCookieName() constllvm::AArch64Subtargetinline
getSelectionDAGInfo() const overridellvm::AArch64Subtargetinline
getSVETailFoldingDefaultOpts() constllvm::AArch64Subtargetinline
getTargetLowering() const overridellvm::AArch64Subtargetinline
getTargetTriple() constllvm::AArch64Subtargetinline
getVectorInsertExtractBaseCost() constllvm::AArch64Subtarget
getVScaleForTuning() constllvm::AArch64Subtargetinline
hasCustomCallingConv() constllvm::AArch64Subtargetinline
hasFusion() constllvm::AArch64Subtargetinline
hasSVE2orSME() constllvm::AArch64Subtargetinline
hasSVEorSME() constllvm::AArch64Subtargetinline
InlineAsmLoweringInfollvm::AArch64Subtargetprotected
InstrInfollvm::AArch64Subtargetprotected
InstSelectorllvm::AArch64Subtargetprotected
isCallingConvWin64(CallingConv::ID CC) constllvm::AArch64Subtargetinline
IsLittlellvm::AArch64Subtargetprotected
isLittleEndian() constllvm::AArch64Subtargetinline
isNeonAvailable() constllvm::AArch64Subtargetinline
isStreaming() constllvm::AArch64Subtargetinline
IsStreamingllvm::AArch64Subtargetprotected
IsStreamingCompatiblellvm::AArch64Subtargetprotected
isStreamingCompatible() constllvm::AArch64Subtargetinline
isSVEAvailable() constllvm::AArch64Subtargetinline
isTargetAndroid() constllvm::AArch64Subtargetinline
isTargetCOFF() constllvm::AArch64Subtargetinline
isTargetDarwin() constllvm::AArch64Subtargetinline
isTargetELF() constllvm::AArch64Subtargetinline
isTargetFuchsia() constllvm::AArch64Subtargetinline
isTargetILP32() constllvm::AArch64Subtargetinline
isTargetIOS() constllvm::AArch64Subtargetinline
isTargetLinux() constllvm::AArch64Subtargetinline
isTargetMachO() constllvm::AArch64Subtargetinline
isTargetWindows() constllvm::AArch64Subtargetinline
isWindowsArm64EC() constllvm::AArch64Subtargetinline
isXRaySupported() const overridellvm::AArch64Subtargetinline
isXRegCustomCalleeSaved(size_t i) constllvm::AArch64Subtargetinline
isXRegisterReserved(size_t i) constllvm::AArch64Subtargetinline
isXRegisterReservedForRA(size_t i) constllvm::AArch64Subtargetinline
Legalizerllvm::AArch64Subtargetprotected
MaxBytesForLoopAlignmentllvm::AArch64Subtargetprotected
MaxInterleaveFactorllvm::AArch64Subtargetprotected
MaxJumpTableSizellvm::AArch64Subtargetprotected
MaxPrefetchIterationsAheadllvm::AArch64Subtargetprotected
MaxSVEVectorSizeInBitsllvm::AArch64Subtargetprotected
MinimumJumpTableEntriesllvm::AArch64Subtargetprotected
MinPrefetchStridellvm::AArch64Subtargetprotected
MinSVEVectorSizeInBitsllvm::AArch64Subtargetprotected
MinVectorRegisterBitWidthllvm::AArch64Subtargetprotected
mirFileLoaded(MachineFunction &MF) const overridellvm::AArch64Subtarget
Others enum valuellvm::AArch64Subtarget
overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const overridellvm::AArch64Subtarget
ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)llvm::AArch64Subtarget
PrefetchDistancellvm::AArch64Subtargetprotected
PrefFunctionAlignmentllvm::AArch64Subtargetprotected
PrefLoopAlignmentllvm::AArch64Subtargetprotected
RegBankInfollvm::AArch64Subtargetprotected
ReserveXRegisterllvm::AArch64Subtargetprotected
ReserveXRegisterForRAllvm::AArch64Subtargetprotected
supportsAddressTopByteIgnored() constllvm::AArch64Subtarget
swiftAsyncContextIsDynamicallySet() constllvm::AArch64Subtargetinline
TargetTriplellvm::AArch64Subtargetprotected
TLInfollvm::AArch64Subtargetprotected
TSInfollvm::AArch64Subtargetprotected
useAA() const overridellvm::AArch64Subtarget
useDFAforSMS() const overridellvm::AArch64Subtargetinline
useSmallAddressing() constllvm::AArch64Subtargetinline
useSVEForFixedLengthVectors() constllvm::AArch64Subtargetinline
useSVEForFixedLengthVectors(EVT VT) constllvm::AArch64Subtargetinline
VectorInsertExtractBaseCostllvm::AArch64Subtargetprotected
VScaleForTuningllvm::AArch64Subtargetprotected