LLVM 19.0.0git
llvm::LoongArchInstrInfo Member List

This is the complete list of members for llvm::LoongArchInstrInfo, including all inherited members.

analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const overridellvm::LoongArchInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, MCRegister DstReg, MCRegister SrcReg, bool KillSrc) const overridellvm::LoongArchInstrInfo
decomposeMachineOperandsTargetFlags(unsigned TF) const overridellvm::LoongArchInstrInfo
getBranchDestBlock(const MachineInstr &MI) const overridellvm::LoongArchInstrInfo
getInstSizeInBytes(const MachineInstr &MI) const overridellvm::LoongArchInstrInfo
getNop() const overridellvm::LoongArchInstrInfo
getSerializableDirectMachineOperandTargetFlags() const overridellvm::LoongArchInstrInfo
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &dl, int *BytesAdded=nullptr) const overridellvm::LoongArchInstrInfo
insertIndirectBranch(MachineBasicBlock &MBB, MachineBasicBlock &NewDestBB, MachineBasicBlock &RestoreBB, const DebugLoc &DL, int64_t BrOffset, RegScavenger *RS) const overridellvm::LoongArchInstrInfo
isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const overridellvm::LoongArchInstrInfo
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DstReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const overridellvm::LoongArchInstrInfo
LoongArchInstrInfo(LoongArchSubtarget &STI)llvm::LoongArchInstrInfoexplicit
movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, Register DstReg, uint64_t Val, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) constllvm::LoongArchInstrInfo
removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const overridellvm::LoongArchInstrInfo
reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const overridellvm::LoongArchInstrInfo
STIllvm::LoongArchInstrInfoprotected
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool IsKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const overridellvm::LoongArchInstrInfo