25 #error "Never use <avx512vldqintrin.h> directly; include <immintrin.h> instead."
28 #ifndef __AVX512VLDQINTRIN_H
29 #define __AVX512VLDQINTRIN_H
32 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512dq")))
36 return (__m256i) ((__v4du) __A * (__v4du) __B);
41 return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
49 return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
58 return (__m128i) ((__v2du) __A * (__v2du) __B);
63 return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
71 return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
80 return (__m256d) __builtin_ia32_andnpd256_mask ((__v4df) __A,
88 return (__m256d) __builtin_ia32_andnpd256_mask ((__v4df) __A,
97 return (__m128d) __builtin_ia32_andnpd128_mask ((__v2df) __A,
105 return (__m128d) __builtin_ia32_andnpd128_mask ((__v2df) __A,
114 return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,
122 return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,
131 return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A,
139 return (__m128) __builtin_ia32_andnps128_mask ((__v4sf) __A,
148 return (__m256d) __builtin_ia32_andpd256_mask ((__v4df) __A,
156 return (__m256d) __builtin_ia32_andpd256_mask ((__v4df) __A,
165 return (__m128d) __builtin_ia32_andpd128_mask ((__v2df) __A,
173 return (__m128d) __builtin_ia32_andpd128_mask ((__v2df) __A,
182 return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,
190 return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,
199 return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A,
207 return (__m128) __builtin_ia32_andps128_mask ((__v4sf) __A,
217 return (__m256d) __builtin_ia32_xorpd256_mask ((__v4df) __A,
225 return (__m256d) __builtin_ia32_xorpd256_mask ((__v4df) __A,
234 return (__m128d) __builtin_ia32_xorpd128_mask ((__v2df) __A,
242 return (__m128d) __builtin_ia32_xorpd128_mask ((__v2df) __A,
251 return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,
259 return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,
268 return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A,
276 return (__m128) __builtin_ia32_xorps128_mask ((__v4sf) __A,
285 return (__m256d) __builtin_ia32_orpd256_mask ((__v4df) __A,
293 return (__m256d) __builtin_ia32_orpd256_mask ((__v4df) __A,
302 return (__m128d) __builtin_ia32_orpd128_mask ((__v2df) __A,
310 return (__m128d) __builtin_ia32_orpd128_mask ((__v2df) __A,
319 return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,
327 return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,
336 return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A,
344 return (__m128) __builtin_ia32_orps128_mask ((__v4sf) __A,
353 return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
360 return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
367 return (__m128i) __builtin_ia32_cvtpd2qq128_mask ((__v2df) __A,
374 return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A,
381 return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A,
388 return (__m256i) __builtin_ia32_cvtpd2qq256_mask ((__v4df) __A,
395 return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
402 return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
409 return (__m128i) __builtin_ia32_cvtpd2uqq128_mask ((__v2df) __A,
416 return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A,
423 return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A,
430 return (__m256i) __builtin_ia32_cvtpd2uqq256_mask ((__v4df) __A,
437 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
444 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
451 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
458 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
465 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
472 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
479 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
486 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
493 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
500 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
507 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
514 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
521 return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
528 return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
535 return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
542 return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
549 return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
556 return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
563 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
570 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
577 return (__m128) __builtin_ia32_cvtqq2ps128_mask ((__v2di) __A,
584 return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
591 return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
598 return (__m128) __builtin_ia32_cvtqq2ps256_mask ((__v4di) __A,
605 return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
612 return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
619 return (__m128i) __builtin_ia32_cvttpd2qq128_mask ((__v2df) __A,
626 return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A,
633 return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A,
640 return (__m256i) __builtin_ia32_cvttpd2qq256_mask ((__v4df) __A,
647 return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
654 return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
661 return (__m128i) __builtin_ia32_cvttpd2uqq128_mask ((__v2df) __A,
668 return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A,
675 return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A,
682 return (__m256i) __builtin_ia32_cvttpd2uqq256_mask ((__v4df) __A,
689 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
696 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
703 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
710 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
717 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
724 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
731 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
738 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
745 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
752 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
759 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
766 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
773 return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
780 return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
787 return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
794 return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
801 return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
808 return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
815 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
822 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
829 return (__m128) __builtin_ia32_cvtuqq2ps128_mask ((__v2di) __A,
836 return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
843 return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
850 return (__m128) __builtin_ia32_cvtuqq2ps256_mask ((__v4di) __A,
855 #define _mm_range_pd(A, B, C) __extension__ ({ \
856 (__m128d)__builtin_ia32_rangepd128_mask((__v2df)(__m128d)(A), \
857 (__v2df)(__m128d)(B), (int)(C), \
858 (__v2df)_mm_setzero_pd(), \
861 #define _mm_mask_range_pd(W, U, A, B, C) __extension__ ({ \
862 (__m128d)__builtin_ia32_rangepd128_mask((__v2df)(__m128d)(A), \
863 (__v2df)(__m128d)(B), (int)(C), \
864 (__v2df)(__m128d)(W), \
867 #define _mm_maskz_range_pd(U, A, B, C) __extension__ ({ \
868 (__m128d)__builtin_ia32_rangepd128_mask((__v2df)(__m128d)(A), \
869 (__v2df)(__m128d)(B), (int)(C), \
870 (__v2df)_mm_setzero_pd(), \
873 #define _mm256_range_pd(A, B, C) __extension__ ({ \
874 (__m256d)__builtin_ia32_rangepd256_mask((__v4df)(__m256d)(A), \
875 (__v4df)(__m256d)(B), (int)(C), \
876 (__v4df)_mm256_setzero_pd(), \
879 #define _mm256_mask_range_pd(W, U, A, B, C) __extension__ ({ \
880 (__m256d)__builtin_ia32_rangepd256_mask((__v4df)(__m256d)(A), \
881 (__v4df)(__m256d)(B), (int)(C), \
882 (__v4df)(__m256d)(W), \
885 #define _mm256_maskz_range_pd(U, A, B, C) __extension__ ({ \
886 (__m256d)__builtin_ia32_rangepd256_mask((__v4df)(__m256d)(A), \
887 (__v4df)(__m256d)(B), (int)(C), \
888 (__v4df)_mm256_setzero_pd(), \
891 #define _mm_range_ps(A, B, C) __extension__ ({ \
892 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
893 (__v4sf)(__m128)(B), (int)(C), \
894 (__v4sf)_mm_setzero_ps(), \
897 #define _mm_mask_range_ps(W, U, A, B, C) __extension__ ({ \
898 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
899 (__v4sf)(__m128)(B), (int)(C), \
900 (__v4sf)(__m128)(W), (__mmask8)(U)); })
902 #define _mm_maskz_range_ps(U, A, B, C) __extension__ ({ \
903 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
904 (__v4sf)(__m128)(B), (int)(C), \
905 (__v4sf)_mm_setzero_ps(), \
908 #define _mm256_range_ps(A, B, C) __extension__ ({ \
909 (__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \
910 (__v8sf)(__m256)(B), (int)(C), \
911 (__v8sf)_mm256_setzero_ps(), \
914 #define _mm256_mask_range_ps(W, U, A, B, C) __extension__ ({ \
915 (__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \
916 (__v8sf)(__m256)(B), (int)(C), \
917 (__v8sf)(__m256)(W), (__mmask8)(U)); })
919 #define _mm256_maskz_range_ps(U, A, B, C) __extension__ ({ \
920 (__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \
921 (__v8sf)(__m256)(B), (int)(C), \
922 (__v8sf)_mm256_setzero_ps(), \
925 #define _mm_reduce_pd(A, B) __extension__ ({ \
926 (__m128d)__builtin_ia32_reducepd128_mask((__v2df)(__m128d)(A), (int)(B), \
927 (__v2df)_mm_setzero_pd(), \
930 #define _mm_mask_reduce_pd(W, U, A, B) __extension__ ({ \
931 (__m128d)__builtin_ia32_reducepd128_mask((__v2df)(__m128d)(A), (int)(B), \
932 (__v2df)(__m128d)(W), \
935 #define _mm_maskz_reduce_pd(U, A, B) __extension__ ({ \
936 (__m128d)__builtin_ia32_reducepd128_mask((__v2df)(__m128d)(A), (int)(B), \
937 (__v2df)_mm_setzero_pd(), \
940 #define _mm256_reduce_pd(A, B) __extension__ ({ \
941 (__m256d)__builtin_ia32_reducepd256_mask((__v4df)(__m256d)(A), (int)(B), \
942 (__v4df)_mm256_setzero_pd(), \
945 #define _mm256_mask_reduce_pd(W, U, A, B) __extension__ ({ \
946 (__m256d)__builtin_ia32_reducepd256_mask((__v4df)(__m256d)(A), (int)(B), \
947 (__v4df)(__m256d)(W), \
950 #define _mm256_maskz_reduce_pd(U, A, B) __extension__ ({ \
951 (__m256d)__builtin_ia32_reducepd256_mask((__v4df)(__m256d)(A), (int)(B), \
952 (__v4df)_mm256_setzero_pd(), \
955 #define _mm_reduce_ps(A, B) __extension__ ({ \
956 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
957 (__v4sf)_mm_setzero_ps(), \
960 #define _mm_mask_reduce_ps(W, U, A, B) __extension__ ({ \
961 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
962 (__v4sf)(__m128)(W), \
965 #define _mm_maskz_reduce_ps(U, A, B) __extension__ ({ \
966 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
967 (__v4sf)_mm_setzero_ps(), \
970 #define _mm256_reduce_ps(A, B) __extension__ ({ \
971 (__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \
972 (__v8sf)_mm256_setzero_ps(), \
975 #define _mm256_mask_reduce_ps(W, U, A, B) __extension__ ({ \
976 (__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \
977 (__v8sf)(__m256)(W), \
980 #define _mm256_maskz_reduce_ps(U, A, B) __extension__ ({ \
981 (__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \
982 (__v8sf)_mm256_setzero_ps(), \
988 return (
__mmask8) __builtin_ia32_cvtd2mask128 ((__v4si) __A);
994 return (
__mmask8) __builtin_ia32_cvtd2mask256 ((__v8si) __A);
1000 return (__m128i) __builtin_ia32_cvtmask2d128 (__A);
1006 return (__m256i) __builtin_ia32_cvtmask2d256 (__A);
1012 return (__m128i) __builtin_ia32_cvtmask2q128 (__A);
1018 return (__m256i) __builtin_ia32_cvtmask2q256 (__A);
1024 return (
__mmask8) __builtin_ia32_cvtq2mask128 ((__v2di) __A);
1030 return (
__mmask8) __builtin_ia32_cvtq2mask256 ((__v4di) __A);
1036 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
1044 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
1052 return (__m256) __builtin_ia32_broadcastf32x2_256_mask ((__v4sf) __A,
1060 return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df) __A,
1068 return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df) __A,
1076 return (__m256d) __builtin_ia32_broadcastf64x2_256_mask ((__v2df) __A,
1084 return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si) __A,
1092 return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si) __A,
1100 return (__m128i) __builtin_ia32_broadcasti32x2_128_mask ((__v4si) __A,
1108 return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si) __A,
1116 return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si) __A,
1124 return (__m256i) __builtin_ia32_broadcasti32x2_256_mask ((__v4si) __A,
1132 return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di) __A,
1140 return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di) __A,
1148 return (__m256i) __builtin_ia32_broadcasti64x2_256_mask ((__v2di) __A,
1153 #define _mm256_extractf64x2_pd(A, imm) __extension__ ({ \
1154 (__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \
1156 (__v2df)_mm_setzero_pd(), \
1159 #define _mm256_mask_extractf64x2_pd(W, U, A, imm) __extension__ ({ \
1160 (__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \
1162 (__v2df)(__m128d)(W), \
1165 #define _mm256_maskz_extractf64x2_pd(U, A, imm) __extension__ ({ \
1166 (__m128d)__builtin_ia32_extractf64x2_256_mask((__v4df)(__m256d)(A), \
1168 (__v2df)_mm_setzero_pd(), \
1171 #define _mm256_extracti64x2_epi64(A, imm) __extension__ ({ \
1172 (__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \
1174 (__v2di)_mm_setzero_di(), \
1177 #define _mm256_mask_extracti64x2_epi64(W, U, A, imm) __extension__ ({ \
1178 (__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \
1180 (__v2di)(__m128i)(W), \
1183 #define _mm256_maskz_extracti64x2_epi64(U, A, imm) __extension__ ({ \
1184 (__m128i)__builtin_ia32_extracti64x2_256_mask((__v4di)(__m256i)(A), \
1186 (__v2di)_mm_setzero_di(), \
1189 #define _mm256_insertf64x2(A, B, imm) __extension__ ({ \
1190 (__m256d)__builtin_ia32_insertf64x2_256_mask((__v4df)(__m256d)(A), \
1191 (__v2df)(__m128d)(B), \
1193 (__v4df)_mm256_setzero_pd(), \
1196 #define _mm256_mask_insertf64x2(W, U, A, B, imm) __extension__ ({ \
1197 (__m256d)__builtin_ia32_insertf64x2_256_mask((__v4df)(__m256d)(A), \
1198 (__v2df)(__m128d)(B), \
1200 (__v4df)(__m256d)(W), \
1203 #define _mm256_maskz_insertf64x2(U, A, B, imm) __extension__ ({ \
1204 (__m256d)__builtin_ia32_insertf64x2_256_mask((__v4df)(__m256d)(A), \
1205 (__v2df)(__m128d)(B), \
1207 (__v4df)_mm256_setzero_pd(), \
1210 #define _mm256_inserti64x2(A, B, imm) __extension__ ({ \
1211 (__m256i)__builtin_ia32_inserti64x2_256_mask((__v4di)(__m256i)(A), \
1212 (__v2di)(__m128i)(B), \
1214 (__v4di)_mm256_setzero_si256(), \
1217 #define _mm256_mask_inserti64x2(W, U, A, B, imm) __extension__ ({ \
1218 (__m256i)__builtin_ia32_inserti64x2_256_mask((__v4di)(__m256i)(A), \
1219 (__v2di)(__m128i)(B), \
1221 (__v4di)(__m256i)(W), \
1224 #define _mm256_maskz_inserti64x2(U, A, B, imm) __extension__ ({ \
1225 (__m256i)__builtin_ia32_inserti64x2_256_mask((__v4di)(__m256i)(A), \
1226 (__v2di)(__m128i)(B), \
1228 (__v4di)_mm256_setzero_si256(), \
1231 #define _mm_mask_fpclass_pd_mask(U, A, imm) __extension__ ({ \
1232 (__mmask8)__builtin_ia32_fpclasspd128_mask((__v2df)(__m128d)(A), (int)(imm), \
1235 #define _mm_fpclass_pd_mask(A, imm) __extension__ ({ \
1236 (__mmask8)__builtin_ia32_fpclasspd128_mask((__v2df)(__m128d)(A), (int)(imm), \
1239 #define _mm256_mask_fpclass_pd_mask(U, A, imm) __extension__ ({ \
1240 (__mmask8)__builtin_ia32_fpclasspd256_mask((__v4df)(__m256d)(A), (int)(imm), \
1243 #define _mm256_fpclass_pd_mask(A, imm) __extension__ ({ \
1244 (__mmask8)__builtin_ia32_fpclasspd256_mask((__v4df)(__m256d)(A), (int)(imm), \
1247 #define _mm_mask_fpclass_ps_mask(U, A, imm) __extension__ ({ \
1248 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \
1251 #define _mm_fpclass_ps_mask(A, imm) __extension__ ({ \
1252 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \
1255 #define _mm256_mask_fpclass_ps_mask(U, A, imm) __extension__ ({ \
1256 (__mmask8)__builtin_ia32_fpclassps256_mask((__v8sf)(__m256)(A), (int)(imm), \
1259 #define _mm256_fpclass_ps_mask(A, imm) __extension__ ({ \
1260 (__mmask8)__builtin_ia32_fpclassps256_mask((__v8sf)(__m256)(A), (int)(imm), \
1263 #undef __DEFAULT_FN_ATTRS
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepi64_ps(__m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_xor_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_undefined_pd(void)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvttpd_epi64(__m256i __W, __mmask8 __U, __m256d __A)
static __inline __m256 __DEFAULT_FN_ATTRS _mm256_setzero_ps(void)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS _mm_movepi64_mask(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvttps_epu64(__mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi64(__m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_broadcast_f64x2(__m128d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm256_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvttps_epu64(__m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvtpd_epu64(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepi64_pd(__m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_maskz_xor_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_mullo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_broadcast_i32x2(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvtpd_epi64(__mmask8 __U, __m128d __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mask_xor_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_maskz_or_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_maskz_xor_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi64(__m128d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_mask_or_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epu64(__m128d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_mask_xor_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvtpd_epu64(__m256d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_or_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_maskz_andnot_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_broadcast_i64x2(__m256i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvttps_epi64(__m256i __W, __mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvttpd_epu64(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epu64(__m128d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm256_cvtepi64_ps(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvtps_epu64(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mask_or_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS _mm_movepi32_mask(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_maskz_cvtepi64_pd(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvttpd_epi64(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_movm_epi32(__mmask8 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvttpd_epi64(__mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvtpd_epi64(__m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_broadcast_i32x2(__m256i __O, __mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvtps_epi64(__m256i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_cvtepi64_ps(__m128 __W, __mmask8 __U, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_undefined_si256(void)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_cvtepi64_pd(__m256d __W, __mmask8 __U, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm256_maskz_cvtepi64_ps(__mmask8 __U, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_or_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mask_andnot_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_broadcast_f64x2(__m256d __O, __mmask8 __M, __m128d __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm256_maskz_cvtepu64_ps(__mmask8 __U, __m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvtps_epi64(__mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movm_epi32(__mmask8 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mullo_epi64(__m256i __A, __m256i __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_maskz_and_ps(__mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm256_cvtepu64_ps(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvttps_epu64(__mmask8 __U, __m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_or_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvttpd_epu64(__m256i __W, __mmask8 __U, __m256d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_cvtepu64_pd(__mmask8 __U, __m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_xor_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epu64(__m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_setzero_ps(void)
Constructs a 128-bit floating-point vector of [4 x float] initialized to zero.
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_mask_andnot_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_maskz_cvtepu64_pd(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_mullo_epi64(__mmask8 __U, __m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setzero_pd(void)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_undefined_ps(void)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvtps_epi64(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_broadcast_i64x2(__mmask8 __M, __m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm256_mask_cvtepu64_ps(__m128 __W, __mmask8 __U, __m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvtpd_epu64(__mmask8 __U, __m128d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_cvtepu64_pd(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvtpd_epi64(__mmask8 __U, __m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvttps_epi64(__mmask8 __U, __m128 __A)
#define __DEFAULT_FN_ATTRS
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_cvtepi64_pd(__m256i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_xor_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mask_cvtepi64_pd(__m128d __W, __mmask8 __U, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_andnot_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvttps_epu64(__m256i __W, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_broadcast_f64x2(__mmask8 __M, __m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvtpd_epu64(__mmask8 __U, __m256d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_mask_and_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvttpd_epu64(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi64(__m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_maskz_cvtepi64_ps(__mmask8 __U, __m128i __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_broadcast_f32x2(__m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_broadcast_i32x2(__mmask8 __M, __m128i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_broadcast_i64x2(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvtps_epu64(__mmask8 __U, __m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_maskz_cvtepu64_ps(__mmask8 __U, __m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvttpd_epi64(__mmask8 __U, __m128d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_maskz_and_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_movm_epi64(__mmask8 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvtps_epu64(__mmask8 __U, __m128 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_mask_broadcast_f32x2(__m256 __O, __mmask8 __M, __m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_maskz_or_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvttps_epi64(__m128 __A)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_maskz_andnot_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setzero_si128(void)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi64(__m128i __A, __m128i __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mask_and_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepu64_pd(__m128i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepu64_ps(__m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_and_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvttpd_epi64(__m256d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epu64(__m128 __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_and_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_maskz_and_pd(__mmask8 __U, __m128d __A, __m128d __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_mullo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_cvtepu64_pd(__m256d __W, __mmask8 __U, __m256i __A)
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_mask_andnot_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void)
Generates a 128-bit vector of [4 x i32] with unspecified content.
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvttps_epu64(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS _mm256_movepi32_mask(__m256i __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvtps_epi64(__m128 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_maskz_broadcast_f32x2(__mmask8 __M, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvtpd_epu64(__m256i __W, __mmask8 __U, __m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvtpd_epi64(__m256i __W, __mmask8 __U, __m256d __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_maskz_andnot_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mask_cvtepu64_pd(__m128d __W, __mmask8 __U, __m128i __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_mask_and_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvttps_epi64(__m128i __W, __mmask8 __U, __m128 __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi64(__m128d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_mask_cvtps_epu64(__m256i __W, __mmask8 __U, __m128 __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_cvtepi64_pd(__mmask8 __U, __m256i __A)
static __inline __m256i __DEFAULT_FN_ATTRS _mm256_setzero_si256(void)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_maskz_xor_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __mmask8 __DEFAULT_FN_ATTRS _mm256_movepi64_mask(__m256i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movm_epi64(__mmask8 __A)
static __inline__ __m256 __DEFAULT_FN_ATTRS _mm256_maskz_or_ps(__mmask8 __U, __m256 __A, __m256 __B)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_broadcast_i32x2(__m128i __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_broadcast_i32x2(__m128i __O, __mmask8 __M, __m128i __A)
static __inline __m256d __DEFAULT_FN_ATTRS _mm256_setzero_pd(void)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvtps_epu64(__m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_cvttpd_epu64(__m256d __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvttps_epi64(__mmask8 __U, __m128 __A)
static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_mullo_epi64(__mmask8 __U, __m256i __A, __m256i __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvttpd_epu64(__mmask8 __U, __m128d __A)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mask_cvtpd_epi64(__m128i __W, __mmask8 __U, __m128d __A)
static __inline__ __m256d __DEFAULT_FN_ATTRS _mm256_maskz_andnot_pd(__mmask8 __U, __m256d __A, __m256d __B)
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_maskz_cvtps_epi64(__mmask8 __U, __m128 __A)