24 #include "llvm/ADT/APFloat.h"
25 #include "llvm/ADT/STLExtras.h"
26 #include "llvm/ADT/StringExtras.h"
27 #include "llvm/ADT/StringRef.h"
28 #include "llvm/ADT/StringSwitch.h"
29 #include "llvm/ADT/Triple.h"
30 #include "llvm/MC/MCSectionMachO.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/TargetParser.h"
36 using namespace clang;
47 assert(MacroName[0] !=
'_' &&
"Identifier should be in the user's namespace");
77 template<
typename TgtInfo>
78 class OSTargetInfo :
public TgtInfo {
80 virtual void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
83 OSTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
84 : TgtInfo(Triple, Opts) {}
87 TgtInfo::getTargetDefines(Opts, Builder);
88 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
94 template <
typename Target>
95 class CloudABITargetInfo :
public OSTargetInfo<Target> {
97 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
103 Builder.
defineMacro(
"__STDC_ISO_10646__",
"201206L");
109 CloudABITargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
110 : OSTargetInfo<Target>(Triple, Opts) {}
114 const llvm::Triple &Triple,
115 StringRef &PlatformName,
128 Builder.
defineMacro(
"__weak",
"__attribute__((objc_gc(weak)))");
138 if (Opts.POSIXThreads)
142 unsigned Maj, Min, Rev;
143 if (Triple.isMacOSX()) {
144 Triple.getMacOSXVersion(Maj, Min, Rev);
145 PlatformName =
"macos";
147 Triple.getOSVersion(Maj, Min, Rev);
148 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
154 if (PlatformName ==
"win32") {
160 if (Triple.isiOS()) {
161 assert(Maj < 10 && Min < 100 && Rev < 100 &&
"Invalid version!");
164 Str[1] =
'0' + (Min / 10);
165 Str[2] =
'0' + (Min % 10);
166 Str[3] =
'0' + (Rev / 10);
167 Str[4] =
'0' + (Rev % 10);
170 Builder.
defineMacro(
"__ENVIRONMENT_TV_OS_VERSION_MIN_REQUIRED__", Str);
172 Builder.
defineMacro(
"__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__",
175 }
else if (Triple.isWatchOS()) {
176 assert(Maj < 10 && Min < 100 && Rev < 100 &&
"Invalid version!");
179 Str[1] =
'0' + (Min / 10);
180 Str[2] =
'0' + (Min % 10);
181 Str[3] =
'0' + (Rev / 10);
182 Str[4] =
'0' + (Rev % 10);
184 Builder.
defineMacro(
"__ENVIRONMENT_WATCH_OS_VERSION_MIN_REQUIRED__", Str);
185 }
else if (Triple.isMacOSX()) {
190 assert(Maj < 100 && Min < 100 && Rev < 100 &&
"Invalid version!");
192 if (Maj < 10 || (Maj == 10 && Min < 10)) {
193 Str[0] =
'0' + (Maj / 10);
194 Str[1] =
'0' + (Maj % 10);
200 Str[0] =
'0' + (Maj / 10);
201 Str[1] =
'0' + (Maj % 10);
202 Str[2] =
'0' + (Min / 10);
203 Str[3] =
'0' + (Min % 10);
204 Str[4] =
'0' + (Rev / 10);
205 Str[5] =
'0' + (Rev % 10);
208 Builder.
defineMacro(
"__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
212 if (Triple.isOSDarwin())
216 if(Triple.isWatchABI())
222 template<
typename Target>
223 class DarwinTargetInfo :
public OSTargetInfo<Target> {
225 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
227 getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
228 this->PlatformMinVersion);
232 DarwinTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
233 : OSTargetInfo<Target>(Triple, Opts) {
236 this->TLSSupported =
false;
238 if (Triple.isMacOSX())
239 this->TLSSupported = !Triple.isMacOSXVersionLT(10, 7);
240 else if (Triple.isiOS()) {
242 if (Triple.getArch() == llvm::Triple::x86_64 ||
243 Triple.getArch() == llvm::Triple::aarch64)
244 this->TLSSupported = !Triple.isOSVersionLT(8);
245 else if (Triple.getArch() == llvm::Triple::x86 ||
246 Triple.getArch() == llvm::Triple::arm ||
247 Triple.getArch() == llvm::Triple::thumb)
248 this->TLSSupported = !Triple.isOSVersionLT(9);
249 }
else if (Triple.isWatchOS())
250 this->TLSSupported = !Triple.isOSVersionLT(2);
252 this->MCountName =
"\01mcount";
255 std::string isValidSectionSpecifier(StringRef SR)
const override {
257 StringRef Segment, Section;
258 unsigned TAA, StubSize;
260 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
261 TAA, HasTAA, StubSize);
264 const char *getStaticInitSectionSpecifier()
const override {
266 return "__TEXT,__StaticInit,regular,pure_instructions";
272 bool hasProtectedVisibility()
const override {
276 unsigned getExnObjectAlignment()
const override {
286 template<
typename Target>
287 class DragonFlyBSDTargetInfo :
public OSTargetInfo<Target> {
289 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
293 Builder.
defineMacro(
"__DragonFly_cc_version",
"100001");
300 DragonFlyBSDTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
301 : OSTargetInfo<Target>(Triple, Opts) {
302 switch (Triple.getArch()) {
304 case llvm::Triple::x86:
305 case llvm::Triple::x86_64:
306 this->MCountName =
".mcount";
312 #ifndef FREEBSD_CC_VERSION
313 #define FREEBSD_CC_VERSION 0U
317 template<
typename Target>
318 class FreeBSDTargetInfo :
public OSTargetInfo<Target> {
320 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
324 unsigned Release = Triple.getOSMajorVersion();
329 CCVersion = Release * 100000U + 1U;
331 Builder.
defineMacro(
"__FreeBSD__", Twine(Release));
332 Builder.
defineMacro(
"__FreeBSD_cc_version", Twine(CCVersion));
346 Builder.
defineMacro(
"__STDC_MB_MIGHT_NEQ_WC__",
"1");
349 FreeBSDTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
350 : OSTargetInfo<Target>(Triple, Opts) {
351 switch (Triple.getArch()) {
353 case llvm::Triple::x86:
354 case llvm::Triple::x86_64:
355 this->MCountName =
".mcount";
357 case llvm::Triple::mips:
358 case llvm::Triple::mipsel:
359 case llvm::Triple::ppc:
360 case llvm::Triple::ppc64:
361 case llvm::Triple::ppc64le:
362 this->MCountName =
"_mcount";
364 case llvm::Triple::arm:
365 this->MCountName =
"__mcount";
372 template<
typename Target>
373 class KFreeBSDTargetInfo :
public OSTargetInfo<Target> {
375 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
383 if (Opts.POSIXThreads)
389 KFreeBSDTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
390 : OSTargetInfo<Target>(Triple, Opts) {}
394 template<
typename Target>
395 class HaikuTargetInfo :
public OSTargetInfo<Target> {
397 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
405 HaikuTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
406 : OSTargetInfo<Target>(Triple, Opts) {
411 this->TLSSupported =
false;
417 template<
typename Target>
418 class MinixTargetInfo :
public OSTargetInfo<Target> {
420 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
435 MinixTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
436 : OSTargetInfo<Target>(Triple, Opts) {}
440 template<
typename Target>
441 class LinuxTargetInfo :
public OSTargetInfo<Target> {
443 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
450 if (Triple.isAndroid()) {
452 unsigned Maj, Min, Rev;
453 Triple.getEnvironmentVersion(Maj, Min, Rev);
454 this->PlatformName =
"android";
457 if (Opts.POSIXThreads)
461 if (this->HasFloat128)
465 LinuxTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
466 : OSTargetInfo<Target>(Triple, Opts) {
469 switch (Triple.getArch()) {
472 case llvm::Triple::ppc:
473 case llvm::Triple::ppc64:
474 case llvm::Triple::ppc64le:
475 this->MCountName =
"_mcount";
477 case llvm::Triple::x86:
478 case llvm::Triple::x86_64:
479 case llvm::Triple::systemz:
480 this->HasFloat128 =
true;
485 const char *getStaticInitSectionSpecifier()
const override {
486 return ".text.startup";
491 template<
typename Target>
492 class NetBSDTargetInfo :
public OSTargetInfo<Target> {
494 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
500 if (Opts.POSIXThreads)
503 switch (Triple.getArch()) {
506 case llvm::Triple::arm:
507 case llvm::Triple::armeb:
508 case llvm::Triple::thumb:
509 case llvm::Triple::thumbeb:
515 NetBSDTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
516 : OSTargetInfo<Target>(Triple, Opts) {
517 this->MCountName =
"_mcount";
522 template<
typename Target>
523 class OpenBSDTargetInfo :
public OSTargetInfo<Target> {
525 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
532 if (Opts.POSIXThreads)
536 OpenBSDTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
537 : OSTargetInfo<Target>(Triple, Opts) {
538 this->TLSSupported =
false;
540 switch (Triple.getArch()) {
542 case llvm::Triple::x86:
543 case llvm::Triple::x86_64:
544 case llvm::Triple::arm:
545 case llvm::Triple::sparc:
546 this->MCountName =
"__mcount";
548 case llvm::Triple::mips64:
549 case llvm::Triple::mips64el:
550 case llvm::Triple::ppc:
551 case llvm::Triple::sparcv9:
552 this->MCountName =
"_mcount";
559 template<
typename Target>
560 class BitrigTargetInfo :
public OSTargetInfo<Target> {
562 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
569 if (Opts.POSIXThreads)
572 switch (Triple.getArch()) {
575 case llvm::Triple::arm:
576 case llvm::Triple::armeb:
577 case llvm::Triple::thumb:
578 case llvm::Triple::thumbeb:
584 BitrigTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
585 : OSTargetInfo<Target>(Triple, Opts) {
586 this->MCountName =
"__mcount";
591 template<
typename Target>
592 class PSPTargetInfo :
public OSTargetInfo<Target> {
594 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
603 PSPTargetInfo(
const llvm::Triple &Triple) : OSTargetInfo<Target>(Triple) {}
607 template<
typename Target>
608 class PS3PPUTargetInfo :
public OSTargetInfo<Target> {
610 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
622 PS3PPUTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
623 : OSTargetInfo<Target>(Triple, Opts) {
624 this->LongWidth = this->LongAlign = 32;
625 this->PointerWidth = this->PointerAlign = 32;
629 this->resetDataLayout(
"E-m:e-p:32:32-i64:64-n32:64");
633 template <
typename Target>
634 class PS4OSTargetInfo :
public OSTargetInfo<Target> {
636 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
639 Builder.
defineMacro(
"__FreeBSD_cc_version",
"900001");
646 PS4OSTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
647 : OSTargetInfo<Target>(Triple, Opts) {
648 this->WCharType = this->UnsignedShort;
651 this->MaxTLSAlign = 256;
655 this->UseExplicitBitFieldAlignment =
false;
657 switch (Triple.getArch()) {
659 case llvm::Triple::x86_64:
660 this->MCountName =
".mcount";
667 template<
typename Target>
668 class SolarisTargetInfo :
public OSTargetInfo<Target> {
670 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
693 SolarisTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
694 : OSTargetInfo<Target>(Triple, Opts) {
695 this->WCharType = this->SignedInt;
701 template<
typename Target>
702 class WindowsTargetInfo :
public OSTargetInfo<Target> {
704 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
708 void getVisualStudioDefines(
const LangOptions &Opts,
710 if (Opts.CPlusPlus) {
714 if (Opts.CXXExceptions)
721 if (!Opts.CharIsSigned)
726 if (Opts.POSIXThreads)
729 if (Opts.MSCompatibilityVersion) {
731 Twine(Opts.MSCompatibilityVersion / 100000));
732 Builder.
defineMacro(
"_MSC_FULL_VER", Twine(Opts.MSCompatibilityVersion));
737 Builder.
defineMacro(
"_HAS_CHAR16_T_LANGUAGE_SUPPORT", Twine(1));
740 if (Opts.CPlusPlus1z)
742 else if (Opts.CPlusPlus14)
747 if (Opts.MicrosoftExt) {
750 if (Opts.CPlusPlus11) {
751 Builder.
defineMacro(
"_RVALUE_REFERENCES_V2_SUPPORTED");
752 Builder.
defineMacro(
"_RVALUE_REFERENCES_SUPPORTED");
761 WindowsTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
762 : OSTargetInfo<Target>(Triple, Opts) {}
765 template <
typename Target>
766 class NaClTargetInfo :
public OSTargetInfo<Target> {
768 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
770 if (Opts.POSIXThreads)
781 NaClTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
782 : OSTargetInfo<Target>(Triple, Opts) {
783 this->LongAlign = 32;
784 this->LongWidth = 32;
785 this->PointerAlign = 32;
786 this->PointerWidth = 32;
789 this->DoubleAlign = 64;
790 this->LongDoubleWidth = 64;
791 this->LongDoubleAlign = 64;
792 this->LongLongWidth = 64;
793 this->LongLongAlign = 64;
798 this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
799 if (Triple.getArch() == llvm::Triple::arm) {
801 }
else if (Triple.getArch() == llvm::Triple::x86) {
802 this->resetDataLayout(
"e-m:e-p:32:32-i64:64-n8:16:32-S128");
803 }
else if (Triple.getArch() == llvm::Triple::x86_64) {
804 this->resetDataLayout(
"e-m:e-p:32:32-i64:64-n8:16:32:64-S128");
805 }
else if (Triple.getArch() == llvm::Triple::mipsel) {
808 assert(Triple.getArch() == llvm::Triple::le32);
809 this->resetDataLayout(
"e-p:32:32-i64:64");
815 template <
typename Target>
816 class WebAssemblyOSTargetInfo :
public OSTargetInfo<Target> {
817 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
820 if (Opts.POSIXThreads)
828 const char *getStaticInitSectionSpecifier() const final {
829 return ".text.__startup";
833 explicit WebAssemblyOSTargetInfo(
const llvm::Triple &Triple,
835 : OSTargetInfo<Target>(Triple, Opts) {
836 this->MCountName =
"__mcount";
848 static const char *
const GCCRegNames[];
866 PPCTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
870 BigEndian = (Triple.getArch() != llvm::Triple::ppc64le);
871 SimdDefaultAlign = 128;
872 LongDoubleWidth = LongDoubleAlign = 128;
873 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
879 ArchDefineName = 1 << 0,
880 ArchDefinePpcgr = 1 << 1,
881 ArchDefinePpcsq = 1 << 2,
882 ArchDefine440 = 1 << 3,
883 ArchDefine603 = 1 << 4,
884 ArchDefine604 = 1 << 5,
885 ArchDefinePwr4 = 1 << 6,
886 ArchDefinePwr5 = 1 << 7,
887 ArchDefinePwr5x = 1 << 8,
888 ArchDefinePwr6 = 1 << 9,
889 ArchDefinePwr6x = 1 << 10,
890 ArchDefinePwr7 = 1 << 11,
891 ArchDefinePwr8 = 1 << 12,
892 ArchDefinePwr9 = 1 << 13,
893 ArchDefineA2 = 1 << 14,
894 ArchDefineA2q = 1 << 15
901 bool setCPU(
const std::string &
Name)
override {
902 bool CPUKnown = llvm::StringSwitch<bool>(
Name)
903 .Case(
"generic",
true)
925 .Case(
"e500mc",
true)
927 .Case(
"power3",
true)
929 .Case(
"power4",
true)
931 .Case(
"power5",
true)
933 .Case(
"power5x",
true)
935 .Case(
"power6",
true)
937 .Case(
"power6x",
true)
939 .Case(
"power7",
true)
941 .Case(
"power8",
true)
943 .Case(
"power9",
true)
945 .Case(
"powerpc",
true)
947 .Case(
"powerpc64",
true)
949 .Case(
"powerpc64le",
true)
950 .Case(
"ppc64le",
true)
960 StringRef getABI()
const override {
return ABI; }
967 bool isCLZForZeroUndef()
const override {
return false; }
975 const std::vector<std::string> &FeaturesVec)
const override;
977 bool handleTargetFeatures(std::vector<std::string> &Features,
979 bool hasFeature(StringRef Feature)
const override;
980 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
981 bool Enabled)
const override;
985 bool validateAsmConstraint(
const char *&Name,
988 default:
return false;
1084 std::string convertConstraint(
const char *&Constraint)
const override {
1086 switch (*Constraint) {
1090 R = std::string(
"^") + std::string(Constraint, 2);
1098 const char *getClobbers()
const override {
1101 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
1102 if (RegNo == 0)
return 3;
1103 if (RegNo == 1)
return 4;
1107 bool hasSjLjLowering()
const override {
1111 bool useFloat128ManglingForLongDouble()
const override {
1112 return LongDoubleWidth == 128 &&
1113 LongDoubleFormat == &llvm::APFloat::PPCDoubleDouble &&
1114 getTriple().isOSBinFormatELF();
1119 #define BUILTIN(ID, TYPE, ATTRS) \
1120 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
1121 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
1122 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
1123 #include "clang/Basic/BuiltinsPPC.def"
1128 bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
1130 for (
const auto &Feature : Features) {
1131 if (Feature ==
"+vsx") {
1133 }
else if (Feature ==
"+bpermd") {
1135 }
else if (Feature ==
"+extdiv") {
1137 }
else if (Feature ==
"+power8-vector") {
1139 }
else if (Feature ==
"+crypto") {
1141 }
else if (Feature ==
"+direct-move") {
1142 HasDirectMove =
true;
1143 }
else if (Feature ==
"+qpx") {
1145 }
else if (Feature ==
"+htm") {
1147 }
else if (Feature ==
"+float128") {
1159 void PPCTargetInfo::getTargetDefines(
const LangOptions &Opts,
1167 if (PointerWidth == 64) {
1175 if (getTriple().getArch() == llvm::Triple::ppc64le) {
1178 if (getTriple().getOS() != llvm::Triple::NetBSD &&
1179 getTriple().getOS() != llvm::Triple::OpenBSD)
1184 if (ABI ==
"elfv1" || ABI ==
"elfv1-qpx")
1194 if (LongDoubleWidth == 128)
1203 ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
1204 .Case(
"440", ArchDefineName)
1205 .Case(
"450", ArchDefineName | ArchDefine440)
1206 .Case(
"601", ArchDefineName)
1207 .Case(
"602", ArchDefineName | ArchDefinePpcgr)
1208 .Case(
"603", ArchDefineName | ArchDefinePpcgr)
1209 .Case(
"603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
1210 .Case(
"603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
1211 .Case(
"604", ArchDefineName | ArchDefinePpcgr)
1212 .Case(
"604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
1213 .Case(
"620", ArchDefineName | ArchDefinePpcgr)
1214 .Case(
"630", ArchDefineName | ArchDefinePpcgr)
1215 .Case(
"7400", ArchDefineName | ArchDefinePpcgr)
1216 .Case(
"7450", ArchDefineName | ArchDefinePpcgr)
1217 .Case(
"750", ArchDefineName | ArchDefinePpcgr)
1218 .Case(
"970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
1220 .Case(
"a2", ArchDefineA2)
1221 .Case(
"a2q", ArchDefineName | ArchDefineA2 | ArchDefineA2q)
1222 .Case(
"pwr3", ArchDefinePpcgr)
1223 .Case(
"pwr4", ArchDefineName | ArchDefinePpcgr | ArchDefinePpcsq)
1224 .Case(
"pwr5", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
1226 .Case(
"pwr5x", ArchDefineName | ArchDefinePwr5 | ArchDefinePwr4
1227 | ArchDefinePpcgr | ArchDefinePpcsq)
1228 .Case(
"pwr6", ArchDefineName | ArchDefinePwr5x | ArchDefinePwr5
1229 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1230 .Case(
"pwr6x", ArchDefineName | ArchDefinePwr6 | ArchDefinePwr5x
1231 | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1233 .Case(
"pwr7", ArchDefineName | ArchDefinePwr6x | ArchDefinePwr6
1234 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
1235 | ArchDefinePpcgr | ArchDefinePpcsq)
1236 .Case(
"pwr8", ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x
1237 | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
1238 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1239 .Case(
"pwr9", ArchDefineName | ArchDefinePwr8 | ArchDefinePwr7
1240 | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
1241 | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1243 .Case(
"power3", ArchDefinePpcgr)
1244 .Case(
"power4", ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1245 .Case(
"power5", ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1247 .Case(
"power5x", ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
1248 | ArchDefinePpcgr | ArchDefinePpcsq)
1249 .Case(
"power6", ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
1250 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1251 .Case(
"power6x", ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
1252 | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1254 .Case(
"power7", ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6
1255 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4
1256 | ArchDefinePpcgr | ArchDefinePpcsq)
1257 .Case(
"power8", ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x
1258 | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
1259 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
1260 .Case(
"power9", ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7
1261 | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
1262 | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
1264 .Default(ArchDefineNone);
1266 if (defs & ArchDefineName)
1267 Builder.
defineMacro(Twine(
"_ARCH_", StringRef(CPU).upper()));
1268 if (defs & ArchDefinePpcgr)
1270 if (defs & ArchDefinePpcsq)
1272 if (defs & ArchDefine440)
1274 if (defs & ArchDefine603)
1276 if (defs & ArchDefine604)
1278 if (defs & ArchDefinePwr4)
1280 if (defs & ArchDefinePwr5)
1282 if (defs & ArchDefinePwr5x)
1284 if (defs & ArchDefinePwr6)
1286 if (defs & ArchDefinePwr6x)
1288 if (defs & ArchDefinePwr7)
1290 if (defs & ArchDefinePwr8)
1292 if (defs & ArchDefinePwr9)
1294 if (defs & ArchDefineA2)
1296 if (defs & ArchDefineA2q) {
1301 if (getTriple().getVendor() == llvm::Triple::BGQ) {
1319 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
1320 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
1321 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
1322 if (PointerWidth == 64)
1323 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
1351 const std::vector<std::string> &FeaturesVec) {
1353 if (std::find(FeaturesVec.begin(), FeaturesVec.end(),
"-vsx") !=
1354 FeaturesVec.end()) {
1355 if (std::find(FeaturesVec.begin(), FeaturesVec.end(),
"+power8-vector") !=
1356 FeaturesVec.end()) {
1357 Diags.
Report(diag::err_opt_not_valid_with_opt) <<
"-mpower8-vector"
1362 if (std::find(FeaturesVec.begin(), FeaturesVec.end(),
"+direct-move") !=
1363 FeaturesVec.end()) {
1364 Diags.
Report(diag::err_opt_not_valid_with_opt) <<
"-mdirect-move"
1369 if (std::find(FeaturesVec.begin(), FeaturesVec.end(),
"+float128") !=
1370 FeaturesVec.end()) {
1371 Diags.
Report(diag::err_opt_not_valid_with_opt) <<
"-mfloat128"
1380 bool PPCTargetInfo::initFeatureMap(
1382 const std::vector<std::string> &FeaturesVec)
const {
1383 Features[
"altivec"] = llvm::StringSwitch<bool>(CPU)
1394 .Case(
"ppc64",
true)
1395 .Case(
"ppc64le",
true)
1398 Features[
"qpx"] = (CPU ==
"a2q");
1399 Features[
"crypto"] = llvm::StringSwitch<bool>(CPU)
1400 .Case(
"ppc64le",
true)
1404 Features[
"power8-vector"] = llvm::StringSwitch<bool>(CPU)
1405 .Case(
"ppc64le",
true)
1409 Features[
"bpermd"] = llvm::StringSwitch<bool>(CPU)
1410 .Case(
"ppc64le",
true)
1415 Features[
"extdiv"] = llvm::StringSwitch<bool>(CPU)
1416 .Case(
"ppc64le",
true)
1421 Features[
"direct-move"] = llvm::StringSwitch<bool>(CPU)
1422 .Case(
"ppc64le",
true)
1426 Features[
"vsx"] = llvm::StringSwitch<bool>(CPU)
1427 .Case(
"ppc64le",
true)
1433 if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
1440 return llvm::StringSwitch<bool>(Feature)
1441 .Case(
"powerpc",
true)
1442 .Case(
"vsx", HasVSX)
1443 .Case(
"power8-vector", HasP8Vector)
1444 .Case(
"crypto", HasP8Crypto)
1445 .Case(
"direct-move", HasDirectMove)
1446 .Case(
"qpx", HasQPX)
1447 .Case(
"htm", HasHTM)
1448 .Case(
"bpermd", HasBPERMD)
1449 .Case(
"extdiv", HasExtDiv)
1450 .Case(
"float128", HasFloat128)
1454 void PPCTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1455 StringRef Name,
bool Enabled)
const {
1460 if (Name ==
"direct-move") {
1461 Features[
Name] = Features[
"vsx"] =
true;
1462 }
else if (Name ==
"power8-vector") {
1463 Features[
Name] = Features[
"vsx"] =
true;
1464 }
else if (Name ==
"float128") {
1465 Features[
Name] = Features[
"vsx"] =
true;
1467 Features[
Name] =
true;
1470 if (Name ==
"vsx") {
1471 Features[
Name] = Features[
"direct-move"] = Features[
"power8-vector"] =
1472 Features[
"float128"] =
false;
1474 Features[
Name] =
false;
1479 const char *
const PPCTargetInfo::GCCRegNames[] = {
1480 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
1481 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
1482 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
1483 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31",
1484 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
1485 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
1486 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
1487 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31",
1488 "mq",
"lr",
"ctr",
"ap",
1489 "cr0",
"cr1",
"cr2",
"cr3",
"cr4",
"cr5",
"cr6",
"cr7",
1491 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
1492 "v8",
"v9",
"v10",
"v11",
"v12",
"v13",
"v14",
"v15",
1493 "v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
1494 "v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31",
1496 "spe_acc",
"spefscr",
1501 return llvm::makeArrayRef(GCCRegNames);
1517 { {
"10" },
"r10" },
1518 { {
"11" },
"r11" },
1519 { {
"12" },
"r12" },
1520 { {
"13" },
"r13" },
1521 { {
"14" },
"r14" },
1522 { {
"15" },
"r15" },
1523 { {
"16" },
"r16" },
1524 { {
"17" },
"r17" },
1525 { {
"18" },
"r18" },
1526 { {
"19" },
"r19" },
1527 { {
"20" },
"r20" },
1528 { {
"21" },
"r21" },
1529 { {
"22" },
"r22" },
1530 { {
"23" },
"r23" },
1531 { {
"24" },
"r24" },
1532 { {
"25" },
"r25" },
1533 { {
"26" },
"r26" },
1534 { {
"27" },
"r27" },
1535 { {
"28" },
"r28" },
1536 { {
"29" },
"r29" },
1537 { {
"30" },
"r30" },
1538 { {
"31" },
"r31" },
1539 { {
"fr0" },
"f0" },
1540 { {
"fr1" },
"f1" },
1541 { {
"fr2" },
"f2" },
1542 { {
"fr3" },
"f3" },
1543 { {
"fr4" },
"f4" },
1544 { {
"fr5" },
"f5" },
1545 { {
"fr6" },
"f6" },
1546 { {
"fr7" },
"f7" },
1547 { {
"fr8" },
"f8" },
1548 { {
"fr9" },
"f9" },
1549 { {
"fr10" },
"f10" },
1550 { {
"fr11" },
"f11" },
1551 { {
"fr12" },
"f12" },
1552 { {
"fr13" },
"f13" },
1553 { {
"fr14" },
"f14" },
1554 { {
"fr15" },
"f15" },
1555 { {
"fr16" },
"f16" },
1556 { {
"fr17" },
"f17" },
1557 { {
"fr18" },
"f18" },
1558 { {
"fr19" },
"f19" },
1559 { {
"fr20" },
"f20" },
1560 { {
"fr21" },
"f21" },
1561 { {
"fr22" },
"f22" },
1562 { {
"fr23" },
"f23" },
1563 { {
"fr24" },
"f24" },
1564 { {
"fr25" },
"f25" },
1565 { {
"fr26" },
"f26" },
1566 { {
"fr27" },
"f27" },
1567 { {
"fr28" },
"f28" },
1568 { {
"fr29" },
"f29" },
1569 { {
"fr30" },
"f30" },
1570 { {
"fr31" },
"f31" },
1571 { {
"cc" },
"cr0" },
1575 return llvm::makeArrayRef(GCCRegAliases);
1578 class PPC32TargetInfo :
public PPCTargetInfo {
1580 PPC32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1581 : PPCTargetInfo(Triple, Opts) {
1582 resetDataLayout(
"E-m:e-p:32:32-i64:64-n32");
1584 switch (getTriple().getOS()) {
1585 case llvm::Triple::Linux:
1586 case llvm::Triple::FreeBSD:
1587 case llvm::Triple::NetBSD:
1588 SizeType = UnsignedInt;
1589 PtrDiffType = SignedInt;
1590 IntPtrType = SignedInt;
1596 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1597 LongDoubleWidth = LongDoubleAlign = 64;
1598 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1602 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
1605 BuiltinVaListKind getBuiltinVaListKind()
const override {
1613 class PPC64TargetInfo :
public PPCTargetInfo {
1615 PPC64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1616 : PPCTargetInfo(Triple, Opts) {
1617 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1618 IntMaxType = SignedLong;
1619 Int64Type = SignedLong;
1621 if ((Triple.getArch() == llvm::Triple::ppc64le)) {
1622 resetDataLayout(
"e-m:e-i64:64-n32:64");
1625 resetDataLayout(
"E-m:e-i64:64-n32:64");
1629 switch (getTriple().getOS()) {
1630 case llvm::Triple::FreeBSD:
1631 LongDoubleWidth = LongDoubleAlign = 64;
1632 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1634 case llvm::Triple::NetBSD:
1635 IntMaxType = SignedLongLong;
1636 Int64Type = SignedLongLong;
1643 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
1645 BuiltinVaListKind getBuiltinVaListKind()
const override {
1649 bool setABI(
const std::string &Name)
override {
1650 if (Name ==
"elfv1" || Name ==
"elfv1-qpx" || Name ==
"elfv2") {
1658 class DarwinPPC32TargetInfo :
public DarwinTargetInfo<PPC32TargetInfo> {
1660 DarwinPPC32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1661 : DarwinTargetInfo<PPC32TargetInfo>(Triple, Opts) {
1662 HasAlignMac68kSupport =
true;
1663 BoolWidth = BoolAlign = 32;
1664 PtrDiffType = SignedInt;
1666 SuitableAlign = 128;
1667 resetDataLayout(
"E-m:o-p:32:32-f64:32:64-n32");
1669 BuiltinVaListKind getBuiltinVaListKind()
const override {
1674 class DarwinPPC64TargetInfo :
public DarwinTargetInfo<PPC64TargetInfo> {
1676 DarwinPPC64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1677 : DarwinTargetInfo<PPC64TargetInfo>(Triple, Opts) {
1678 HasAlignMac68kSupport =
true;
1679 SuitableAlign = 128;
1680 resetDataLayout(
"E-m:o-i64:64-n32:64");
1684 static const unsigned NVPTXAddrSpaceMap[] = {
1696 static const char *
const GCCRegNames[];
1701 NVPTXTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1704 TLSSupported =
false;
1705 LongWidth = LongAlign = 64;
1706 AddrSpaceMap = &NVPTXAddrSpaceMap;
1707 UseAddrSpaceMapMangling =
true;
1710 NoAsmVariants =
true;
1716 if (HostTriple.isNVPTX())
1718 std::unique_ptr<TargetInfo> HostTarget(
1724 PointerWidth = HostTarget->getPointerWidth( 0);
1725 PointerAlign = HostTarget->getPointerAlign( 0);
1726 BoolWidth = HostTarget->getBoolWidth();
1727 BoolAlign = HostTarget->getBoolAlign();
1728 IntWidth = HostTarget->getIntWidth();
1729 IntAlign = HostTarget->getIntAlign();
1730 HalfWidth = HostTarget->getHalfWidth();
1731 HalfAlign = HostTarget->getHalfAlign();
1732 FloatWidth = HostTarget->getFloatWidth();
1733 FloatAlign = HostTarget->getFloatAlign();
1734 DoubleWidth = HostTarget->getDoubleWidth();
1735 DoubleAlign = HostTarget->getDoubleAlign();
1736 LongWidth = HostTarget->getLongWidth();
1737 LongAlign = HostTarget->getLongAlign();
1738 LongLongWidth = HostTarget->getLongLongWidth();
1739 LongLongAlign = HostTarget->getLongLongAlign();
1740 MinGlobalAlign = HostTarget->getMinGlobalAlign();
1741 DefaultAlignForAttributeAligned =
1742 HostTarget->getDefaultAlignForAttributeAligned();
1743 SizeType = HostTarget->getSizeType();
1744 IntMaxType = HostTarget->getIntMaxType();
1745 PtrDiffType = HostTarget->getPtrDiffType( 0);
1746 IntPtrType = HostTarget->getIntPtrType();
1747 WCharType = HostTarget->getWCharType();
1748 WIntType = HostTarget->getWIntType();
1749 Char16Type = HostTarget->getChar16Type();
1750 Char32Type = HostTarget->getChar32Type();
1751 Int64Type = HostTarget->getInt64Type();
1752 SigAtomicType = HostTarget->getSigAtomicType();
1753 ProcessIDType = HostTarget->getProcessIDType();
1755 UseBitFieldTypeAlignment = HostTarget->useBitFieldTypeAlignment();
1756 UseZeroLengthBitfieldAlignment =
1757 HostTarget->useZeroLengthBitfieldAlignment();
1758 UseExplicitBitFieldAlignment = HostTarget->useExplicitBitFieldAlignment();
1759 ZeroLengthBitfieldBoundary = HostTarget->getZeroLengthBitfieldBoundary();
1776 if (Opts.CUDAIsDevice) {
1778 std::string CUDAArchCode = [
this] {
1781 assert(
false &&
"No GPU arch when compiling CUDA device code.");
1808 llvm_unreachable(
"unhandled CudaArch");
1810 Builder.
defineMacro(
"__CUDA_ARCH__", CUDAArchCode);
1817 bool hasFeature(StringRef Feature)
const override {
1818 return Feature ==
"ptx" || Feature ==
"nvptx";
1826 bool validateAsmConstraint(
const char *&Name,
1841 const char *getClobbers()
const override {
1845 BuiltinVaListKind getBuiltinVaListKind()
const override {
1849 bool setCPU(
const std::string &Name)
override {
1853 void setSupportedOpenCLOpts()
override {
1854 auto &Opts = getSupportedOpenCLOpts();
1855 Opts.cl_clang_storage_class_specifiers = 1;
1856 Opts.cl_khr_gl_sharing = 1;
1857 Opts.cl_khr_icd = 1;
1859 Opts.cl_khr_fp64 = 1;
1860 Opts.cl_khr_byte_addressable_store = 1;
1861 Opts.cl_khr_global_int32_base_atomics = 1;
1862 Opts.cl_khr_global_int32_extended_atomics = 1;
1863 Opts.cl_khr_local_int32_base_atomics = 1;
1864 Opts.cl_khr_local_int32_extended_atomics = 1;
1869 #define BUILTIN(ID, TYPE, ATTRS) \
1870 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
1871 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
1872 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
1873 #include "clang/Basic/BuiltinsNVPTX.def"
1876 const char *
const NVPTXTargetInfo::GCCRegNames[] = {
"r0"};
1879 return llvm::makeArrayRef(GCCRegNames);
1882 class NVPTX32TargetInfo :
public NVPTXTargetInfo {
1884 NVPTX32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1885 : NVPTXTargetInfo(Triple, Opts) {
1886 LongWidth = LongAlign = 32;
1887 PointerWidth = PointerAlign = 32;
1891 resetDataLayout(
"e-p:32:32-i64:64-v16:16-v32:32-n16:32:64");
1895 class NVPTX64TargetInfo :
public NVPTXTargetInfo {
1897 NVPTX64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
1898 : NVPTXTargetInfo(Triple, Opts) {
1899 PointerWidth = PointerAlign = 64;
1903 resetDataLayout(
"e-i64:64-v16:16-v32:32-n16:32:64");
1907 static const unsigned AMDGPUAddrSpaceMap[] = {
1920 static const char *
const DataLayoutStringR600 =
1921 "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
1922 "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
1924 static const char *
const DataLayoutStringSI =
1925 "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
1926 "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
1927 "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";
1929 class AMDGPUTargetInfo final :
public TargetInfo {
1931 static const char *
const GCCRegNames[];
1941 GK_EVERGREEN_DOUBLE_OPS,
1942 GK_NORTHERN_ISLANDS,
1944 GK_SOUTHERN_ISLANDS,
1953 static bool isAMDGCN(
const llvm::Triple &TT) {
1954 return TT.getArch() == llvm::Triple::amdgcn;
1958 AMDGPUTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
1960 GPU(isAMDGCN(Triple) ? GK_SOUTHERN_ISLANDS : GK_R600),
1964 if (getTriple().getArch() == llvm::Triple::amdgcn) {
1970 resetDataLayout(getTriple().getArch() == llvm::Triple::amdgcn ?
1971 DataLayoutStringSI : DataLayoutStringR600);
1973 AddrSpaceMap = &AMDGPUAddrSpaceMap;
1974 UseAddrSpaceMapMangling =
true;
1977 uint64_t getPointerWidthV(
unsigned AddrSpace)
const override {
1978 if (GPU <= GK_CAYMAN)
1991 const char * getClobbers()
const override {
2001 bool validateAsmConstraint(
const char *&Name,
2013 bool initFeatureMap(llvm::StringMap<bool> &Features,
2015 const std::vector<std::string> &FeatureVec)
const override;
2024 if (getTriple().getArch() == llvm::Triple::amdgcn)
2037 BuiltinVaListKind getBuiltinVaListKind()
const override {
2041 static GPUKind parseR600Name(StringRef Name) {
2042 return llvm::StringSwitch<GPUKind>(
Name)
2043 .Case(
"r600" , GK_R600)
2044 .Case(
"rv610", GK_R600)
2045 .Case(
"rv620", GK_R600)
2046 .Case(
"rv630", GK_R600)
2047 .Case(
"rv635", GK_R600)
2048 .Case(
"rs780", GK_R600)
2049 .Case(
"rs880", GK_R600)
2050 .Case(
"rv670", GK_R600_DOUBLE_OPS)
2051 .Case(
"rv710", GK_R700)
2052 .Case(
"rv730", GK_R700)
2053 .Case(
"rv740", GK_R700_DOUBLE_OPS)
2054 .Case(
"rv770", GK_R700_DOUBLE_OPS)
2055 .Case(
"palm", GK_EVERGREEN)
2056 .Case(
"cedar", GK_EVERGREEN)
2057 .Case(
"sumo", GK_EVERGREEN)
2058 .Case(
"sumo2", GK_EVERGREEN)
2059 .Case(
"redwood", GK_EVERGREEN)
2060 .Case(
"juniper", GK_EVERGREEN)
2061 .Case(
"hemlock", GK_EVERGREEN_DOUBLE_OPS)
2062 .Case(
"cypress", GK_EVERGREEN_DOUBLE_OPS)
2063 .Case(
"barts", GK_NORTHERN_ISLANDS)
2064 .Case(
"turks", GK_NORTHERN_ISLANDS)
2065 .Case(
"caicos", GK_NORTHERN_ISLANDS)
2066 .Case(
"cayman", GK_CAYMAN)
2067 .Case(
"aruba", GK_CAYMAN)
2071 static GPUKind parseAMDGCNName(StringRef Name) {
2072 return llvm::StringSwitch<GPUKind>(
Name)
2073 .Case(
"tahiti", GK_SOUTHERN_ISLANDS)
2074 .Case(
"pitcairn", GK_SOUTHERN_ISLANDS)
2075 .Case(
"verde", GK_SOUTHERN_ISLANDS)
2076 .Case(
"oland", GK_SOUTHERN_ISLANDS)
2077 .Case(
"hainan", GK_SOUTHERN_ISLANDS)
2078 .Case(
"bonaire", GK_SEA_ISLANDS)
2079 .Case(
"kabini", GK_SEA_ISLANDS)
2080 .Case(
"kaveri", GK_SEA_ISLANDS)
2081 .Case(
"hawaii", GK_SEA_ISLANDS)
2082 .Case(
"mullins", GK_SEA_ISLANDS)
2083 .Case(
"tonga", GK_VOLCANIC_ISLANDS)
2084 .Case(
"iceland", GK_VOLCANIC_ISLANDS)
2085 .Case(
"carrizo", GK_VOLCANIC_ISLANDS)
2086 .Case(
"fiji", GK_VOLCANIC_ISLANDS)
2087 .Case(
"stoney", GK_VOLCANIC_ISLANDS)
2091 bool setCPU(
const std::string &Name)
override {
2092 if (getTriple().getArch() == llvm::Triple::amdgcn)
2093 GPU = parseAMDGCNName(Name);
2095 GPU = parseR600Name(Name);
2097 return GPU != GK_NONE;
2100 void setSupportedOpenCLOpts()
override {
2101 auto &Opts = getSupportedOpenCLOpts();
2102 Opts.cl_clang_storage_class_specifiers = 1;
2103 Opts.cl_khr_icd = 1;
2106 Opts.cl_khr_fp64 = 1;
2107 if (GPU >= GK_EVERGREEN) {
2108 Opts.cl_khr_byte_addressable_store = 1;
2109 Opts.cl_khr_global_int32_base_atomics = 1;
2110 Opts.cl_khr_global_int32_extended_atomics = 1;
2111 Opts.cl_khr_local_int32_base_atomics = 1;
2112 Opts.cl_khr_local_int32_extended_atomics = 1;
2114 if (GPU >= GK_SOUTHERN_ISLANDS) {
2115 Opts.cl_khr_fp16 = 1;
2116 Opts.cl_khr_int64_base_atomics = 1;
2117 Opts.cl_khr_int64_extended_atomics = 1;
2118 Opts.cl_khr_3d_image_writes = 1;
2122 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
2125 return CCCR_Warning;
2134 #define BUILTIN(ID, TYPE, ATTRS) \
2135 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
2136 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
2137 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE },
2138 #include "clang/Basic/BuiltinsAMDGPU.def"
2140 const char *
const AMDGPUTargetInfo::GCCRegNames[] = {
2141 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
2142 "v8",
"v9",
"v10",
"v11",
"v12",
"v13",
"v14",
"v15",
2143 "v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
2144 "v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31",
2145 "v32",
"v33",
"v34",
"v35",
"v36",
"v37",
"v38",
"v39",
2146 "v40",
"v41",
"v42",
"v43",
"v44",
"v45",
"v46",
"v47",
2147 "v48",
"v49",
"v50",
"v51",
"v52",
"v53",
"v54",
"v55",
2148 "v56",
"v57",
"v58",
"v59",
"v60",
"v61",
"v62",
"v63",
2149 "v64",
"v65",
"v66",
"v67",
"v68",
"v69",
"v70",
"v71",
2150 "v72",
"v73",
"v74",
"v75",
"v76",
"v77",
"v78",
"v79",
2151 "v80",
"v81",
"v82",
"v83",
"v84",
"v85",
"v86",
"v87",
2152 "v88",
"v89",
"v90",
"v91",
"v92",
"v93",
"v94",
"v95",
2153 "v96",
"v97",
"v98",
"v99",
"v100",
"v101",
"v102",
"v103",
2154 "v104",
"v105",
"v106",
"v107",
"v108",
"v109",
"v110",
"v111",
2155 "v112",
"v113",
"v114",
"v115",
"v116",
"v117",
"v118",
"v119",
2156 "v120",
"v121",
"v122",
"v123",
"v124",
"v125",
"v126",
"v127",
2157 "v128",
"v129",
"v130",
"v131",
"v132",
"v133",
"v134",
"v135",
2158 "v136",
"v137",
"v138",
"v139",
"v140",
"v141",
"v142",
"v143",
2159 "v144",
"v145",
"v146",
"v147",
"v148",
"v149",
"v150",
"v151",
2160 "v152",
"v153",
"v154",
"v155",
"v156",
"v157",
"v158",
"v159",
2161 "v160",
"v161",
"v162",
"v163",
"v164",
"v165",
"v166",
"v167",
2162 "v168",
"v169",
"v170",
"v171",
"v172",
"v173",
"v174",
"v175",
2163 "v176",
"v177",
"v178",
"v179",
"v180",
"v181",
"v182",
"v183",
2164 "v184",
"v185",
"v186",
"v187",
"v188",
"v189",
"v190",
"v191",
2165 "v192",
"v193",
"v194",
"v195",
"v196",
"v197",
"v198",
"v199",
2166 "v200",
"v201",
"v202",
"v203",
"v204",
"v205",
"v206",
"v207",
2167 "v208",
"v209",
"v210",
"v211",
"v212",
"v213",
"v214",
"v215",
2168 "v216",
"v217",
"v218",
"v219",
"v220",
"v221",
"v222",
"v223",
2169 "v224",
"v225",
"v226",
"v227",
"v228",
"v229",
"v230",
"v231",
2170 "v232",
"v233",
"v234",
"v235",
"v236",
"v237",
"v238",
"v239",
2171 "v240",
"v241",
"v242",
"v243",
"v244",
"v245",
"v246",
"v247",
2172 "v248",
"v249",
"v250",
"v251",
"v252",
"v253",
"v254",
"v255",
2173 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
2174 "s8",
"s9",
"s10",
"s11",
"s12",
"s13",
"s14",
"s15",
2175 "s16",
"s17",
"s18",
"s19",
"s20",
"s21",
"s22",
"s23",
2176 "s24",
"s25",
"s26",
"s27",
"s28",
"s29",
"s30",
"s31",
2177 "s32",
"s33",
"s34",
"s35",
"s36",
"s37",
"s38",
"s39",
2178 "s40",
"s41",
"s42",
"s43",
"s44",
"s45",
"s46",
"s47",
2179 "s48",
"s49",
"s50",
"s51",
"s52",
"s53",
"s54",
"s55",
2180 "s56",
"s57",
"s58",
"s59",
"s60",
"s61",
"s62",
"s63",
2181 "s64",
"s65",
"s66",
"s67",
"s68",
"s69",
"s70",
"s71",
2182 "s72",
"s73",
"s74",
"s75",
"s76",
"s77",
"s78",
"s79",
2183 "s80",
"s81",
"s82",
"s83",
"s84",
"s85",
"s86",
"s87",
2184 "s88",
"s89",
"s90",
"s91",
"s92",
"s93",
"s94",
"s95",
2185 "s96",
"s97",
"s98",
"s99",
"s100",
"s101",
"s102",
"s103",
2186 "s104",
"s105",
"s106",
"s107",
"s108",
"s109",
"s110",
"s111",
2187 "s112",
"s113",
"s114",
"s115",
"s116",
"s117",
"s118",
"s119",
2188 "s120",
"s121",
"s122",
"s123",
"s124",
"s125",
"s126",
"s127",
2189 "exec",
"vcc",
"scc",
"m0",
"flat_scratch",
"exec_lo",
"exec_hi",
2190 "vcc_lo",
"vcc_hi",
"flat_scratch_lo",
"flat_scratch_hi"
2194 return llvm::makeArrayRef(GCCRegNames);
2197 bool AMDGPUTargetInfo::initFeatureMap(
2198 llvm::StringMap<bool> &Features,
2200 const std::vector<std::string> &FeatureVec)
const {
2203 if (getTriple().getArch() == llvm::Triple::amdgcn) {
2207 switch (parseAMDGCNName(CPU)) {
2208 case GK_SOUTHERN_ISLANDS:
2209 case GK_SEA_ISLANDS:
2212 case GK_VOLCANIC_ISLANDS:
2213 Features[
"s-memrealtime"] =
true;
2214 Features[
"16-bit-insts"] =
true;
2220 llvm_unreachable(
"unhandled subtarget");
2226 switch (parseR600Name(CPU)) {
2230 case GK_NORTHERN_ISLANDS:
2232 case GK_R600_DOUBLE_OPS:
2233 case GK_R700_DOUBLE_OPS:
2234 case GK_EVERGREEN_DOUBLE_OPS:
2236 Features[
"fp64"] =
true;
2241 llvm_unreachable(
"unhandled subtarget");
2250 #define BUILTIN(ID, TYPE, ATTRS) \
2251 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
2252 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
2253 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
2254 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
2255 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE },
2256 #include "clang/Basic/BuiltinsX86.def"
2259 static const char*
const GCCRegNames[] = {
2260 "ax",
"dx",
"cx",
"bx",
"si",
"di",
"bp",
"sp",
2261 "st",
"st(1)",
"st(2)",
"st(3)",
"st(4)",
"st(5)",
"st(6)",
"st(7)",
2262 "argp",
"flags",
"fpcr",
"fpsr",
"dirflag",
"frame",
2263 "xmm0",
"xmm1",
"xmm2",
"xmm3",
"xmm4",
"xmm5",
"xmm6",
"xmm7",
2264 "mm0",
"mm1",
"mm2",
"mm3",
"mm4",
"mm5",
"mm6",
"mm7",
2265 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
2266 "xmm8",
"xmm9",
"xmm10",
"xmm11",
"xmm12",
"xmm13",
"xmm14",
"xmm15",
2267 "ymm0",
"ymm1",
"ymm2",
"ymm3",
"ymm4",
"ymm5",
"ymm6",
"ymm7",
2268 "ymm8",
"ymm9",
"ymm10",
"ymm11",
"ymm12",
"ymm13",
"ymm14",
"ymm15",
2269 "xmm16",
"xmm17",
"xmm18",
"xmm19",
"xmm20",
"xmm21",
"xmm22",
"xmm23",
2270 "xmm24",
"xmm25",
"xmm26",
"xmm27",
"xmm28",
"xmm29",
"xmm30",
"xmm31",
2271 "ymm16",
"ymm17",
"ymm18",
"ymm19",
"ymm20",
"ymm21",
"ymm22",
"ymm23",
2272 "ymm24",
"ymm25",
"ymm26",
"ymm27",
"ymm28",
"ymm29",
"ymm30",
"ymm31",
2273 "zmm0",
"zmm1",
"zmm2",
"zmm3",
"zmm4",
"zmm5",
"zmm6",
"zmm7",
2274 "zmm8",
"zmm9",
"zmm10",
"zmm11",
"zmm12",
"zmm13",
"zmm14",
"zmm15",
2275 "zmm16",
"zmm17",
"zmm18",
"zmm19",
"zmm20",
"zmm21",
"zmm22",
"zmm23",
2276 "zmm24",
"zmm25",
"zmm26",
"zmm27",
"zmm28",
"zmm29",
"zmm30",
"zmm31",
2280 { {
"al",
"ah",
"eax",
"rax" }, 0 },
2281 { {
"bl",
"bh",
"ebx",
"rbx" }, 3 },
2282 { {
"cl",
"ch",
"ecx",
"rcx" }, 2 },
2283 { {
"dl",
"dh",
"edx",
"rdx" }, 1 },
2284 { {
"esi",
"rsi" }, 4 },
2285 { {
"edi",
"rdi" }, 5 },
2286 { {
"esp",
"rsp" }, 7 },
2287 { {
"ebp",
"rbp" }, 6 },
2288 { {
"r8d",
"r8w",
"r8b" }, 38 },
2289 { {
"r9d",
"r9w",
"r9b" }, 39 },
2290 { {
"r10d",
"r10w",
"r10b" }, 40 },
2291 { {
"r11d",
"r11w",
"r11b" }, 41 },
2292 { {
"r12d",
"r12w",
"r12b" }, 42 },
2293 { {
"r13d",
"r13w",
"r13b" }, 43 },
2294 { {
"r14d",
"r14w",
"r14b" }, 44 },
2295 { {
"r15d",
"r15w",
"r15b" }, 45 },
2302 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
2305 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
2306 } MMX3DNowLevel = NoMMX3DNow;
2314 bool HasAES =
false;
2315 bool HasPCLMUL =
false;
2316 bool HasLZCNT =
false;
2317 bool HasRDRND =
false;
2318 bool HasFSGSBASE =
false;
2319 bool HasBMI =
false;
2320 bool HasBMI2 =
false;
2321 bool HasPOPCNT =
false;
2322 bool HasRTM =
false;
2323 bool HasPRFCHW =
false;
2324 bool HasRDSEED =
false;
2325 bool HasADX =
false;
2326 bool HasTBM =
false;
2327 bool HasFMA =
false;
2328 bool HasF16C =
false;
2329 bool HasAVX512CD =
false;
2330 bool HasAVX512ER =
false;
2331 bool HasAVX512PF =
false;
2332 bool HasAVX512DQ =
false;
2333 bool HasAVX512BW =
false;
2334 bool HasAVX512VL =
false;
2335 bool HasAVX512VBMI =
false;
2336 bool HasAVX512IFMA =
false;
2337 bool HasSHA =
false;
2338 bool HasMPX =
false;
2339 bool HasSGX =
false;
2340 bool HasCX16 =
false;
2341 bool HasFXSR =
false;
2342 bool HasXSAVE =
false;
2343 bool HasXSAVEOPT =
false;
2344 bool HasXSAVEC =
false;
2345 bool HasXSAVES =
false;
2346 bool HasMWAITX =
false;
2347 bool HasPKU =
false;
2348 bool HasCLFLUSHOPT =
false;
2349 bool HasPCOMMIT =
false;
2350 bool HasCLWB =
false;
2351 bool HasUMIP =
false;
2352 bool HasMOVBE =
false;
2353 bool HasPREFETCHWT1 =
false;
2486 CK_AthlonThunderbird,
2535 CPUKind getCPUKind(StringRef CPU)
const {
2536 return llvm::StringSwitch<CPUKind>(CPU)
2537 .Case(
"i386", CK_i386)
2538 .Case(
"i486", CK_i486)
2539 .Case(
"winchip-c6", CK_WinChipC6)
2540 .Case(
"winchip2", CK_WinChip2)
2542 .Case(
"i586", CK_i586)
2543 .Case(
"pentium", CK_Pentium)
2544 .Case(
"pentium-mmx", CK_PentiumMMX)
2545 .Case(
"i686", CK_i686)
2546 .Case(
"pentiumpro", CK_PentiumPro)
2547 .Case(
"pentium2", CK_Pentium2)
2548 .Case(
"pentium3", CK_Pentium3)
2549 .Case(
"pentium3m", CK_Pentium3M)
2550 .Case(
"pentium-m", CK_PentiumM)
2551 .Case(
"c3-2", CK_C3_2)
2552 .Case(
"yonah", CK_Yonah)
2553 .Case(
"pentium4", CK_Pentium4)
2554 .Case(
"pentium4m", CK_Pentium4M)
2555 .Case(
"prescott", CK_Prescott)
2556 .Case(
"nocona", CK_Nocona)
2557 .Case(
"core2", CK_Core2)
2558 .Case(
"penryn", CK_Penryn)
2559 .Case(
"bonnell", CK_Bonnell)
2560 .Case(
"atom", CK_Bonnell)
2561 .Case(
"silvermont", CK_Silvermont)
2562 .Case(
"slm", CK_Silvermont)
2563 .Case(
"nehalem", CK_Nehalem)
2564 .Case(
"corei7", CK_Nehalem)
2565 .Case(
"westmere", CK_Westmere)
2566 .Case(
"sandybridge", CK_SandyBridge)
2567 .Case(
"corei7-avx", CK_SandyBridge)
2568 .Case(
"ivybridge", CK_IvyBridge)
2569 .Case(
"core-avx-i", CK_IvyBridge)
2570 .Case(
"haswell", CK_Haswell)
2571 .Case(
"core-avx2", CK_Haswell)
2572 .Case(
"broadwell", CK_Broadwell)
2573 .Case(
"skylake", CK_SkylakeClient)
2574 .Case(
"skylake-avx512", CK_SkylakeServer)
2575 .Case(
"skx", CK_SkylakeServer)
2576 .Case(
"cannonlake", CK_Cannonlake)
2577 .Case(
"knl", CK_KNL)
2578 .Case(
"lakemont", CK_Lakemont)
2580 .Case(
"k6-2", CK_K6_2)
2581 .Case(
"k6-3", CK_K6_3)
2582 .Case(
"athlon", CK_Athlon)
2583 .Case(
"athlon-tbird", CK_AthlonThunderbird)
2584 .Case(
"athlon-4", CK_Athlon4)
2585 .Case(
"athlon-xp", CK_AthlonXP)
2586 .Case(
"athlon-mp", CK_AthlonMP)
2587 .Case(
"athlon64", CK_Athlon64)
2588 .Case(
"athlon64-sse3", CK_Athlon64SSE3)
2589 .Case(
"athlon-fx", CK_AthlonFX)
2591 .Case(
"k8-sse3", CK_K8SSE3)
2592 .Case(
"opteron", CK_Opteron)
2593 .Case(
"opteron-sse3", CK_OpteronSSE3)
2594 .Case(
"barcelona", CK_AMDFAM10)
2595 .Case(
"amdfam10", CK_AMDFAM10)
2596 .Case(
"btver1", CK_BTVER1)
2597 .Case(
"btver2", CK_BTVER2)
2598 .Case(
"bdver1", CK_BDVER1)
2599 .Case(
"bdver2", CK_BDVER2)
2600 .Case(
"bdver3", CK_BDVER3)
2601 .Case(
"bdver4", CK_BDVER4)
2602 .Case(
"x86-64", CK_x86_64)
2603 .Case(
"geode", CK_Geode)
2604 .Default(CK_Generic);
2611 } FPMath = FP_Default;
2614 X86TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
2617 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
2619 unsigned getFloatEvalMethod()
const override {
2621 return SSELevel == NoSSE ? 2 : 0;
2624 return llvm::makeArrayRef(BuiltinInfo,
2628 return llvm::makeArrayRef(GCCRegNames);
2634 return llvm::makeArrayRef(AddlRegNames);
2636 bool validateCpuSupports(StringRef Name)
const override;
2637 bool validateAsmConstraint(
const char *&Name,
2640 bool validateGlobalRegisterVariable(StringRef RegName,
2642 bool &HasSizeMismatch)
const override {
2645 if (RegName.equals(
"esp") || RegName.equals(
"ebp")) {
2647 HasSizeMismatch = RegSize != 32;
2654 bool validateOutputSize(StringRef Constraint,
unsigned Size)
const override;
2656 bool validateInputSize(StringRef Constraint,
unsigned Size)
const override;
2658 virtual bool validateOperandSize(StringRef Constraint,
unsigned Size)
const;
2660 std::string convertConstraint(
const char *&Constraint)
const override;
2661 const char *getClobbers()
const override {
2662 return "~{dirflag},~{fpsr},~{flags}";
2666 static void setSSELevel(llvm::StringMap<bool> &Features, X86SSEEnum
Level,
2668 static void setMMXLevel(llvm::StringMap<bool> &Features, MMX3DNowEnum
Level,
2670 static void setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum
Level,
2672 void setFeatureEnabled(llvm::StringMap<bool> &Features,
2673 StringRef Name,
bool Enabled)
const override {
2674 setFeatureEnabledImpl(Features, Name, Enabled);
2678 static void setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
2679 StringRef Name,
bool Enabled);
2683 const std::vector<std::string> &FeaturesVec)
const override;
2684 bool hasFeature(StringRef Feature)
const override;
2685 bool handleTargetFeatures(std::vector<std::string> &Features,
2687 StringRef getABI()
const override {
2688 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
2690 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
2692 if (getTriple().getArch() == llvm::Triple::x86 &&
2693 MMX3DNowLevel == NoMMX3DNow)
2697 bool setCPU(
const std::string &Name)
override {
2698 CPU = getCPUKind(Name);
2733 case CK_AthlonThunderbird:
2739 if (getTriple().getArch() != llvm::Triple::x86)
2750 case CK_SandyBridge:
2754 case CK_SkylakeClient:
2755 case CK_SkylakeServer:
2759 case CK_Athlon64SSE3:
2764 case CK_OpteronSSE3:
2775 llvm_unreachable(
"Unhandled CPU kind");
2778 bool setFPMath(StringRef Name)
override;
2780 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
2793 return CCCR_Warning;
2797 CallingConv getDefaultCallingConv(CallingConvMethodType MT)
const override {
2801 bool hasSjLjLowering()
const override {
2805 void setSupportedOpenCLOpts()
override {
2806 getSupportedOpenCLOpts().setAll();
2810 bool X86TargetInfo::setFPMath(StringRef Name) {
2811 if (Name ==
"387") {
2815 if (Name ==
"sse") {
2822 bool X86TargetInfo::initFeatureMap(
2824 const std::vector<std::string> &FeaturesVec)
const {
2827 if (getTriple().getArch() == llvm::Triple::x86_64)
2828 setFeatureEnabledImpl(Features,
"sse2",
true);
2830 const CPUKind
Kind = getCPUKind(CPU);
2833 if (Kind != CK_Lakemont)
2834 setFeatureEnabledImpl(Features,
"x87",
true);
2850 setFeatureEnabledImpl(Features,
"mmx",
true);
2855 setFeatureEnabledImpl(Features,
"sse",
true);
2856 setFeatureEnabledImpl(Features,
"fxsr",
true);
2862 setFeatureEnabledImpl(Features,
"sse2",
true);
2863 setFeatureEnabledImpl(Features,
"fxsr",
true);
2868 setFeatureEnabledImpl(Features,
"sse3",
true);
2869 setFeatureEnabledImpl(Features,
"fxsr",
true);
2870 setFeatureEnabledImpl(Features,
"cx16",
true);
2874 setFeatureEnabledImpl(Features,
"ssse3",
true);
2875 setFeatureEnabledImpl(Features,
"fxsr",
true);
2876 setFeatureEnabledImpl(Features,
"cx16",
true);
2879 setFeatureEnabledImpl(Features,
"sse4.1",
true);
2880 setFeatureEnabledImpl(Features,
"fxsr",
true);
2881 setFeatureEnabledImpl(Features,
"cx16",
true);
2884 setFeatureEnabledImpl(Features,
"avx512ifma",
true);
2885 setFeatureEnabledImpl(Features,
"avx512vbmi",
true);
2886 setFeatureEnabledImpl(Features,
"sha",
true);
2887 setFeatureEnabledImpl(Features,
"umip",
true);
2889 case CK_SkylakeServer:
2890 setFeatureEnabledImpl(Features,
"avx512f",
true);
2891 setFeatureEnabledImpl(Features,
"avx512cd",
true);
2892 setFeatureEnabledImpl(Features,
"avx512dq",
true);
2893 setFeatureEnabledImpl(Features,
"avx512bw",
true);
2894 setFeatureEnabledImpl(Features,
"avx512vl",
true);
2895 setFeatureEnabledImpl(Features,
"pku",
true);
2896 setFeatureEnabledImpl(Features,
"pcommit",
true);
2897 setFeatureEnabledImpl(Features,
"clwb",
true);
2899 case CK_SkylakeClient:
2900 setFeatureEnabledImpl(Features,
"xsavec",
true);
2901 setFeatureEnabledImpl(Features,
"xsaves",
true);
2902 setFeatureEnabledImpl(Features,
"mpx",
true);
2903 setFeatureEnabledImpl(Features,
"sgx",
true);
2904 setFeatureEnabledImpl(Features,
"clflushopt",
true);
2907 setFeatureEnabledImpl(Features,
"rdseed",
true);
2908 setFeatureEnabledImpl(Features,
"adx",
true);
2911 setFeatureEnabledImpl(Features,
"avx2",
true);
2912 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2913 setFeatureEnabledImpl(Features,
"bmi",
true);
2914 setFeatureEnabledImpl(Features,
"bmi2",
true);
2915 setFeatureEnabledImpl(Features,
"rtm",
true);
2916 setFeatureEnabledImpl(Features,
"fma",
true);
2917 setFeatureEnabledImpl(Features,
"movbe",
true);
2920 setFeatureEnabledImpl(Features,
"rdrnd",
true);
2921 setFeatureEnabledImpl(Features,
"f16c",
true);
2922 setFeatureEnabledImpl(Features,
"fsgsbase",
true);
2924 case CK_SandyBridge:
2925 setFeatureEnabledImpl(Features,
"avx",
true);
2926 setFeatureEnabledImpl(Features,
"xsave",
true);
2927 setFeatureEnabledImpl(Features,
"xsaveopt",
true);
2931 setFeatureEnabledImpl(Features,
"aes",
true);
2932 setFeatureEnabledImpl(Features,
"pclmul",
true);
2935 setFeatureEnabledImpl(Features,
"sse4.2",
true);
2936 setFeatureEnabledImpl(Features,
"fxsr",
true);
2937 setFeatureEnabledImpl(Features,
"cx16",
true);
2940 setFeatureEnabledImpl(Features,
"avx512f",
true);
2941 setFeatureEnabledImpl(Features,
"avx512cd",
true);
2942 setFeatureEnabledImpl(Features,
"avx512er",
true);
2943 setFeatureEnabledImpl(Features,
"avx512pf",
true);
2944 setFeatureEnabledImpl(Features,
"prefetchwt1",
true);
2945 setFeatureEnabledImpl(Features,
"fxsr",
true);
2946 setFeatureEnabledImpl(Features,
"rdseed",
true);
2947 setFeatureEnabledImpl(Features,
"adx",
true);
2948 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2949 setFeatureEnabledImpl(Features,
"bmi",
true);
2950 setFeatureEnabledImpl(Features,
"bmi2",
true);
2951 setFeatureEnabledImpl(Features,
"rtm",
true);
2952 setFeatureEnabledImpl(Features,
"fma",
true);
2953 setFeatureEnabledImpl(Features,
"rdrnd",
true);
2954 setFeatureEnabledImpl(Features,
"f16c",
true);
2955 setFeatureEnabledImpl(Features,
"fsgsbase",
true);
2956 setFeatureEnabledImpl(Features,
"aes",
true);
2957 setFeatureEnabledImpl(Features,
"pclmul",
true);
2958 setFeatureEnabledImpl(Features,
"cx16",
true);
2959 setFeatureEnabledImpl(Features,
"xsaveopt",
true);
2960 setFeatureEnabledImpl(Features,
"xsave",
true);
2961 setFeatureEnabledImpl(Features,
"movbe",
true);
2967 setFeatureEnabledImpl(Features,
"3dnow",
true);
2970 case CK_AthlonThunderbird:
2972 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2977 setFeatureEnabledImpl(Features,
"sse",
true);
2978 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2979 setFeatureEnabledImpl(Features,
"fxsr",
true);
2985 setFeatureEnabledImpl(Features,
"sse2",
true);
2986 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2987 setFeatureEnabledImpl(Features,
"fxsr",
true);
2990 setFeatureEnabledImpl(Features,
"sse4a",
true);
2991 setFeatureEnabledImpl(Features,
"lzcnt",
true);
2992 setFeatureEnabledImpl(Features,
"popcnt",
true);
2995 case CK_OpteronSSE3:
2996 case CK_Athlon64SSE3:
2997 setFeatureEnabledImpl(Features,
"sse3",
true);
2998 setFeatureEnabledImpl(Features,
"3dnowa",
true);
2999 setFeatureEnabledImpl(Features,
"fxsr",
true);
3002 setFeatureEnabledImpl(Features,
"avx",
true);
3003 setFeatureEnabledImpl(Features,
"aes",
true);
3004 setFeatureEnabledImpl(Features,
"pclmul",
true);
3005 setFeatureEnabledImpl(Features,
"bmi",
true);
3006 setFeatureEnabledImpl(Features,
"f16c",
true);
3007 setFeatureEnabledImpl(Features,
"xsaveopt",
true);
3010 setFeatureEnabledImpl(Features,
"ssse3",
true);
3011 setFeatureEnabledImpl(Features,
"sse4a",
true);
3012 setFeatureEnabledImpl(Features,
"lzcnt",
true);
3013 setFeatureEnabledImpl(Features,
"popcnt",
true);
3014 setFeatureEnabledImpl(Features,
"prfchw",
true);
3015 setFeatureEnabledImpl(Features,
"cx16",
true);
3016 setFeatureEnabledImpl(Features,
"fxsr",
true);
3019 setFeatureEnabledImpl(Features,
"avx2",
true);
3020 setFeatureEnabledImpl(Features,
"bmi2",
true);
3021 setFeatureEnabledImpl(Features,
"mwaitx",
true);
3024 setFeatureEnabledImpl(Features,
"fsgsbase",
true);
3025 setFeatureEnabledImpl(Features,
"xsaveopt",
true);
3028 setFeatureEnabledImpl(Features,
"bmi",
true);
3029 setFeatureEnabledImpl(Features,
"fma",
true);
3030 setFeatureEnabledImpl(Features,
"f16c",
true);
3031 setFeatureEnabledImpl(Features,
"tbm",
true);
3035 setFeatureEnabledImpl(Features,
"xop",
true);
3036 setFeatureEnabledImpl(Features,
"lzcnt",
true);
3037 setFeatureEnabledImpl(Features,
"aes",
true);
3038 setFeatureEnabledImpl(Features,
"pclmul",
true);
3039 setFeatureEnabledImpl(Features,
"prfchw",
true);
3040 setFeatureEnabledImpl(Features,
"cx16",
true);
3041 setFeatureEnabledImpl(Features,
"fxsr",
true);
3042 setFeatureEnabledImpl(Features,
"xsave",
true);
3052 auto I = Features.find(
"sse4.2");
3053 if (
I != Features.end() &&
I->getValue() &&
3054 std::find(FeaturesVec.begin(), FeaturesVec.end(),
"-popcnt") ==
3056 Features[
"popcnt"] =
true;
3059 I = Features.find(
"3dnow");
3060 if (
I != Features.end() &&
I->getValue() &&
3061 std::find(FeaturesVec.begin(), FeaturesVec.end(),
"-prfchw") ==
3063 Features[
"prfchw"] =
true;
3067 I = Features.find(
"sse");
3068 if (
I != Features.end() &&
I->getValue() &&
3069 std::find(FeaturesVec.begin(), FeaturesVec.end(),
"-mmx") ==
3071 Features[
"mmx"] =
true;
3076 void X86TargetInfo::setSSELevel(llvm::StringMap<bool> &Features,
3077 X86SSEEnum
Level,
bool Enabled) {
3081 Features[
"avx512f"] =
true;
3083 Features[
"avx2"] =
true;
3085 Features[
"avx"] =
true;
3086 Features[
"xsave"] =
true;
3088 Features[
"sse4.2"] =
true;
3090 Features[
"sse4.1"] =
true;
3092 Features[
"ssse3"] =
true;
3094 Features[
"sse3"] =
true;
3096 Features[
"sse2"] =
true;
3098 Features[
"sse"] =
true;
3108 Features[
"sse"] =
false;
3110 Features[
"sse2"] = Features[
"pclmul"] = Features[
"aes"] =
3111 Features[
"sha"] =
false;
3113 Features[
"sse3"] =
false;
3114 setXOPLevel(Features, NoXOP,
false);
3116 Features[
"ssse3"] =
false;
3118 Features[
"sse4.1"] =
false;
3120 Features[
"sse4.2"] =
false;
3122 Features[
"fma"] = Features[
"avx"] = Features[
"f16c"] = Features[
"xsave"] =
3123 Features[
"xsaveopt"] =
false;
3124 setXOPLevel(Features, FMA4,
false);
3126 Features[
"avx2"] =
false;
3128 Features[
"avx512f"] = Features[
"avx512cd"] = Features[
"avx512er"] =
3129 Features[
"avx512pf"] = Features[
"avx512dq"] = Features[
"avx512bw"] =
3130 Features[
"avx512vl"] = Features[
"avx512vbmi"] =
3131 Features[
"avx512ifma"] =
false;
3135 void X86TargetInfo::setMMXLevel(llvm::StringMap<bool> &Features,
3136 MMX3DNowEnum Level,
bool Enabled) {
3139 case AMD3DNowAthlon:
3140 Features[
"3dnowa"] =
true;
3142 Features[
"3dnow"] =
true;
3144 Features[
"mmx"] =
true;
3154 Features[
"mmx"] =
false;
3156 Features[
"3dnow"] =
false;
3157 case AMD3DNowAthlon:
3158 Features[
"3dnowa"] =
false;
3162 void X86TargetInfo::setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum Level,
3167 Features[
"xop"] =
true;
3169 Features[
"fma4"] =
true;
3170 setSSELevel(Features, AVX,
true);
3172 Features[
"sse4a"] =
true;
3173 setSSELevel(Features, SSE3,
true);
3183 Features[
"sse4a"] =
false;
3185 Features[
"fma4"] =
false;
3187 Features[
"xop"] =
false;
3191 void X86TargetInfo::setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
3192 StringRef Name,
bool Enabled) {
3197 Features[
Name] = Enabled;
3199 if (Name ==
"mmx") {
3200 setMMXLevel(Features, MMX, Enabled);
3201 }
else if (Name ==
"sse") {
3202 setSSELevel(Features, SSE1, Enabled);
3203 }
else if (Name ==
"sse2") {
3204 setSSELevel(Features, SSE2, Enabled);
3205 }
else if (Name ==
"sse3") {
3206 setSSELevel(Features, SSE3, Enabled);
3207 }
else if (Name ==
"ssse3") {
3208 setSSELevel(Features, SSSE3, Enabled);
3209 }
else if (Name ==
"sse4.2") {
3210 setSSELevel(Features, SSE42, Enabled);
3211 }
else if (Name ==
"sse4.1") {
3212 setSSELevel(Features, SSE41, Enabled);
3213 }
else if (Name ==
"3dnow") {
3214 setMMXLevel(Features, AMD3DNow, Enabled);
3215 }
else if (Name ==
"3dnowa") {
3216 setMMXLevel(Features, AMD3DNowAthlon, Enabled);
3217 }
else if (Name ==
"aes") {
3219 setSSELevel(Features, SSE2, Enabled);
3220 }
else if (Name ==
"pclmul") {
3222 setSSELevel(Features, SSE2, Enabled);
3223 }
else if (Name ==
"avx") {
3224 setSSELevel(Features, AVX, Enabled);
3225 }
else if (Name ==
"avx2") {
3226 setSSELevel(Features, AVX2, Enabled);
3227 }
else if (Name ==
"avx512f") {
3228 setSSELevel(Features, AVX512F, Enabled);
3229 }
else if (Name ==
"avx512cd" || Name ==
"avx512er" || Name ==
"avx512pf" ||
3230 Name ==
"avx512dq" || Name ==
"avx512bw" || Name ==
"avx512vl" ||
3231 Name ==
"avx512vbmi" || Name ==
"avx512ifma") {
3233 setSSELevel(Features, AVX512F, Enabled);
3234 }
else if (Name ==
"fma") {
3236 setSSELevel(Features, AVX, Enabled);
3237 }
else if (Name ==
"fma4") {
3238 setXOPLevel(Features, FMA4, Enabled);
3239 }
else if (Name ==
"xop") {
3240 setXOPLevel(Features, XOP, Enabled);
3241 }
else if (Name ==
"sse4a") {
3242 setXOPLevel(Features, SSE4A, Enabled);
3243 }
else if (Name ==
"f16c") {
3245 setSSELevel(Features, AVX, Enabled);
3246 }
else if (Name ==
"sha") {
3248 setSSELevel(Features, SSE2, Enabled);
3249 }
else if (Name ==
"sse4") {
3255 setSSELevel(Features, SSE42, Enabled);
3257 setSSELevel(Features, SSE41, Enabled);
3258 }
else if (Name ==
"xsave") {
3260 Features[
"xsaveopt"] =
false;
3261 }
else if (Name ==
"xsaveopt" || Name ==
"xsavec" || Name ==
"xsaves") {
3263 Features[
"xsave"] =
true;
3269 bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
3271 for (
const auto &Feature : Features) {
3272 if (Feature[0] !=
'+')
3275 if (Feature ==
"+aes") {
3277 }
else if (Feature ==
"+pclmul") {
3279 }
else if (Feature ==
"+lzcnt") {
3281 }
else if (Feature ==
"+rdrnd") {
3283 }
else if (Feature ==
"+fsgsbase") {
3285 }
else if (Feature ==
"+bmi") {
3287 }
else if (Feature ==
"+bmi2") {
3289 }
else if (Feature ==
"+popcnt") {
3291 }
else if (Feature ==
"+rtm") {
3293 }
else if (Feature ==
"+prfchw") {
3295 }
else if (Feature ==
"+rdseed") {
3297 }
else if (Feature ==
"+adx") {
3299 }
else if (Feature ==
"+tbm") {
3301 }
else if (Feature ==
"+fma") {
3303 }
else if (Feature ==
"+f16c") {
3305 }
else if (Feature ==
"+avx512cd") {
3307 }
else if (Feature ==
"+avx512er") {
3309 }
else if (Feature ==
"+avx512pf") {
3311 }
else if (Feature ==
"+avx512dq") {
3313 }
else if (Feature ==
"+avx512bw") {
3315 }
else if (Feature ==
"+avx512vl") {
3317 }
else if (Feature ==
"+avx512vbmi") {
3318 HasAVX512VBMI =
true;
3319 }
else if (Feature ==
"+avx512ifma") {
3320 HasAVX512IFMA =
true;
3321 }
else if (Feature ==
"+sha") {
3323 }
else if (Feature ==
"+mpx") {
3325 }
else if (Feature ==
"+movbe") {
3327 }
else if (Feature ==
"+sgx") {
3329 }
else if (Feature ==
"+cx16") {
3331 }
else if (Feature ==
"+fxsr") {
3333 }
else if (Feature ==
"+xsave") {
3335 }
else if (Feature ==
"+xsaveopt") {
3337 }
else if (Feature ==
"+xsavec") {
3339 }
else if (Feature ==
"+xsaves") {
3341 }
else if (Feature ==
"+mwaitx") {
3343 }
else if (Feature ==
"+pku") {
3345 }
else if (Feature ==
"+clflushopt") {
3346 HasCLFLUSHOPT =
true;
3347 }
else if (Feature ==
"+pcommit") {
3349 }
else if (Feature ==
"+clwb") {
3351 }
else if (Feature ==
"+umip") {
3353 }
else if (Feature ==
"+prefetchwt1") {
3354 HasPREFETCHWT1 =
true;
3357 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
3358 .Case(
"+avx512f", AVX512F)
3359 .Case(
"+avx2", AVX2)
3361 .Case(
"+sse4.2", SSE42)
3362 .Case(
"+sse4.1", SSE41)
3363 .Case(
"+ssse3", SSSE3)
3364 .Case(
"+sse3", SSE3)
3365 .Case(
"+sse2", SSE2)
3368 SSELevel =
std::max(SSELevel, Level);
3370 MMX3DNowEnum ThreeDNowLevel =
3371 llvm::StringSwitch<MMX3DNowEnum>(Feature)
3372 .Case(
"+3dnowa", AMD3DNowAthlon)
3373 .Case(
"+3dnow", AMD3DNow)
3375 .Default(NoMMX3DNow);
3376 MMX3DNowLevel =
std::max(MMX3DNowLevel, ThreeDNowLevel);
3378 XOPEnum XLevel = llvm::StringSwitch<XOPEnum>(Feature)
3380 .Case(
"+fma4", FMA4)
3381 .Case(
"+sse4a", SSE4A)
3383 XOPLevel =
std::max(XOPLevel, XLevel);
3388 if ((FPMath == FP_SSE && SSELevel < SSE1) ||
3389 (FPMath == FP_387 && SSELevel >= SSE1)) {
3390 Diags.
Report(diag::err_target_unsupported_fpmath) <<
3391 (FPMath == FP_SSE ?
"sse" :
"387");
3402 void X86TargetInfo::getTargetDefines(
const LangOptions &Opts,
3405 if (getTriple().getArch() == llvm::Triple::x86_64) {
3410 if (getTriple().getArchName() ==
"x86_64h") {
3484 case CK_SandyBridge:
3488 case CK_SkylakeClient:
3494 case CK_SkylakeServer:
3510 if (CPU != CK_K6_2) {
3522 case CK_AthlonThunderbird:
3527 if (SSELevel != NoSSE) {
3536 case CK_OpteronSSE3:
3538 case CK_Athlon64SSE3:
3668 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16");
3696 if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
3717 switch (MMX3DNowLevel) {
3718 case AMD3DNowAthlon:
3728 if (CPU >= CK_i486) {
3729 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
3730 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
3731 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
3734 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
3738 return llvm::StringSwitch<bool>(Feature)
3739 .Case(
"aes", HasAES)
3740 .Case(
"avx", SSELevel >= AVX)
3741 .Case(
"avx2", SSELevel >= AVX2)
3742 .Case(
"avx512f", SSELevel >= AVX512F)
3743 .Case(
"avx512cd", HasAVX512CD)
3744 .Case(
"avx512er", HasAVX512ER)
3745 .Case(
"avx512pf", HasAVX512PF)
3746 .Case(
"avx512dq", HasAVX512DQ)
3747 .Case(
"avx512bw", HasAVX512BW)
3748 .Case(
"avx512vl", HasAVX512VL)
3749 .Case(
"avx512vbmi", HasAVX512VBMI)
3750 .Case(
"avx512ifma", HasAVX512IFMA)
3751 .Case(
"bmi", HasBMI)
3752 .Case(
"bmi2", HasBMI2)
3753 .Case(
"clflushopt", HasCLFLUSHOPT)
3754 .Case(
"clwb", HasCLWB)
3755 .Case(
"cx16", HasCX16)
3756 .Case(
"f16c", HasF16C)
3757 .Case(
"fma", HasFMA)
3758 .Case(
"fma4", XOPLevel >= FMA4)
3759 .Case(
"fsgsbase", HasFSGSBASE)
3760 .Case(
"fxsr", HasFXSR)
3761 .Case(
"lzcnt", HasLZCNT)
3762 .Case(
"mm3dnow", MMX3DNowLevel >= AMD3DNow)
3763 .Case(
"mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
3764 .Case(
"mmx", MMX3DNowLevel >= MMX)
3765 .Case(
"movbe", HasMOVBE)
3766 .Case(
"mpx", HasMPX)
3767 .Case(
"pclmul", HasPCLMUL)
3768 .Case(
"pcommit", HasPCOMMIT)
3769 .Case(
"pku", HasPKU)
3770 .Case(
"popcnt", HasPOPCNT)
3771 .Case(
"prefetchwt1", HasPREFETCHWT1)
3772 .Case(
"prfchw", HasPRFCHW)
3773 .Case(
"rdrnd", HasRDRND)
3774 .Case(
"rdseed", HasRDSEED)
3775 .Case(
"rtm", HasRTM)
3776 .Case(
"sgx", HasSGX)
3777 .Case(
"sha", HasSHA)
3778 .Case(
"sse", SSELevel >= SSE1)
3779 .Case(
"sse2", SSELevel >= SSE2)
3780 .Case(
"sse3", SSELevel >= SSE3)
3781 .Case(
"ssse3", SSELevel >= SSSE3)
3782 .Case(
"sse4.1", SSELevel >= SSE41)
3783 .Case(
"sse4.2", SSELevel >= SSE42)
3784 .Case(
"sse4a", XOPLevel >= SSE4A)
3785 .Case(
"tbm", HasTBM)
3786 .Case(
"umip", HasUMIP)
3788 .Case(
"x86_32", getTriple().getArch() == llvm::Triple::x86)
3789 .Case(
"x86_64", getTriple().getArch() == llvm::Triple::x86_64)
3790 .Case(
"xop", XOPLevel >= XOP)
3791 .Case(
"xsave", HasXSAVE)
3792 .Case(
"xsavec", HasXSAVEC)
3793 .Case(
"xsaves", HasXSAVES)
3794 .Case(
"xsaveopt", HasXSAVEOPT)
3803 bool X86TargetInfo::validateCpuSupports(StringRef FeatureStr)
const {
3804 return llvm::StringSwitch<bool>(FeatureStr)
3807 .Case(
"popcnt",
true)
3811 .Case(
"ssse3",
true)
3812 .Case(
"sse4.1",
true)
3813 .Case(
"sse4.2",
true)
3816 .Case(
"sse4a",
true)
3820 .Case(
"avx512f",
true)
3824 .Case(
"pclmul",
true)
3825 .Case(
"avx512vl",
true)
3826 .Case(
"avx512bw",
true)
3827 .Case(
"avx512dq",
true)
3828 .Case(
"avx512cd",
true)
3829 .Case(
"avx512er",
true)
3830 .Case(
"avx512pf",
true)
3831 .Case(
"avx512vbmi",
true)
3832 .Case(
"avx512ifma",
true)
3837 X86TargetInfo::validateAsmConstraint(
const char *&Name,
3840 default:
return false;
3915 bool X86TargetInfo::validateOutputSize(StringRef Constraint,
3916 unsigned Size)
const {
3918 while (Constraint[0] ==
'=' ||
3919 Constraint[0] ==
'+' ||
3920 Constraint[0] ==
'&')
3921 Constraint = Constraint.substr(1);
3923 return validateOperandSize(Constraint, Size);
3926 bool X86TargetInfo::validateInputSize(StringRef Constraint,
3927 unsigned Size)
const {
3928 return validateOperandSize(Constraint, Size);
3931 bool X86TargetInfo::validateOperandSize(StringRef Constraint,
3932 unsigned Size)
const {
3933 switch (Constraint[0]) {
3942 if (SSELevel >= AVX512F)
3944 return Size <= 512U;
3945 else if (SSELevel >= AVX)
3947 return Size <= 256U;
3948 return Size <= 128U;
3951 switch (Constraint[1]) {
3959 if (SSELevel >= AVX512F)
3960 return Size <= 512U;
3961 else if (SSELevel >= AVX)
3962 return Size <= 256U;
3963 return SSELevel >= SSE2 && Size <= 128U;
3972 X86TargetInfo::convertConstraint(
const char *&Constraint)
const {
3973 switch (*Constraint) {
3974 case 'a':
return std::string(
"{ax}");
3975 case 'b':
return std::string(
"{bx}");
3976 case 'c':
return std::string(
"{cx}");
3977 case 'd':
return std::string(
"{dx}");
3978 case 'S':
return std::string(
"{si}");
3979 case 'D':
return std::string(
"{di}");
3981 return std::string(
"im");
3983 return std::string(
"{st}");
3985 return std::string(
"{st(1)}");
3987 return std::string(1, *Constraint);
3992 class X86_32TargetInfo :
public X86TargetInfo {
3994 X86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
3995 : X86TargetInfo(Triple, Opts) {
3996 DoubleAlign = LongLongAlign = 32;
3997 LongDoubleWidth = 96;
3998 LongDoubleAlign = 32;
3999 SuitableAlign = 128;
4000 resetDataLayout(
"e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128");
4001 SizeType = UnsignedInt;
4002 PtrDiffType = SignedInt;
4003 IntPtrType = SignedInt;
4014 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
4016 BuiltinVaListKind getBuiltinVaListKind()
const override {
4020 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
4021 if (RegNo == 0)
return 0;
4022 if (RegNo == 1)
return 2;
4025 bool validateOperandSize(StringRef Constraint,
4026 unsigned Size)
const override {
4027 switch (Constraint[0]) {
4043 return X86TargetInfo::validateOperandSize(Constraint, Size);
4047 class NetBSDI386TargetInfo :
public NetBSDTargetInfo<X86_32TargetInfo> {
4049 NetBSDI386TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4050 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
4052 unsigned getFloatEvalMethod()
const override {
4053 unsigned Major, Minor, Micro;
4054 getTriple().getOSVersion(Major, Minor, Micro);
4056 if (Major >= 7 || (Major == 6 && Minor == 99 && Micro >= 26) || Major == 0)
4057 return X86_32TargetInfo::getFloatEvalMethod();
4063 class OpenBSDI386TargetInfo :
public OpenBSDTargetInfo<X86_32TargetInfo> {
4065 OpenBSDI386TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4066 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
4067 SizeType = UnsignedLong;
4068 IntPtrType = SignedLong;
4069 PtrDiffType = SignedLong;
4073 class BitrigI386TargetInfo :
public BitrigTargetInfo<X86_32TargetInfo> {
4075 BitrigI386TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4076 : BitrigTargetInfo<X86_32TargetInfo>(Triple, Opts) {
4077 SizeType = UnsignedLong;
4078 IntPtrType = SignedLong;
4079 PtrDiffType = SignedLong;
4083 class DarwinI386TargetInfo :
public DarwinTargetInfo<X86_32TargetInfo> {
4085 DarwinI386TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4086 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
4087 LongDoubleWidth = 128;
4088 LongDoubleAlign = 128;
4089 SuitableAlign = 128;
4090 MaxVectorAlign = 256;
4092 llvm::Triple T = llvm::Triple(Triple);
4094 UseSignedCharForObjCBool =
false;
4095 SizeType = UnsignedLong;
4096 IntPtrType = SignedLong;
4097 resetDataLayout(
"e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128");
4098 HasAlignMac68kSupport =
true;
4101 bool handleTargetFeatures(std::vector<std::string> &Features,
4103 if (!DarwinTargetInfo<X86_32TargetInfo>::handleTargetFeatures(Features,
4114 class WindowsX86_32TargetInfo :
public WindowsTargetInfo<X86_32TargetInfo> {
4116 WindowsX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4117 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
4118 WCharType = UnsignedShort;
4119 DoubleAlign = LongLongAlign = 64;
4121 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
4122 resetDataLayout(IsWinCOFF
4123 ?
"e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
4124 :
"e-m:e-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32");
4128 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
4133 class MicrosoftX86_32TargetInfo :
public WindowsX86_32TargetInfo {
4135 MicrosoftX86_32TargetInfo(
const llvm::Triple &Triple,
4137 : WindowsX86_32TargetInfo(Triple, Opts) {
4138 LongDoubleWidth = LongDoubleAlign = 64;
4139 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
4143 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
4144 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
4156 if (Opts.MicrosoftExt)
4159 Builder.
defineMacro(
"__declspec(a)",
"__attribute__((a))");
4161 if (!Opts.MicrosoftExt) {
4165 const char *CCs[] = {
"cdecl",
"stdcall",
"fastcall",
"thiscall",
"pascal"};
4166 for (
const char *CC : CCs) {
4167 std::string GCCSpelling =
"__attribute__((__";
4169 GCCSpelling +=
"__))";
4170 Builder.
defineMacro(Twine(
"_") + CC, GCCSpelling);
4171 Builder.
defineMacro(Twine(
"__") + CC, GCCSpelling);
4179 addCygMingDefines(Opts, Builder);
4183 class MinGWX86_32TargetInfo :
public WindowsX86_32TargetInfo {
4185 MinGWX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4186 : WindowsX86_32TargetInfo(Triple, Opts) {}
4189 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
4193 addMinGWDefines(Opts, Builder);
4198 class CygwinX86_32TargetInfo :
public X86_32TargetInfo {
4200 CygwinX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4201 : X86_32TargetInfo(Triple, Opts) {
4202 WCharType = UnsignedShort;
4203 DoubleAlign = LongLongAlign = 64;
4204 resetDataLayout(
"e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32");
4208 X86_32TargetInfo::getTargetDefines(Opts, Builder);
4212 addCygMingDefines(Opts, Builder);
4220 class HaikuX86_32TargetInfo :
public HaikuTargetInfo<X86_32TargetInfo> {
4222 HaikuX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4223 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {
4227 HaikuTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
4233 class MCUX86_32TargetInfo :
public X86_32TargetInfo {
4235 MCUX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4236 : X86_32TargetInfo(Triple, Opts) {
4237 LongDoubleWidth = 64;
4238 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
4239 resetDataLayout(
"e-m:e-p:32:32-i64:32-f64:32-f128:32-n8:16:32-a:0:32-S32");
4240 WIntType = UnsignedInt;
4243 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
4245 return CC ==
CC_C ? CCCR_OK : CCCR_Warning;
4250 X86_32TargetInfo::getTargetDefines(Opts, Builder);
4255 bool allowsLargerPreferedTypeAlignment()
const override {
4261 template<
typename Target>
4262 class RTEMSTargetInfo :
public OSTargetInfo<Target> {
4264 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
4273 RTEMSTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4274 : OSTargetInfo<Target>(Triple, Opts) {
4275 switch (Triple.getArch()) {
4277 case llvm::Triple::x86:
4280 case llvm::Triple::mips:
4281 case llvm::Triple::mipsel:
4282 case llvm::Triple::ppc:
4283 case llvm::Triple::ppc64:
4284 case llvm::Triple::ppc64le:
4287 case llvm::Triple::arm:
4295 class RTEMSX86_32TargetInfo :
public X86_32TargetInfo {
4297 RTEMSX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4298 : X86_32TargetInfo(Triple, Opts) {
4299 SizeType = UnsignedLong;
4300 IntPtrType = SignedLong;
4301 PtrDiffType = SignedLong;
4305 X86_32TargetInfo::getTargetDefines(Opts, Builder);
4312 class X86_64TargetInfo :
public X86TargetInfo {
4314 X86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4315 : X86TargetInfo(Triple, Opts) {
4316 const bool IsX32 = getTriple().getEnvironment() == llvm::Triple::GNUX32;
4318 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
4319 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
4320 LongDoubleWidth = 128;
4321 LongDoubleAlign = 128;
4322 LargeArrayMinWidth = 128;
4323 LargeArrayAlign = 128;
4324 SuitableAlign = 128;
4325 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
4326 PtrDiffType = IsX32 ? SignedInt : SignedLong;
4327 IntPtrType = IsX32 ? SignedInt : SignedLong;
4328 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
4329 Int64Type = IsX32 ? SignedLongLong : SignedLong;
4333 resetDataLayout(IsX32
4334 ?
"e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
4335 : IsWinCOFF ?
"e-m:w-i64:64-f80:128-n8:16:32:64-S128"
4336 :
"e-m:e-i64:64-f80:128-n8:16:32:64-S128");
4342 ComplexLongDoubleUsesFP2Ret =
true;
4345 HasBuiltinMSVaList =
true;
4348 MaxAtomicPromoteWidth = 128;
4349 MaxAtomicInlineWidth = 128;
4351 BuiltinVaListKind getBuiltinVaListKind()
const override {
4355 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
4356 if (RegNo == 0)
return 0;
4357 if (RegNo == 1)
return 1;
4361 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
4372 return CCCR_Warning;
4376 CallingConv getDefaultCallingConv(CallingConvMethodType MT)
const override {
4381 bool hasInt128Type()
const override {
return true; }
4382 unsigned getUnwindWordWidth()
const override {
return 64; }
4383 unsigned getRegisterWidth()
const override {
return 64; }
4385 bool validateGlobalRegisterVariable(StringRef RegName,
4387 bool &HasSizeMismatch)
const override {
4390 if (RegName.equals(
"rsp") || RegName.equals(
"rbp")) {
4392 HasSizeMismatch = RegSize != 64;
4397 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
4403 class WindowsX86_64TargetInfo :
public WindowsTargetInfo<X86_64TargetInfo> {
4405 WindowsX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4406 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
4407 WCharType = UnsignedShort;
4408 LongWidth = LongAlign = 32;
4409 DoubleAlign = LongLongAlign = 64;
4410 IntMaxType = SignedLongLong;
4411 Int64Type = SignedLongLong;
4412 SizeType = UnsignedLongLong;
4413 PtrDiffType = SignedLongLong;
4414 IntPtrType = SignedLongLong;
4419 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
4423 BuiltinVaListKind getBuiltinVaListKind()
const override {
4427 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
4439 return CCCR_Warning;
4445 class MicrosoftX86_64TargetInfo :
public WindowsX86_64TargetInfo {
4447 MicrosoftX86_64TargetInfo(
const llvm::Triple &Triple,
4449 : WindowsX86_64TargetInfo(Triple, Opts) {
4450 LongDoubleWidth = LongDoubleAlign = 64;
4451 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
4455 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
4456 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
4463 class MinGWX86_64TargetInfo :
public WindowsX86_64TargetInfo {
4465 MinGWX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4466 : WindowsX86_64TargetInfo(Triple, Opts) {
4469 LongDoubleWidth = LongDoubleAlign = 128;
4470 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
4475 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
4478 addMinGWDefines(Opts, Builder);
4481 if (!Opts.SjLjExceptions)
4487 class CygwinX86_64TargetInfo :
public X86_64TargetInfo {
4489 CygwinX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4490 : X86_64TargetInfo(Triple, Opts) {
4491 TLSSupported =
false;
4492 WCharType = UnsignedShort;
4496 X86_64TargetInfo::getTargetDefines(Opts, Builder);
4500 addCygMingDefines(Opts, Builder);
4506 if (!Opts.SjLjExceptions)
4511 class DarwinX86_64TargetInfo :
public DarwinTargetInfo<X86_64TargetInfo> {
4513 DarwinX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4514 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
4515 Int64Type = SignedLongLong;
4517 llvm::Triple T = llvm::Triple(Triple);
4519 UseSignedCharForObjCBool =
false;
4520 resetDataLayout(
"e-m:o-i64:64-f80:128-n8:16:32:64-S128");
4523 bool handleTargetFeatures(std::vector<std::string> &Features,
4525 if (!DarwinTargetInfo<X86_64TargetInfo>::handleTargetFeatures(Features,
4535 class OpenBSDX86_64TargetInfo :
public OpenBSDTargetInfo<X86_64TargetInfo> {
4537 OpenBSDX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4538 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
4539 IntMaxType = SignedLongLong;
4540 Int64Type = SignedLongLong;
4544 class BitrigX86_64TargetInfo :
public BitrigTargetInfo<X86_64TargetInfo> {
4546 BitrigX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
4547 : BitrigTargetInfo<X86_64TargetInfo>(Triple, Opts) {
4548 IntMaxType = SignedLongLong;
4549 Int64Type = SignedLongLong;
4565 HWDivThumb = (1 << 0),
4569 static bool FPUModeIsVFP(FPUMode Mode) {
4570 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU | FPARMV8);
4574 static const char *
const GCCRegNames[];
4576 std::string ABI, CPU;
4578 StringRef CPUProfile;
4588 unsigned ArchKind = llvm::ARM::AK_ARMV4T;
4589 unsigned ArchProfile;
4590 unsigned ArchVersion;
4594 unsigned IsAAPCS : 1;
4598 unsigned SoftFloat : 1;
4599 unsigned SoftFloatABI : 1;
4602 unsigned Crypto : 1;
4604 unsigned Unaligned : 1;
4617 HW_FP_HP = (1 << 1),
4618 HW_FP_SP = (1 << 2),
4619 HW_FP_DP = (1 << 3),
4625 void setABIAAPCS() {
4628 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 64;
4629 const llvm::Triple &T = getTriple();
4632 if (T.isOSBinFormatMachO() || T.getOS() == llvm::Triple::NetBSD ||
4633 T.getOS() == llvm::Triple::Bitrig)
4634 SizeType = UnsignedLong;
4636 SizeType = UnsignedInt;
4638 switch (T.getOS()) {
4639 case llvm::Triple::NetBSD:
4640 WCharType = SignedInt;
4642 case llvm::Triple::Win32:
4643 WCharType = UnsignedShort;
4645 case llvm::Triple::Linux:
4648 WCharType = UnsignedInt;
4652 UseBitFieldTypeAlignment =
true;
4654 ZeroLengthBitfieldBoundary = 0;
4658 if (T.isOSBinFormatMachO()) {
4659 resetDataLayout(BigEndian
4660 ?
"E-m:o-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
4661 :
"e-m:o-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64");
4662 }
else if (T.isOSWindows()) {
4663 assert(!BigEndian &&
"Windows on ARM does not support big endian");
4672 }
else if (T.isOSNaCl()) {
4673 assert(!BigEndian &&
"NaCl on ARM does not support big endian");
4674 resetDataLayout(
"e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S128");
4676 resetDataLayout(BigEndian
4677 ?
"E-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
4678 :
"e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64");
4684 void setABIAPCS(
bool IsAAPCS16) {
4685 const llvm::Triple &T = getTriple();
4690 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 64;
4692 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
4695 if (T.getOS() == llvm::Triple::FreeBSD)
4696 SizeType = UnsignedInt;
4698 SizeType = UnsignedLong;
4701 WCharType = SignedInt;
4705 UseBitFieldTypeAlignment =
false;
4710 ZeroLengthBitfieldBoundary = 32;
4712 if (T.isOSBinFormatMachO() && IsAAPCS16) {
4713 assert(!BigEndian &&
"AAPCS16 does not support big-endian");
4714 resetDataLayout(
"e-m:o-p:32:32-i64:64-a:0:32-n32-S128");
4715 }
else if (T.isOSBinFormatMachO())
4718 ?
"E-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
4719 :
"e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32");
4723 ?
"E-m:e-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
4724 :
"e-m:e-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32");
4729 void setArchInfo() {
4730 StringRef ArchName = getTriple().getArchName();
4732 ArchISA = llvm::ARM::parseArchISA(ArchName);
4733 CPU = llvm::ARM::getDefaultCPU(ArchName);
4734 unsigned AK = llvm::ARM::parseArch(ArchName);
4735 if (AK != llvm::ARM::AK_INVALID)
4737 setArchInfo(ArchKind);
4740 void setArchInfo(
unsigned Kind) {
4745 SubArch = llvm::ARM::getSubArch(ArchKind);
4746 ArchProfile = llvm::ARM::parseArchProfile(SubArch);
4747 ArchVersion = llvm::ARM::parseArchVersion(SubArch);
4750 CPUAttr = getCPUAttr();
4751 CPUProfile = getCPUProfile();
4757 bool ShouldUseInlineAtomic =
4758 (ArchISA == llvm::ARM::IK_ARM && ArchVersion >= 6) ||
4759 (ArchISA == llvm::ARM::IK_THUMB && ArchVersion >= 7);
4761 if (ArchProfile == llvm::ARM::PK_M) {
4762 MaxAtomicPromoteWidth = 32;
4763 if (ShouldUseInlineAtomic)
4764 MaxAtomicInlineWidth = 32;
4767 MaxAtomicPromoteWidth = 64;
4768 if (ShouldUseInlineAtomic)
4769 MaxAtomicInlineWidth = 64;
4773 bool isThumb()
const {
4774 return (ArchISA == llvm::ARM::IK_THUMB);
4777 bool supportsThumb()
const {
4778 return CPUAttr.count(
'T') || ArchVersion >= 6;
4781 bool supportsThumb2()
const {
4782 return CPUAttr.equals(
"6T2") ||
4783 (ArchVersion >= 7 && !CPUAttr.equals(
"8M_BASE"));
4786 StringRef getCPUAttr()
const {
4791 return llvm::ARM::getCPUAttr(ArchKind);
4792 case llvm::ARM::AK_ARMV6M:
4794 case llvm::ARM::AK_ARMV7S:
4796 case llvm::ARM::AK_ARMV7A:
4798 case llvm::ARM::AK_ARMV7R:
4800 case llvm::ARM::AK_ARMV7M:
4802 case llvm::ARM::AK_ARMV7EM:
4804 case llvm::ARM::AK_ARMV8A:
4806 case llvm::ARM::AK_ARMV8_1A:
4808 case llvm::ARM::AK_ARMV8_2A:
4810 case llvm::ARM::AK_ARMV8MBaseline:
4812 case llvm::ARM::AK_ARMV8MMainline:
4817 StringRef getCPUProfile()
const {
4818 switch(ArchProfile) {
4819 case llvm::ARM::PK_A:
4821 case llvm::ARM::PK_R:
4823 case llvm::ARM::PK_M:
4831 ARMTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts,
4833 :
TargetInfo(Triple), FPMath(FP_Default), IsAAPCS(
true), LDREX(0),
4835 BigEndian = IsBigEndian;
4837 switch (getTriple().getOS()) {
4838 case llvm::Triple::NetBSD:
4839 PtrDiffType = SignedLong;
4842 PtrDiffType = SignedInt;
4851 NoAsmVariants =
true;
4856 if (Triple.isOSBinFormatMachO()) {
4859 if (Triple.getEnvironment() == llvm::Triple::EABI ||
4860 Triple.getOS() == llvm::Triple::UnknownOS ||
4861 StringRef(CPU).startswith(
"cortex-m")) {
4863 }
else if (Triple.isWatchABI()) {
4868 }
else if (Triple.isOSWindows()) {
4873 switch (Triple.getEnvironment()) {
4874 case llvm::Triple::Android:
4875 case llvm::Triple::GNUEABI:
4876 case llvm::Triple::GNUEABIHF:
4877 case llvm::Triple::MuslEABI:
4878 case llvm::Triple::MuslEABIHF:
4879 setABI(
"aapcs-linux");
4881 case llvm::Triple::EABIHF:
4882 case llvm::Triple::EABI:
4885 case llvm::Triple::GNU:
4889 if (Triple.getOS() == llvm::Triple::NetBSD)
4907 UseZeroLengthBitfieldAlignment =
true;
4909 if (Triple.getOS() == llvm::Triple::Linux ||
4910 Triple.getOS() == llvm::Triple::UnknownOS)
4912 Opts.
EABIVersion ==
"gnu" ?
"\01__gnu_mcount_nc" :
"\01mcount";
4915 StringRef getABI()
const override {
return ABI; }
4917 bool setABI(
const std::string &Name)
override {
4924 if (Name ==
"apcs-gnu" || Name ==
"aapcs16") {
4925 setABIAPCS(Name ==
"aapcs16");
4928 if (Name ==
"aapcs" || Name ==
"aapcs-vfp" || Name ==
"aapcs-linux") {
4939 const std::vector<std::string> &FeaturesVec)
const override {
4941 std::vector<const char*> TargetFeatures;
4942 unsigned Arch = llvm::ARM::parseArch(getTriple().getArchName());
4945 unsigned FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch);
4946 llvm::ARM::getFPUFeatures(FPUKind, TargetFeatures);
4949 unsigned Extensions = llvm::ARM::getDefaultExtensions(CPU, Arch);
4950 llvm::ARM::getExtensionFeatures(Extensions, TargetFeatures);
4952 for (
const char *Feature : TargetFeatures)
4953 if (Feature[0] ==
'+')
4954 Features[Feature+1] =
true;
4959 bool handleTargetFeatures(std::vector<std::string> &Features,
4966 SoftFloat = SoftFloatABI =
false;
4971 uint32_t HW_FP_remove = 0;
4972 for (
const auto &Feature : Features) {
4973 if (Feature ==
"+soft-float") {
4975 }
else if (Feature ==
"+soft-float-abi") {
4976 SoftFloatABI =
true;
4977 }
else if (Feature ==
"+vfp2") {
4979 HW_FP |= HW_FP_SP | HW_FP_DP;
4980 }
else if (Feature ==
"+vfp3") {
4982 HW_FP |= HW_FP_SP | HW_FP_DP;
4983 }
else if (Feature ==
"+vfp4") {
4985 HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
4986 }
else if (Feature ==
"+fp-armv8") {
4988 HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
4989 }
else if (Feature ==
"+neon") {
4991 HW_FP |= HW_FP_SP | HW_FP_DP;
4992 }
else if (Feature ==
"+hwdiv") {
4993 HWDiv |= HWDivThumb;
4994 }
else if (Feature ==
"+hwdiv-arm") {
4996 }
else if (Feature ==
"+crc") {
4998 }
else if (Feature ==
"+crypto") {
5000 }
else if (Feature ==
"+dsp") {
5002 }
else if (Feature ==
"+fp-only-sp") {
5003 HW_FP_remove |= HW_FP_DP;
5004 }
else if (Feature ==
"+strict-align") {
5006 }
else if (Feature ==
"+fp16") {
5010 HW_FP &= ~HW_FP_remove;
5012 switch (ArchVersion) {
5014 if (ArchProfile == llvm::ARM::PK_M)
5016 else if (ArchKind == llvm::ARM::AK_ARMV6K)
5017 LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B ;
5022 if (ArchProfile == llvm::ARM::PK_M)
5023 LDREX = LDREX_W | LDREX_H | LDREX_B ;
5025 LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B ;
5028 LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B ;
5031 if (!(FPU & NeonFPU) && FPMath == FP_Neon) {
5032 Diags.
Report(diag::err_target_unsupported_fpmath) <<
"neon";
5036 if (FPMath == FP_Neon)
5037 Features.push_back(
"+neonfp");
5038 else if (FPMath == FP_VFP)
5039 Features.push_back(
"-neonfp");
5043 std::find(Features.begin(), Features.end(),
"+soft-float-abi");
5044 if (Feature != Features.end())
5045 Features.erase(Feature);
5050 bool hasFeature(StringRef Feature)
const override {
5051 return llvm::StringSwitch<bool>(Feature)
5053 .Case(
"aarch32",
true)
5054 .Case(
"softfloat", SoftFloat)
5055 .Case(
"thumb", isThumb())
5056 .Case(
"neon", (FPU & NeonFPU) && !SoftFloat)
5057 .Case(
"hwdiv", HWDiv & HWDivThumb)
5058 .Case(
"hwdiv-arm", HWDiv & HWDivARM)
5062 bool setCPU(
const std::string &Name)
override {
5063 if (Name !=
"generic")
5064 setArchInfo(llvm::ARM::parseCPUArch(Name));
5066 if (ArchKind == llvm::ARM::AK_INVALID)
5073 bool setFPMath(StringRef Name)
override;
5081 if (getTriple().getOS() == llvm::Triple::UnknownOS &&
5082 getTriple().getEnvironment() == llvm::Triple::EABI)
5090 if (getTriple().isWatchABI())
5093 if (!CPUAttr.empty())
5094 Builder.
defineMacro(
"__ARM_ARCH_" + CPUAttr +
"__");
5098 Builder.
defineMacro(
"__ARM_ARCH", Twine(ArchVersion));
5100 if (ArchVersion >= 8) {
5108 Builder.
defineMacro(
"__ARM_FEATURE_NUMERIC_MAXMIN",
"1");
5110 Builder.
defineMacro(
"__ARM_FEATURE_DIRECTED_ROUNDING",
"1");
5116 if (CPUProfile.empty() || ArchProfile != llvm::ARM::PK_M)
5123 if (supportsThumb2())
5125 else if (supportsThumb())
5135 if (!CPUProfile.empty())
5136 Builder.
defineMacro(
"__ARM_ARCH_PROFILE",
"'" + CPUProfile +
"'");
5140 Builder.
defineMacro(
"__ARM_FEATURE_UNALIGNED",
"1");
5144 Builder.
defineMacro(
"__ARM_FEATURE_LDREX",
"0x" + llvm::utohexstr(LDREX));
5147 if (ArchVersion == 5 ||
5148 (ArchVersion == 6 && CPUProfile !=
"M") ||
5154 Builder.
defineMacro(
"__ARM_FP",
"0x" + llvm::utohexstr(HW_FP));
5160 Builder.
defineMacro(
"__ARM_FP16_FORMAT_IEEE",
"1");
5164 if (ArchVersion >= 7 && (FPU & VFP4FPU))
5172 if (5 <= ArchVersion && ArchVersion <= 8 && !getTriple().isOSWindows())
5175 if (ABI ==
"aapcs" || ABI ==
"aapcs-linux" || ABI ==
"aapcs-vfp") {
5178 if (!getTriple().isOSBinFormatMachO() && !getTriple().isOSWindows())
5183 if ((!SoftFloat && !SoftFloatABI) || ABI ==
"aapcs-vfp" ||
5190 if (CPU ==
"xscale")
5196 if (supportsThumb2())
5201 if (ArchVersion >= 6 && (CPUProfile !=
"M" || CPUAttr ==
"7EM"))
5205 if (((HWDiv & HWDivThumb) && isThumb()) ||
5206 ((HWDiv & HWDivARM) && !isThumb())) {
5208 Builder.
defineMacro(
"__ARM_ARCH_EXT_IDIV__",
"1");
5214 if (FPUModeIsVFP((FPUMode) FPU)) {
5228 if ((FPU & NeonFPU) && !SoftFloat && ArchVersion >= 7) {
5234 "0x" + llvm::utohexstr(HW_FP & ~HW_FP_DP));
5238 Opts.ShortWChar ?
"2" :
"4");
5241 Opts.ShortEnums ?
"1" :
"4");
5243 if (ArchVersion >= 6 && CPUAttr !=
"6M" && CPUAttr !=
"8M_BASE") {
5244 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
5245 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
5246 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
5247 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
5257 if ((ArchVersion == 6 && CPUProfile !=
"M") || ArchVersion > 6 ) {
5266 if (Opts.UnsafeFPMath)
5269 if (ArchKind == llvm::ARM::AK_ARMV8_1A)
5274 return llvm::makeArrayRef(BuiltinInfo,
5277 bool isCLZForZeroUndef()
const override {
return false; }
5278 BuiltinVaListKind getBuiltinVaListKind()
const override {
5280 ? AAPCSABIBuiltinVaList
5286 bool validateAsmConstraint(
const char *&Name,
5324 std::string convertConstraint(
const char *&Constraint)
const override {
5326 switch (*Constraint) {
5328 R = std::string(
"^") + std::string(Constraint, 2);
5332 R = std::string(
"r");
5335 return std::string(1, *Constraint);
5340 validateConstraintModifier(StringRef Constraint,
char Modifier,
unsigned Size,
5341 std::string &SuggestedModifier)
const override {
5342 bool isOutput = (Constraint[0] ==
'=');
5343 bool isInOut = (Constraint[0] ==
'+');
5346 while (Constraint[0] ==
'=' ||
5347 Constraint[0] ==
'+' ||
5348 Constraint[0] ==
'&')
5349 Constraint = Constraint.substr(1);
5351 switch (Constraint[0]) {
5356 return (isInOut || isOutput || Size <= 64);
5366 const char *getClobbers()
const override {
5371 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
5378 return CCCR_Warning;
5382 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
5383 if (RegNo == 0)
return 0;
5384 if (RegNo == 1)
return 1;
5388 bool hasSjLjLowering()
const override {
5393 bool ARMTargetInfo::setFPMath(StringRef Name) {
5394 if (Name ==
"neon") {
5397 }
else if (Name ==
"vfp" || Name ==
"vfp2" || Name ==
"vfp3" ||
5405 const char *
const ARMTargetInfo::GCCRegNames[] = {
5407 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
5408 "r8",
"r9",
"r10",
"r11",
"r12",
"sp",
"lr",
"pc",
5411 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
5412 "s8",
"s9",
"s10",
"s11",
"s12",
"s13",
"s14",
"s15",
5413 "s16",
"s17",
"s18",
"s19",
"s20",
"s21",
"s22",
"s23",
5414 "s24",
"s25",
"s26",
"s27",
"s28",
"s29",
"s30",
"s31",
5417 "d0",
"d1",
"d2",
"d3",
"d4",
"d5",
"d6",
"d7",
5418 "d8",
"d9",
"d10",
"d11",
"d12",
"d13",
"d14",
"d15",
5419 "d16",
"d17",
"d18",
"d19",
"d20",
"d21",
"d22",
"d23",
5420 "d24",
"d25",
"d26",
"d27",
"d28",
"d29",
"d30",
"d31",
5423 "q0",
"q1",
"q2",
"q3",
"q4",
"q5",
"q6",
"q7",
5424 "q8",
"q9",
"q10",
"q11",
"q12",
"q13",
"q14",
"q15"
5428 return llvm::makeArrayRef(GCCRegNames);
5441 { {
"v6",
"rfp" },
"r9" },
5442 { {
"sl" },
"r10" },
5443 { {
"fp" },
"r11" },
5444 { {
"ip" },
"r12" },
5445 { {
"r13" },
"sp" },
5446 { {
"r14" },
"lr" },
5447 { {
"r15" },
"pc" },
5453 return llvm::makeArrayRef(GCCRegAliases);
5457 #define BUILTIN(ID, TYPE, ATTRS) \
5458 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
5459 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
5460 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
5461 #include "clang/Basic/BuiltinsNEON.def"
5463 #define BUILTIN(ID, TYPE, ATTRS) \
5464 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
5465 #define LANGBUILTIN(ID, TYPE, ATTRS, LANG) \
5466 { #ID, TYPE, ATTRS, nullptr, LANG, nullptr },
5467 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
5468 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
5469 #include "clang/Basic/BuiltinsARM.def"
5472 class ARMleTargetInfo :
public ARMTargetInfo {
5474 ARMleTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5475 : ARMTargetInfo(Triple, Opts,
false) {}
5479 ARMTargetInfo::getTargetDefines(Opts, Builder);
5483 class ARMbeTargetInfo :
public ARMTargetInfo {
5485 ARMbeTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5486 : ARMTargetInfo(Triple, Opts,
true) {}
5491 ARMTargetInfo::getTargetDefines(Opts, Builder);
5495 class WindowsARMTargetInfo :
public WindowsTargetInfo<ARMleTargetInfo> {
5496 const llvm::Triple Triple;
5498 WindowsARMTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5499 : WindowsTargetInfo<ARMleTargetInfo>(Triple, Opts), Triple(Triple) {
5500 WCharType = UnsignedShort;
5501 SizeType = UnsignedInt;
5503 void getVisualStudioDefines(
const LangOptions &Opts,
5505 WindowsTargetInfo<ARMleTargetInfo>::getVisualStudioDefines(Opts, Builder);
5512 assert((Triple.getArch() == llvm::Triple::arm ||
5513 Triple.getArch() == llvm::Triple::thumb) &&
5514 "invalid architecture for Windows ARM target info");
5515 unsigned Offset = Triple.getArch() == llvm::Triple::arm ? 4 : 6;
5516 Builder.
defineMacro(
"_M_ARM", Triple.getArchName().substr(Offset));
5522 BuiltinVaListKind getBuiltinVaListKind()
const override {
5525 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
5535 return CCCR_Warning;
5541 class ItaniumWindowsARMleTargetInfo :
public WindowsARMTargetInfo {
5543 ItaniumWindowsARMleTargetInfo(
const llvm::Triple &Triple,
5545 : WindowsARMTargetInfo(Triple, Opts) {
5551 WindowsARMTargetInfo::getTargetDefines(Opts, Builder);
5553 if (Opts.MSVCCompat)
5554 WindowsARMTargetInfo::getVisualStudioDefines(Opts, Builder);
5559 class MicrosoftARMleTargetInfo :
public WindowsARMTargetInfo {
5561 MicrosoftARMleTargetInfo(
const llvm::Triple &Triple,
5563 : WindowsARMTargetInfo(Triple, Opts) {
5569 WindowsARMTargetInfo::getTargetDefines(Opts, Builder);
5570 WindowsARMTargetInfo::getVisualStudioDefines(Opts, Builder);
5575 class MinGWARMTargetInfo :
public WindowsARMTargetInfo {
5577 MinGWARMTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5578 : WindowsARMTargetInfo(Triple, Opts) {
5584 WindowsARMTargetInfo::getTargetDefines(Opts, Builder);
5588 addMinGWDefines(Opts, Builder);
5593 class CygwinARMTargetInfo :
public ARMleTargetInfo {
5595 CygwinARMTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5596 : ARMleTargetInfo(Triple, Opts) {
5597 TLSSupported =
false;
5598 WCharType = UnsignedShort;
5599 DoubleAlign = LongLongAlign = 64;
5600 resetDataLayout(
"e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64");
5604 ARMleTargetInfo::getTargetDefines(Opts, Builder);
5614 class DarwinARMTargetInfo :
public DarwinTargetInfo<ARMleTargetInfo> {
5616 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
5618 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
5622 DarwinARMTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5623 : DarwinTargetInfo<ARMleTargetInfo>(Triple, Opts) {
5624 HasAlignMac68kSupport =
true;
5628 MaxAtomicInlineWidth = 64;
5630 if (Triple.isWatchABI()) {
5636 PtrDiffType = SignedLong;
5639 UseSignedCharForObjCBool =
false;
5645 class AArch64TargetInfo :
public TargetInfo {
5646 virtual void setDataLayout() = 0;
5648 static const char *
const GCCRegNames[];
5666 AArch64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
5668 if (getTriple().getOS() == llvm::Triple::NetBSD) {
5669 WCharType = SignedInt;
5673 Int64Type = SignedLongLong;
5674 IntMaxType = SignedLongLong;
5676 WCharType = UnsignedInt;
5677 Int64Type = SignedLong;
5678 IntMaxType = SignedLong;
5681 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
5682 MaxVectorAlign = 128;
5683 MaxAtomicInlineWidth = 128;
5684 MaxAtomicPromoteWidth = 128;
5686 LongDoubleWidth = LongDoubleAlign = SuitableAlign = 128;
5687 LongDoubleFormat = &llvm::APFloat::IEEEquad;
5691 NoAsmVariants =
true;
5697 assert(UseBitFieldTypeAlignment &&
"bitfields affect type alignment");
5698 UseZeroLengthBitfieldAlignment =
true;
5703 if (Triple.getOS() == llvm::Triple::Linux ||
5704 Triple.getOS() == llvm::Triple::UnknownOS)
5705 this->MCountName = Opts.
EABIVersion ==
"gnu" ?
"\01_mcount" :
"mcount";
5708 StringRef getABI()
const override {
return ABI; }
5709 bool setABI(
const std::string &Name)
override {
5710 if (Name !=
"aapcs" && Name !=
"darwinpcs")
5717 bool setCPU(
const std::string &Name)
override {
5718 bool CPUKnown = llvm::StringSwitch<bool>(
Name)
5719 .Case(
"generic",
true)
5720 .Cases(
"cortex-a53",
"cortex-a57",
"cortex-a72",
5721 "cortex-a35",
"exynos-m1",
true)
5722 .Case(
"cortex-a73",
true)
5723 .Case(
"cyclone",
true)
5725 .Case(
"vulcan",
true)
5750 Builder.
defineMacro(
"__ARM_FEATURE_LDREX",
"0xF");
5753 Builder.
defineMacro(
"__ARM_FEATURE_NUMERIC_MAXMIN",
"1");
5754 Builder.
defineMacro(
"__ARM_FEATURE_DIRECTED_ROUNDING",
"1");
5756 Builder.
defineMacro(
"__ARM_ALIGN_MAX_STACK_PWR",
"4");
5763 Builder.
defineMacro(
"__ARM_FP16_FORMAT_IEEE",
"1");
5766 if (Opts.UnsafeFPMath)
5769 Builder.
defineMacro(
"__ARM_SIZEOF_WCHAR_T", Opts.ShortWChar ?
"2" :
"4");
5772 Opts.ShortEnums ?
"1" :
"4");
5774 if (FPU == NeonMode) {
5787 Builder.
defineMacro(
"__ARM_FEATURE_UNALIGNED",
"1");
5793 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
5794 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
5795 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
5796 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
5800 return llvm::makeArrayRef(BuiltinInfo,
5804 bool hasFeature(StringRef Feature)
const override {
5805 return Feature ==
"aarch64" ||
5806 Feature ==
"arm64" ||
5808 (Feature ==
"neon" && FPU == NeonMode);
5811 bool handleTargetFeatures(std::vector<std::string> &Features,
5819 for (
const auto &Feature : Features) {
5820 if (Feature ==
"+neon")
5822 if (Feature ==
"+crc")
5824 if (Feature ==
"+crypto")
5826 if (Feature ==
"+strict-align")
5828 if (Feature ==
"+v8.1a")
5837 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
5845 return CCCR_Warning;
5849 bool isCLZForZeroUndef()
const override {
return false; }
5851 BuiltinVaListKind getBuiltinVaListKind()
const override {
5858 bool validateAsmConstraint(
const char *&Name,
5886 llvm_unreachable(
"FIXME: Unimplemented support for U* constraints.");
5898 validateConstraintModifier(StringRef Constraint,
char Modifier,
unsigned Size,
5899 std::string &SuggestedModifier)
const override {
5901 while (Constraint[0] ==
'=' || Constraint[0] ==
'+' || Constraint[0] ==
'&')
5902 Constraint = Constraint.substr(1);
5904 switch (Constraint[0]) {
5921 SuggestedModifier =
"w";
5928 const char *getClobbers()
const override {
return ""; }
5930 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
5939 const char *
const AArch64TargetInfo::GCCRegNames[] = {
5941 "w0",
"w1",
"w2",
"w3",
"w4",
"w5",
"w6",
"w7",
"w8",
"w9",
"w10",
5942 "w11",
"w12",
"w13",
"w14",
"w15",
"w16",
"w17",
"w18",
"w19",
"w20",
"w21",
5943 "w22",
"w23",
"w24",
"w25",
"w26",
"w27",
"w28",
"w29",
"w30",
"wsp",
5946 "x0",
"x1",
"x2",
"x3",
"x4",
"x5",
"x6",
"x7",
"x8",
"x9",
"x10",
5947 "x11",
"x12",
"x13",
"x14",
"x15",
"x16",
"x17",
"x18",
"x19",
"x20",
"x21",
5948 "x22",
"x23",
"x24",
"x25",
"x26",
"x27",
"x28",
"fp",
"lr",
"sp",
5951 "s0",
"s1",
"s2",
"s3",
"s4",
"s5",
"s6",
"s7",
"s8",
"s9",
"s10",
5952 "s11",
"s12",
"s13",
"s14",
"s15",
"s16",
"s17",
"s18",
"s19",
"s20",
"s21",
5953 "s22",
"s23",
"s24",
"s25",
"s26",
"s27",
"s28",
"s29",
"s30",
"s31",
5956 "d0",
"d1",
"d2",
"d3",
"d4",
"d5",
"d6",
"d7",
"d8",
"d9",
"d10",
5957 "d11",
"d12",
"d13",
"d14",
"d15",
"d16",
"d17",
"d18",
"d19",
"d20",
"d21",
5958 "d22",
"d23",
"d24",
"d25",
"d26",
"d27",
"d28",
"d29",
"d30",
"d31",
5961 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
"v8",
"v9",
"v10",
5962 "v11",
"v12",
"v13",
"v14",
"v15",
"v16",
"v17",
"v18",
"v19",
"v20",
"v21",
5963 "v22",
"v23",
"v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31"
5967 return llvm::makeArrayRef(GCCRegNames);
5971 { {
"w31" },
"wsp" },
5972 { {
"x29" },
"fp" },
5973 { {
"x30" },
"lr" },
5974 { {
"x31" },
"sp" },
5980 return llvm::makeArrayRef(GCCRegAliases);
5984 #define BUILTIN(ID, TYPE, ATTRS) \
5985 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
5986 #include "clang/Basic/BuiltinsNEON.def"
5988 #define BUILTIN(ID, TYPE, ATTRS) \
5989 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
5990 #include "clang/Basic/BuiltinsAArch64.def"
5993 class AArch64leTargetInfo :
public AArch64TargetInfo {
5994 void setDataLayout()
override {
5995 if (getTriple().isOSBinFormatMachO())
5996 resetDataLayout(
"e-m:o-i64:64-i128:128-n32:64-S128");
5998 resetDataLayout(
"e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
6002 AArch64leTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
6003 : AArch64TargetInfo(Triple, Opts) {
6009 AArch64TargetInfo::getTargetDefines(Opts, Builder);
6013 class AArch64beTargetInfo :
public AArch64TargetInfo {
6014 void setDataLayout()
override {
6015 assert(!getTriple().isOSBinFormatMachO());
6016 resetDataLayout(
"E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
6020 AArch64beTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
6021 : AArch64TargetInfo(Triple, Opts) {}
6027 AArch64TargetInfo::getTargetDefines(Opts, Builder);
6031 class DarwinAArch64TargetInfo :
public DarwinTargetInfo<AArch64leTargetInfo> {
6033 void getOSDefines(
const LangOptions &Opts,
const llvm::Triple &Triple,
6043 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
6047 DarwinAArch64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
6048 : DarwinTargetInfo<AArch64leTargetInfo>(Triple, Opts) {
6049 Int64Type = SignedLongLong;
6050 WCharType = SignedInt;
6051 UseSignedCharForObjCBool =
false;
6053 LongDoubleWidth = LongDoubleAlign = SuitableAlign = 64;
6054 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
6059 BuiltinVaListKind getBuiltinVaListKind()
const override {
6065 class HexagonTargetInfo :
public TargetInfo {
6067 static const char *
const GCCRegNames[];
6070 bool HasHVX, HasHVXDouble;
6073 HexagonTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
6079 resetDataLayout(
"e-m:e-p:32:32:32-a:0-n16:32-"
6080 "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
6081 "v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048");
6082 SizeType = UnsignedInt;
6083 PtrDiffType = SignedInt;
6084 IntPtrType = SignedInt;
6088 NoAsmVariants =
true;
6090 LargeArrayMinWidth = 64;
6091 LargeArrayAlign = 64;
6092 UseBitFieldTypeAlignment =
true;
6093 ZeroLengthBitfieldBoundary = 32;
6094 HasHVX = HasHVXDouble =
false;
6098 return llvm::makeArrayRef(BuiltinInfo,
6102 bool validateAsmConstraint(
const char *&Name,
6122 bool isCLZForZeroUndef()
const override {
return false; }
6124 bool hasFeature(StringRef Feature)
const override {
6125 return llvm::StringSwitch<bool>(Feature)
6126 .Case(
"hexagon",
true)
6127 .Case(
"hvx", HasHVX)
6128 .Case(
"hvx-double", HasHVXDouble)
6133 StringRef CPU,
const std::vector<std::string> &FeaturesVec)
6136 bool handleTargetFeatures(std::vector<std::string> &Features,
6139 BuiltinVaListKind getBuiltinVaListKind()
const override {
6144 const char *getClobbers()
const override {
6148 static const char *getHexagonCPUSuffix(StringRef Name) {
6149 return llvm::StringSwitch<const char*>(
Name)
6150 .Case(
"hexagonv4",
"4")
6151 .Case(
"hexagonv5",
"5")
6152 .Case(
"hexagonv55",
"55")
6153 .Case(
"hexagonv60",
"60")
6157 bool setCPU(
const std::string &Name)
override {
6158 if (!getHexagonCPUSuffix(Name))
6164 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
6165 return RegNo < 2 ? RegNo : -1;
6169 void HexagonTargetInfo::getTargetDefines(
const LangOptions &Opts,
6174 if (CPU ==
"hexagonv4") {
6177 if (Opts.HexagonQdsp6Compat) {
6181 }
else if (CPU ==
"hexagonv5") {
6184 if(Opts.HexagonQdsp6Compat) {
6188 }
else if (CPU ==
"hexagonv55") {
6193 }
else if (CPU ==
"hexagonv60") {
6207 bool HexagonTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
6209 for (
auto &F : Features) {
6212 else if (F ==
"-hvx")
6213 HasHVX = HasHVXDouble =
false;
6214 else if (F ==
"+hvx-double")
6215 HasHVX = HasHVXDouble =
true;
6216 else if (F ==
"-hvx-double")
6217 HasHVXDouble =
false;
6222 bool HexagonTargetInfo::initFeatureMap(llvm::StringMap<bool> &Features,
6224 const std::vector<std::string> &FeaturesVec)
const {
6226 Features[
"hvx"] =
false;
6227 Features[
"hvx-double"] =
false;
6233 const char *
const HexagonTargetInfo::GCCRegNames[] = {
6234 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
6235 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
6236 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
6237 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31",
6238 "p0",
"p1",
"p2",
"p3",
6239 "sa0",
"lc0",
"sa1",
"lc1",
"m0",
"m1",
"usr",
"ugp"
6243 return llvm::makeArrayRef(GCCRegNames);
6247 { {
"sp" },
"r29" },
6248 { {
"fp" },
"r30" },
6249 { {
"lr" },
"r31" },
6253 return llvm::makeArrayRef(GCCRegAliases);
6258 #define BUILTIN(ID, TYPE, ATTRS) \
6259 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
6260 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
6261 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
6262 #include "clang/Basic/BuiltinsHexagon.def"
6274 static const char *
const GCCRegNames[];
6277 LanaiTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
6300 MinGlobalAlign = 32;
6314 llvm_unreachable(
"Unhandled target CPU");
6318 bool setCPU(
const std::string &Name)
override {
6319 CPU = llvm::StringSwitch<CPUKind>(
Name)
6320 .Case(
"v11", CK_V11)
6323 return CPU != CK_NONE;
6326 bool hasFeature(StringRef Feature)
const override {
6327 return llvm::StringSwitch<bool>(Feature).Case(
"lanai",
true).Default(
false);
6334 BuiltinVaListKind getBuiltinVaListKind()
const override {
6340 bool validateAsmConstraint(
const char *&Name,
6345 const char *getClobbers()
const override {
return ""; }
6348 const char *
const LanaiTargetInfo::GCCRegNames[] = {
6349 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
"r8",
"r9",
"r10",
6350 "r11",
"r12",
"r13",
"r14",
"r15",
"r16",
"r17",
"r18",
"r19",
"r20",
"r21",
6351 "r22",
"r23",
"r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"};
6354 return llvm::makeArrayRef(GCCRegNames);
6368 return llvm::makeArrayRef(GCCRegAliases);
6374 static const char *
const GCCRegNames[];
6377 SparcTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
6380 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
6381 if (RegNo == 0)
return 24;
6382 if (RegNo == 1)
return 25;
6386 bool handleTargetFeatures(std::vector<std::string> &Features,
6389 auto Feature = std::find(Features.begin(), Features.end(),
"+soft-float");
6390 if (Feature != Features.end()) {
6404 bool hasFeature(StringRef Feature)
const override {
6405 return llvm::StringSwitch<bool>(Feature)
6406 .Case(
"softfloat", SoftFloat)
6407 .Case(
"sparc",
true)
6411 bool hasSjLjLowering()
const override {
6419 BuiltinVaListKind getBuiltinVaListKind()
const override {
6424 bool validateAsmConstraint(
const char *&Name,
6439 const char *getClobbers()
const override {
6474 enum CPUGeneration {
6479 CPUGeneration getCPUGeneration(CPUKind Kind)
const {
6487 case CK_SPARCLITE86X:
6493 case CK_LEON2_AT697E:
6494 case CK_LEON2_AT697F:
6496 case CK_LEON3_UT699:
6497 case CK_LEON3_GR712RC:
6499 case CK_LEON4_GR740:
6503 case CK_ULTRASPARC3:
6510 llvm_unreachable(
"Unexpected CPU kind");
6513 CPUKind getCPUKind(StringRef Name)
const {
6514 return llvm::StringSwitch<CPUKind>(
Name)
6516 .Case(
"supersparc", CK_SUPERSPARC)
6517 .Case(
"sparclite", CK_SPARCLITE)
6518 .Case(
"f934", CK_F934)
6519 .Case(
"hypersparc", CK_HYPERSPARC)
6520 .Case(
"sparclite86x", CK_SPARCLITE86X)
6521 .Case(
"sparclet", CK_SPARCLET)
6522 .Case(
"tsc701", CK_TSC701)
6524 .Case(
"ultrasparc", CK_ULTRASPARC)
6525 .Case(
"ultrasparc3", CK_ULTRASPARC3)
6526 .Case(
"niagara", CK_NIAGARA)
6527 .Case(
"niagara2", CK_NIAGARA2)
6528 .Case(
"niagara3", CK_NIAGARA3)
6529 .Case(
"niagara4", CK_NIAGARA4)
6530 .Case(
"myriad2", CK_MYRIAD2_1)
6531 .Case(
"myriad2.1", CK_MYRIAD2_1)
6532 .Case(
"myriad2.2", CK_MYRIAD2_2)
6533 .Case(
"leon2", CK_LEON2)
6534 .Case(
"at697e", CK_LEON2_AT697E)
6535 .Case(
"at697f", CK_LEON2_AT697F)
6536 .Case(
"leon3", CK_LEON3)
6537 .Case(
"ut699", CK_LEON3_UT699)
6538 .Case(
"gr712rc", CK_LEON3_GR712RC)
6539 .Case(
"leon4", CK_LEON4)
6540 .Case(
"gr740", CK_LEON4_GR740)
6541 .Default(CK_GENERIC);
6544 bool setCPU(
const std::string &Name)
override {
6545 CPU = getCPUKind(Name);
6546 return CPU != CK_GENERIC;
6550 const char *
const SparcTargetInfo::GCCRegNames[] = {
6551 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
6552 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
6553 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
6554 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"
6558 return llvm::makeArrayRef(GCCRegNames);
6572 { {
"o2" },
"r10" },
6573 { {
"o3" },
"r11" },
6574 { {
"o4" },
"r12" },
6575 { {
"o5" },
"r13" },
6576 { {
"o6",
"sp" },
"r14" },
6577 { {
"o7" },
"r15" },
6578 { {
"l0" },
"r16" },
6579 { {
"l1" },
"r17" },
6580 { {
"l2" },
"r18" },
6581 { {
"l3" },
"r19" },
6582 { {
"l4" },
"r20" },
6583 { {
"l5" },
"r21" },
6584 { {
"l6" },
"r22" },
6585 { {
"l7" },
"r23" },
6586 { {
"i0" },
"r24" },
6587 { {
"i1" },
"r25" },
6588 { {
"i2" },
"r26" },
6589 { {
"i3" },
"r27" },
6590 { {
"i4" },
"r28" },
6591 { {
"i5" },
"r29" },
6592 { {
"i6",
"fp" },
"r30" },
6593 { {
"i7" },
"r31" },
6597 return llvm::makeArrayRef(GCCRegAliases);
6601 class SparcV8TargetInfo :
public SparcTargetInfo {
6603 SparcV8TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
6604 : SparcTargetInfo(Triple, Opts) {
6605 resetDataLayout(
"E-m:e-p:32:32-i64:64-f128:64-n32-S64");
6607 switch (getTriple().getOS()) {
6609 SizeType = UnsignedInt;
6610 IntPtrType = SignedInt;
6611 PtrDiffType = SignedInt;
6613 case llvm::Triple::NetBSD:
6614 case llvm::Triple::OpenBSD:
6615 SizeType = UnsignedLong;
6616 IntPtrType = SignedLong;
6617 PtrDiffType = SignedLong;
6620 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
6625 SparcTargetInfo::getTargetDefines(Opts, Builder);
6626 switch (getCPUGeneration(CPU)) {
6629 if (getTriple().getOS() != llvm::Triple::Solaris)
6634 if (getTriple().getOS() != llvm::Triple::Solaris) {
6640 if (getTriple().getVendor() == llvm::Triple::Myriad) {
6656 bool hasSjLjLowering()
const override {
6662 class SparcV8elTargetInfo :
public SparcV8TargetInfo {
6664 SparcV8elTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
6665 : SparcV8TargetInfo(Triple, Opts) {
6666 resetDataLayout(
"e-m:e-p:32:32-i64:64-f128:64-n32-S64");
6672 class SparcV9TargetInfo :
public SparcTargetInfo {
6674 SparcV9TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
6675 : SparcTargetInfo(Triple, Opts) {
6677 resetDataLayout(
"E-m:e-i64:64-n32:64-S128");
6679 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
6682 if (getTriple().getOS() == llvm::Triple::OpenBSD)
6683 IntMaxType = SignedLongLong;
6685 IntMaxType = SignedLong;
6686 Int64Type = IntMaxType;
6690 LongDoubleWidth = 128;
6691 LongDoubleAlign = 128;
6692 LongDoubleFormat = &llvm::APFloat::IEEEquad;
6693 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
6698 SparcTargetInfo::getTargetDefines(Opts, Builder);
6702 if (getTriple().getOS() != llvm::Triple::Solaris) {
6709 bool setCPU(
const std::string &Name)
override {
6710 if (!SparcTargetInfo::setCPU(Name))
6712 return getCPUGeneration(CPU) == CG_V9;
6716 class SystemZTargetInfo :
public TargetInfo {
6718 static const char *
const GCCRegNames[];
6720 bool HasTransactionalExecution;
6724 SystemZTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
6727 IntMaxType = SignedLong;
6728 Int64Type = SignedLong;
6729 TLSSupported =
true;
6730 IntWidth = IntAlign = 32;
6731 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
6732 PointerWidth = PointerAlign = 64;
6733 LongDoubleWidth = 128;
6734 LongDoubleAlign = 64;
6735 LongDoubleFormat = &llvm::APFloat::IEEEquad;
6736 DefaultAlignForAttributeAligned = 64;
6737 MinGlobalAlign = 16;
6738 resetDataLayout(
"E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64");
6739 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
6748 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
6749 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
6750 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
6751 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
6753 if (HasTransactionalExecution)
6759 return llvm::makeArrayRef(BuiltinInfo,
6768 bool validateAsmConstraint(
const char *&Name,
6770 const char *getClobbers()
const override {
6774 BuiltinVaListKind getBuiltinVaListKind()
const override {
6777 bool setCPU(
const std::string &Name)
override {
6779 bool CPUKnown = llvm::StringSwitch<bool>(
Name)
6782 .Case(
"zEC12",
true)
6791 const std::vector<std::string> &FeaturesVec)
const override {
6793 Features[
"transactional-execution"] =
true;
6795 Features[
"transactional-execution"] =
true;
6796 Features[
"vector"] =
true;
6801 bool handleTargetFeatures(std::vector<std::string> &Features,
6803 HasTransactionalExecution =
false;
6804 for (
const auto &Feature : Features) {
6805 if (Feature ==
"+transactional-execution")
6806 HasTransactionalExecution =
true;
6807 else if (Feature ==
"+vector")
6812 MaxVectorAlign = 64;
6813 resetDataLayout(
"E-m:e-i1:8:16-i8:8:16-i64:64-f128:64"
6814 "-v128:64-a:8:16-n32:64");
6819 bool hasFeature(StringRef Feature)
const override {
6820 return llvm::StringSwitch<bool>(Feature)
6821 .Case(
"systemz",
true)
6822 .Case(
"htm", HasTransactionalExecution)
6823 .Case(
"vx", HasVector)
6827 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
6833 return CCCR_Warning;
6837 StringRef getABI()
const override {
6843 bool useFloat128ManglingForLongDouble()
const override {
6849 #define BUILTIN(ID, TYPE, ATTRS) \
6850 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
6851 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
6852 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE },
6853 #include "clang/Basic/BuiltinsSystemZ.def"
6856 const char *
const SystemZTargetInfo::GCCRegNames[] = {
6857 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
6858 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
6859 "f0",
"f2",
"f4",
"f6",
"f1",
"f3",
"f5",
"f7",
6860 "f8",
"f10",
"f12",
"f14",
"f9",
"f11",
"f13",
"f15"
6864 return llvm::makeArrayRef(GCCRegNames);
6867 bool SystemZTargetInfo::
6868 validateAsmConstraint(
const char *&Name,
6897 static const char *
const GCCRegNames[];
6900 MSP430TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
6903 TLSSupported =
false;
6908 LongAlign = LongLongAlign = 16;
6912 SizeType = UnsignedInt;
6913 IntMaxType = SignedLongLong;
6914 IntPtrType = SignedInt;
6915 PtrDiffType = SignedInt;
6916 SigAtomicType = SignedLong;
6917 resetDataLayout(
"e-m:e-p:16:16-i32:16:32-a:16-n8:16");
6929 bool hasFeature(StringRef Feature)
const override {
6930 return Feature ==
"msp430";
6937 bool validateAsmConstraint(
const char *&Name,
6949 const char *getClobbers()
const override {
6953 BuiltinVaListKind getBuiltinVaListKind()
const override {
6959 const char *
const MSP430TargetInfo::GCCRegNames[] = {
6960 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
6961 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15"};
6964 return llvm::makeArrayRef(GCCRegNames);
6975 static const unsigned TCEOpenCLAddrSpaceMap[] = {
6988 TCETargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
6990 TLSSupported =
false;
6992 LongWidth = LongLongWidth = 32;
6995 LongAlign = LongLongAlign = 32;
6998 SizeType = UnsignedInt;
6999 IntMaxType = SignedLong;
7000 IntPtrType = SignedInt;
7001 PtrDiffType = SignedInt;
7006 LongDoubleWidth = 32;
7007 LongDoubleAlign = 32;
7008 FloatFormat = &llvm::APFloat::IEEEsingle;
7009 DoubleFormat = &llvm::APFloat::IEEEsingle;
7010 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
7011 resetDataLayout(
"E-p:32:32-i8:8:32-i16:16:32-i64:32"
7012 "-f64:32-v64:32-v128:32-a:0:32-n32");
7013 AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
7014 UseAddrSpaceMapMangling =
true;
7023 bool hasFeature(StringRef Feature)
const override {
return Feature ==
"tce"; }
7026 const char *getClobbers()
const override {
return ""; }
7027 BuiltinVaListKind getBuiltinVaListKind()
const override {
7031 bool validateAsmConstraint(
const char *&Name,
7042 BPFTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
7044 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
7045 SizeType = UnsignedLong;
7046 PtrDiffType = SignedLong;
7047 IntPtrType = SignedLong;
7048 IntMaxType = SignedLong;
7049 Int64Type = SignedLong;
7051 if (Triple.getArch() == llvm::Triple::bpfeb) {
7053 resetDataLayout(
"E-m:e-p:64:64-i64:64-n32:64-S128");
7056 resetDataLayout(
"e-m:e-p:64:64-i64:64-n32:64-S128");
7058 MaxAtomicPromoteWidth = 64;
7059 MaxAtomicInlineWidth = 64;
7060 TLSSupported =
false;
7067 bool hasFeature(StringRef Feature)
const override {
7068 return Feature ==
"bpf";
7072 const char *getClobbers()
const override {
7075 BuiltinVaListKind getBuiltinVaListKind()
const override {
7081 bool validateAsmConstraint(
const char *&Name,
7091 void setDataLayout() {
7095 Layout =
"m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64";
7096 else if (ABI ==
"n32")
7097 Layout =
"m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128";
7098 else if (ABI ==
"n64")
7099 Layout =
"m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128";
7101 llvm_unreachable(
"Invalid ABI");
7104 resetDataLayout((
"E-" + Layout).str());
7106 resetDataLayout((
"e-" + Layout).str());
7117 HardFloat, SoftFloat
7129 MipsTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
7132 DspRev(NoDSP), HasMSA(
false), HasFP64(
false) {
7134 BigEndian = getTriple().getArch() == llvm::Triple::mips ||
7135 getTriple().getArch() == llvm::Triple::mips64;
7137 setABI((getTriple().getArch() == llvm::Triple::mips ||
7138 getTriple().getArch() == llvm::Triple::mipsel)
7142 CPU = ABI ==
"o32" ?
"mips32r2" :
"mips64r2";
7145 bool isNaN2008Default()
const {
7146 return CPU ==
"mips32r6" || CPU ==
"mips64r6";
7149 bool isFP64Default()
const {
7150 return CPU ==
"mips32r6" || ABI ==
"n32" || ABI ==
"n64" || ABI ==
"64";
7153 bool isNan2008()
const override {
7157 bool processorSupportsGPR64()
const {
7158 return llvm::StringSwitch<bool>(CPU)
7159 .Case(
"mips3",
true)
7160 .Case(
"mips4",
true)
7161 .Case(
"mips5",
true)
7162 .Case(
"mips64",
true)
7163 .Case(
"mips64r2",
true)
7164 .Case(
"mips64r3",
true)
7165 .Case(
"mips64r5",
true)
7166 .Case(
"mips64r6",
true)
7167 .Case(
"octeon",
true)
7172 StringRef getABI()
const override {
return ABI; }
7173 bool setABI(
const std::string &Name)
override {
7174 if (Name ==
"o32") {
7180 if (Name ==
"n32") {
7185 if (Name ==
"n64") {
7193 void setO32ABITypes() {
7194 Int64Type = SignedLongLong;
7195 IntMaxType = Int64Type;
7196 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
7197 LongDoubleWidth = LongDoubleAlign = 64;
7198 LongWidth = LongAlign = 32;
7199 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
7200 PointerWidth = PointerAlign = 32;
7201 PtrDiffType = SignedInt;
7202 SizeType = UnsignedInt;
7206 void setN32N64ABITypes() {
7207 LongDoubleWidth = LongDoubleAlign = 128;
7208 LongDoubleFormat = &llvm::APFloat::IEEEquad;
7209 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
7210 LongDoubleWidth = LongDoubleAlign = 64;
7211 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
7213 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
7214 SuitableAlign = 128;
7217 void setN64ABITypes() {
7218 setN32N64ABITypes();
7219 Int64Type = SignedLong;
7220 IntMaxType = Int64Type;
7221 LongWidth = LongAlign = 64;
7222 PointerWidth = PointerAlign = 64;
7223 PtrDiffType = SignedLong;
7224 SizeType = UnsignedLong;
7227 void setN32ABITypes() {
7228 setN32N64ABITypes();
7229 Int64Type = SignedLongLong;
7230 IntMaxType = Int64Type;
7231 LongWidth = LongAlign = 32;
7232 PointerWidth = PointerAlign = 32;
7233 PtrDiffType = SignedInt;
7234 SizeType = UnsignedInt;
7237 bool setCPU(
const std::string &Name)
override {
7239 return llvm::StringSwitch<bool>(
Name)
7240 .Case(
"mips1",
true)
7241 .Case(
"mips2",
true)
7242 .Case(
"mips3",
true)
7243 .Case(
"mips4",
true)
7244 .Case(
"mips5",
true)
7245 .Case(
"mips32",
true)
7246 .Case(
"mips32r2",
true)
7247 .Case(
"mips32r3",
true)
7248 .Case(
"mips32r5",
true)
7249 .Case(
"mips32r6",
true)
7250 .Case(
"mips64",
true)
7251 .Case(
"mips64r2",
true)
7252 .Case(
"mips64r3",
true)
7253 .Case(
"mips64r5",
true)
7254 .Case(
"mips64r6",
true)
7255 .Case(
"octeon",
true)
7256 .Case(
"p5600",
true)
7259 const std::string& getCPU()
const {
return CPU; }
7263 const std::vector<std::string> &FeaturesVec)
const override {
7266 if (CPU ==
"octeon")
7267 Features[
"mips64r2"] = Features[
"cnmips"] =
true;
7269 Features[CPU] =
true;
7290 Builder.
defineMacro(
"_MIPS_ISA",
"_MIPS_ISA_MIPS32");
7295 Builder.
defineMacro(
"_MIPS_ISA",
"_MIPS_ISA_MIPS64");
7298 const std::string ISARev = llvm::StringSwitch<std::string>(getCPU())
7299 .Cases(
"mips32",
"mips64",
"1")
7300 .Cases(
"mips32r2",
"mips64r2",
"2")
7301 .Cases(
"mips32r3",
"mips64r3",
"3")
7302 .Cases(
"mips32r5",
"mips64r5",
"5")
7303 .Cases(
"mips32r6",
"mips64r6",
"6")
7305 if (!ISARev.empty())
7312 }
else if (ABI ==
"n32") {
7316 }
else if (ABI ==
"n64") {
7321 llvm_unreachable(
"Invalid ABI.");
7327 Builder.
defineMacro(
"__mips_hard_float", Twine(1));
7330 Builder.
defineMacro(
"__mips_soft_float", Twine(1));
7335 Builder.
defineMacro(
"__mips_single_float", Twine(1));
7337 Builder.
defineMacro(
"__mips_fpr", HasFP64 ? Twine(64) : Twine(32));
7339 Twine(32 / (HasFP64 || IsSingleFloat ? 1 : 2)));
7345 Builder.
defineMacro(
"__mips_micromips", Twine(1));
7367 Builder.
defineMacro(
"_MIPS_SZPTR", Twine(getPointerWidth(0)));
7368 Builder.
defineMacro(
"_MIPS_SZINT", Twine(getIntWidth()));
7369 Builder.
defineMacro(
"_MIPS_SZLONG", Twine(getLongWidth()));
7371 Builder.
defineMacro(
"_MIPS_ARCH",
"\"" + CPU +
"\"");
7372 Builder.
defineMacro(
"_MIPS_ARCH_" + StringRef(CPU).upper());
7376 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
7377 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
7378 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
7384 if (ABI ==
"n32" || ABI ==
"n64")
7385 Builder.
defineMacro(
"__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
7389 return llvm::makeArrayRef(BuiltinInfo,
7392 bool hasFeature(StringRef Feature)
const override {
7393 return llvm::StringSwitch<bool>(Feature)
7395 .Case(
"fp64", HasFP64)
7398 BuiltinVaListKind getBuiltinVaListKind()
const override {
7402 static const char *
const GCCRegNames[] = {
7405 "$0",
"$1",
"$2",
"$3",
"$4",
"$5",
"$6",
"$7",
7406 "$8",
"$9",
"$10",
"$11",
"$12",
"$13",
"$14",
"$15",
7407 "$16",
"$17",
"$18",
"$19",
"$20",
"$21",
"$22",
"$23",
7408 "$24",
"$25",
"$26",
"$27",
"$28",
"$29",
"$30",
"$31",
7410 "$f0",
"$f1",
"$f2",
"$f3",
"$f4",
"$f5",
"$f6",
"$f7",
7411 "$f8",
"$f9",
"$f10",
"$f11",
"$f12",
"$f13",
"$f14",
"$f15",
7412 "$f16",
"$f17",
"$f18",
"$f19",
"$f20",
"$f21",
"$f22",
"$f23",
7413 "$f24",
"$f25",
"$f26",
"$f27",
"$f28",
"$f29",
"$f30",
"$f31",
7415 "hi",
"lo",
"",
"$fcc0",
"$fcc1",
"$fcc2",
"$fcc3",
"$fcc4",
7416 "$fcc5",
"$fcc6",
"$fcc7",
"$ac1hi",
"$ac1lo",
"$ac2hi",
"$ac2lo",
7419 "$w0",
"$w1",
"$w2",
"$w3",
"$w4",
"$w5",
"$w6",
"$w7",
7420 "$w8",
"$w9",
"$w10",
"$w11",
"$w12",
"$w13",
"$w14",
"$w15",
7421 "$w16",
"$w17",
"$w18",
"$w19",
"$w20",
"$w21",
"$w22",
"$w23",
7422 "$w24",
"$w25",
"$w26",
"$w27",
"$w28",
"$w29",
"$w30",
"$w31",
7424 "$msair",
"$msacsr",
"$msaaccess",
"$msasave",
"$msamodify",
7425 "$msarequest",
"$msamap",
"$msaunmap"
7427 return llvm::makeArrayRef(GCCRegNames);
7429 bool validateAsmConstraint(
const char *&Name,
7456 if (Name[1] ==
'C') {
7465 std::string convertConstraint(
const char *&Constraint)
const override {
7467 switch (*Constraint) {
7469 if (Constraint[1] ==
'C') {
7470 R = std::string(
"^") + std::string(Constraint, 2);
7479 const char *getClobbers()
const override {
7504 bool handleTargetFeatures(std::vector<std::string> &Features,
7507 IsMicromips =
false;
7508 IsNan2008 = isNaN2008Default();
7509 IsSingleFloat =
false;
7512 HasFP64 = isFP64Default();
7514 for (
const auto &Feature : Features) {
7515 if (Feature ==
"+single-float")
7516 IsSingleFloat =
true;
7517 else if (Feature ==
"+soft-float")
7519 else if (Feature ==
"+mips16")
7521 else if (Feature ==
"+micromips")
7523 else if (Feature ==
"+dsp")
7525 else if (Feature ==
"+dspr2")
7527 else if (Feature ==
"+msa")
7529 else if (Feature ==
"+fp64")
7531 else if (Feature ==
"-fp64")
7533 else if (Feature ==
"+nan2008")
7535 else if (Feature ==
"-nan2008")
7544 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
7545 if (RegNo == 0)
return 4;
7546 if (RegNo == 1)
return 5;
7550 bool isCLZForZeroUndef()
const override {
return false; }
7554 {{
"at"},
"$1"}, {{
"v0"},
"$2"}, {{
"v1"},
"$3"},
7555 {{
"a0"},
"$4"}, {{
"a1"},
"$5"}, {{
"a2"},
"$6"},
7556 {{
"a3"},
"$7"}, {{
"t0"},
"$8"}, {{
"t1"},
"$9"},
7557 {{
"t2"},
"$10"}, {{
"t3"},
"$11"}, {{
"t4"},
"$12"},
7558 {{
"t5"},
"$13"}, {{
"t6"},
"$14"}, {{
"t7"},
"$15"},
7559 {{
"s0"},
"$16"}, {{
"s1"},
"$17"}, {{
"s2"},
"$18"},
7560 {{
"s3"},
"$19"}, {{
"s4"},
"$20"}, {{
"s5"},
"$21"},
7561 {{
"s6"},
"$22"}, {{
"s7"},
"$23"}, {{
"t8"},
"$24"},
7562 {{
"t9"},
"$25"}, {{
"k0"},
"$26"}, {{
"k1"},
"$27"},
7563 {{
"gp"},
"$28"}, {{
"sp",
"$sp"},
"$29"}, {{
"fp",
"$fp"},
"$30"},
7566 {{
"at"},
"$1"}, {{
"v0"},
"$2"}, {{
"v1"},
"$3"},
7567 {{
"a0"},
"$4"}, {{
"a1"},
"$5"}, {{
"a2"},
"$6"},
7568 {{
"a3"},
"$7"}, {{
"a4"},
"$8"}, {{
"a5"},
"$9"},
7569 {{
"a6"},
"$10"}, {{
"a7"},
"$11"}, {{
"t0"},
"$12"},
7570 {{
"t1"},
"$13"}, {{
"t2"},
"$14"}, {{
"t3"},
"$15"},
7571 {{
"s0"},
"$16"}, {{
"s1"},
"$17"}, {{
"s2"},
"$18"},
7572 {{
"s3"},
"$19"}, {{
"s4"},
"$20"}, {{
"s5"},
"$21"},
7573 {{
"s6"},
"$22"}, {{
"s7"},
"$23"}, {{
"t8"},
"$24"},
7574 {{
"t9"},
"$25"}, {{
"k0"},
"$26"}, {{
"k1"},
"$27"},
7575 {{
"gp"},
"$28"}, {{
"sp",
"$sp"},
"$29"}, {{
"fp",
"$fp"},
"$30"},
7578 return llvm::makeArrayRef(O32RegAliases);
7579 return llvm::makeArrayRef(NewABIRegAliases);
7582 bool hasInt128Type()
const override {
7583 return ABI ==
"n32" || ABI ==
"n64";
7589 if (processorSupportsGPR64() && ABI ==
"o32") {
7590 Diags.
Report(diag::err_target_unsupported_abi) << ABI << CPU;
7595 if (!processorSupportsGPR64() && (ABI ==
"n32" || ABI ==
"n64")) {
7596 Diags.
Report(diag::err_target_unsupported_abi) << ABI << CPU;
7603 if ((getTriple().getArch() == llvm::Triple::mips64 ||
7604 getTriple().getArch() == llvm::Triple::mips64el) &&
7606 Diags.
Report(diag::err_target_unsupported_abi_for_triple)
7607 << ABI << getTriple().str();
7614 if ((getTriple().getArch() == llvm::Triple::mips ||
7615 getTriple().getArch() == llvm::Triple::mipsel) &&
7616 (ABI ==
"n32" || ABI ==
"n64")) {
7617 Diags.
Report(diag::err_target_unsupported_abi_for_triple)
7618 << ABI << getTriple().str();
7627 #define BUILTIN(ID, TYPE, ATTRS) \
7628 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
7629 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
7630 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
7631 #include "clang/Basic/BuiltinsMips.def"
7636 PNaClTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
7639 this->LongAlign = 32;
7640 this->LongWidth = 32;
7641 this->PointerAlign = 32;
7642 this->PointerWidth = 32;
7645 this->DoubleAlign = 64;
7646 this->LongDoubleWidth = 64;
7647 this->LongDoubleAlign = 64;
7651 this->RegParmMax = 0;
7660 getArchDefines(Opts, Builder);
7662 bool hasFeature(StringRef Feature)
const override {
7663 return Feature ==
"pnacl";
7666 BuiltinVaListKind getBuiltinVaListKind()
const override {
7671 bool validateAsmConstraint(
const char *&Name,
7676 const char *getClobbers()
const override {
7690 class NaClMips32TargetInfo :
public MipsTargetInfo {
7692 NaClMips32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
7693 : MipsTargetInfo(Triple, Opts) {}
7695 BuiltinVaListKind getBuiltinVaListKind()
const override {
7704 Le64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
7707 NoAsmVariants =
true;
7708 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
7709 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
7710 resetDataLayout(
"e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128");
7720 return llvm::makeArrayRef(BuiltinInfo,
7723 BuiltinVaListKind getBuiltinVaListKind()
const override {
7726 const char *getClobbers()
const override {
return ""; }
7733 bool validateAsmConstraint(
const char *&Name,
7738 bool hasProtectedVisibility()
const override {
return false; }
7741 class WebAssemblyTargetInfo :
public TargetInfo {
7750 explicit WebAssemblyTargetInfo(
const llvm::Triple &T,
const TargetOptions &)
7753 NoAsmVariants =
true;
7754 SuitableAlign = 128;
7755 LargeArrayMinWidth = 128;
7756 LargeArrayAlign = 128;
7757 SimdDefaultAlign = 128;
7758 SigAtomicType = SignedLong;
7759 LongDoubleWidth = LongDoubleAlign = 128;
7760 LongDoubleFormat = &llvm::APFloat::IEEEquad;
7767 if (SIMDLevel >= SIMD128)
7775 const std::vector<std::string> &FeaturesVec)
const override {
7776 if (CPU ==
"bleeding-edge")
7777 Features[
"simd128"] =
true;
7780 bool hasFeature(StringRef Feature)
const final {
7781 return llvm::StringSwitch<bool>(Feature)
7782 .Case(
"simd128", SIMDLevel >= SIMD128)
7785 bool handleTargetFeatures(std::vector<std::string> &Features,
7787 for (
const auto &Feature : Features) {
7788 if (Feature ==
"+simd128") {
7789 SIMDLevel =
std::max(SIMDLevel, SIMD128);
7792 if (Feature ==
"-simd128") {
7793 SIMDLevel =
std::min(SIMDLevel, SIMDEnum(SIMD128 - 1));
7797 Diags.
Report(diag::err_opt_not_valid_with_opt) << Feature
7798 <<
"-target-feature";
7803 bool setCPU(
const std::string &Name)
final {
7804 return llvm::StringSwitch<bool>(
Name)
7806 .Case(
"bleeding-edge",
true)
7807 .Case(
"generic",
true)
7811 return llvm::makeArrayRef(BuiltinInfo,
7814 BuiltinVaListKind getBuiltinVaListKind() const final {
7815 return VoidPtrBuiltinVaList;
7824 validateAsmConstraint(
const char *&Name,
7828 const char *getClobbers() const final {
return ""; }
7829 bool isCLZForZeroUndef() const final {
return false; }
7830 bool hasInt128Type() const final {
return true; }
7831 IntType getIntTypeByWidth(
unsigned BitWidth,
7832 bool IsSigned)
const final {
7834 return BitWidth == 64 ? (IsSigned ? SignedLongLong : UnsignedLongLong)
7837 IntType getLeastIntTypeByWidth(
unsigned BitWidth,
7838 bool IsSigned)
const final {
7840 return BitWidth == 64
7841 ? (IsSigned ? SignedLongLong : UnsignedLongLong)
7847 #define BUILTIN(ID, TYPE, ATTRS) \
7848 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
7849 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
7850 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
7851 #include "clang/Basic/BuiltinsWebAssembly.def"
7854 class WebAssembly32TargetInfo :
public WebAssemblyTargetInfo {
7856 explicit WebAssembly32TargetInfo(
const llvm::Triple &T,
7858 : WebAssemblyTargetInfo(T, Opts) {
7859 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
7860 resetDataLayout(
"e-m:e-p:32:32-i64:64-n32:64-S128");
7866 WebAssemblyTargetInfo::getTargetDefines(Opts, Builder);
7871 class WebAssembly64TargetInfo :
public WebAssemblyTargetInfo {
7873 explicit WebAssembly64TargetInfo(
const llvm::Triple &T,
7875 : WebAssemblyTargetInfo(T, Opts) {
7876 LongAlign = LongWidth = 64;
7877 PointerAlign = PointerWidth = 64;
7878 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
7879 resetDataLayout(
"e-m:e-p:64:64-i64:64-n32:64-S128");
7885 WebAssemblyTargetInfo::getTargetDefines(Opts, Builder);
7891 #define BUILTIN(ID, TYPE, ATTRS) \
7892 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
7893 #include "clang/Basic/BuiltinsLe64.def"
7896 static const unsigned SPIRAddrSpaceMap[] = {
7907 SPIRTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
7909 assert(getTriple().getOS() == llvm::Triple::UnknownOS &&
7910 "SPIR target must use unknown OS");
7911 assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
7912 "SPIR target must use unknown environment type");
7914 TLSSupported =
false;
7915 LongWidth = LongAlign = 64;
7916 AddrSpaceMap = &SPIRAddrSpaceMap;
7917 UseAddrSpaceMapMangling =
true;
7920 NoAsmVariants =
true;
7926 bool hasFeature(StringRef Feature)
const override {
7927 return Feature ==
"spir";
7931 const char *getClobbers()
const override {
return ""; }
7933 bool validateAsmConstraint(
const char *&Name,
7940 BuiltinVaListKind getBuiltinVaListKind()
const override {
7944 CallingConvCheckResult checkCallingConvention(
CallingConv CC)
const override {
7949 CallingConv getDefaultCallingConv(CallingConvMethodType MT)
const override {
7953 void setSupportedOpenCLOpts()
override {
7956 getSupportedOpenCLOpts().setAll();
7960 class SPIR32TargetInfo :
public SPIRTargetInfo {
7962 SPIR32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
7963 : SPIRTargetInfo(Triple, Opts) {
7964 PointerWidth = PointerAlign = 32;
7967 resetDataLayout(
"e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-"
7968 "v96:128-v192:256-v256:256-v512:512-v1024:1024");
7976 class SPIR64TargetInfo :
public SPIRTargetInfo {
7978 SPIR64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
7979 : SPIRTargetInfo(Triple, Opts) {
7980 PointerWidth = PointerAlign = 64;
7983 resetDataLayout(
"e-i64:64-v16:16-v24:32-v32:32-v48:64-"
7984 "v96:128-v192:256-v256:256-v512:512-v1024:1024");
7995 XCoreTargetInfo(
const llvm::Triple &Triple,
const TargetOptions &)
7998 NoAsmVariants =
true;
8001 DoubleAlign = LongDoubleAlign = 32;
8002 SizeType = UnsignedInt;
8003 PtrDiffType = SignedInt;
8004 IntPtrType = SignedInt;
8005 WCharType = UnsignedChar;
8006 WIntType = UnsignedInt;
8007 UseZeroLengthBitfieldAlignment =
true;
8008 resetDataLayout(
"e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32"
8009 "-f64:32-a:0:32-n32");
8016 return llvm::makeArrayRef(BuiltinInfo,
8019 BuiltinVaListKind getBuiltinVaListKind()
const override {
8022 const char *getClobbers()
const override {
8026 static const char *
const GCCRegNames[] = {
8027 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
8028 "r8",
"r9",
"r10",
"r11",
"cp",
"dp",
"sp",
"lr"
8030 return llvm::makeArrayRef(GCCRegNames);
8035 bool validateAsmConstraint(
const char *&Name,
8039 int getEHDataRegisterNumber(
unsigned RegNo)
const override {
8041 return (RegNo < 2)? RegNo : -1;
8043 bool allowsLargerPreferedTypeAlignment()
const override {
8049 #define BUILTIN(ID, TYPE, ATTRS) \
8050 { #ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr },
8051 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
8052 { #ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr },
8053 #include "clang/Basic/BuiltinsXCore.def"
8057 class AndroidX86_32TargetInfo :
public LinuxTargetInfo<X86_32TargetInfo> {
8059 AndroidX86_32TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
8060 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
8062 LongDoubleWidth = 64;
8063 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
8068 class AndroidX86_64TargetInfo :
public LinuxTargetInfo<X86_64TargetInfo> {
8070 AndroidX86_64TargetInfo(
const llvm::Triple &Triple,
const TargetOptions &Opts)
8071 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
8072 LongDoubleFormat = &llvm::APFloat::IEEEquad;
8075 bool useFloat128ManglingForLongDouble()
const override {
8081 class RenderScript32TargetInfo :
public ARMleTargetInfo {
8083 RenderScript32TargetInfo(
const llvm::Triple &Triple,
8085 : ARMleTargetInfo(llvm::Triple(
"armv7", Triple.getVendorName(),
8087 Triple.getEnvironmentName()),
8089 LongWidth = LongAlign = 64;
8094 ARMleTargetInfo::getTargetDefines(Opts, Builder);
8099 class RenderScript64TargetInfo :
public AArch64leTargetInfo {
8101 RenderScript64TargetInfo(
const llvm::Triple &Triple,
8103 : AArch64leTargetInfo(llvm::Triple(
"aarch64", Triple.getVendorName(),
8105 Triple.getEnvironmentName()),
8111 AArch64leTargetInfo::getTargetDefines(Opts, Builder);
8123 llvm::Triple::OSType os = Triple.getOS();
8125 switch (Triple.getArch()) {
8129 case llvm::Triple::xcore:
8130 return new XCoreTargetInfo(Triple, Opts);
8132 case llvm::Triple::hexagon:
8133 return new HexagonTargetInfo(Triple, Opts);
8135 case llvm::Triple::lanai:
8136 return new LanaiTargetInfo(Triple, Opts);
8138 case llvm::Triple::aarch64:
8139 if (Triple.isOSDarwin())
8140 return new DarwinAArch64TargetInfo(Triple, Opts);
8143 case llvm::Triple::CloudABI:
8144 return new CloudABITargetInfo<AArch64leTargetInfo>(Triple, Opts);
8145 case llvm::Triple::FreeBSD:
8146 return new FreeBSDTargetInfo<AArch64leTargetInfo>(Triple, Opts);
8147 case llvm::Triple::Linux:
8148 return new LinuxTargetInfo<AArch64leTargetInfo>(Triple, Opts);
8149 case llvm::Triple::NetBSD:
8150 return new NetBSDTargetInfo<AArch64leTargetInfo>(Triple, Opts);
8152 return new AArch64leTargetInfo(Triple, Opts);
8155 case llvm::Triple::aarch64_be:
8157 case llvm::Triple::FreeBSD:
8158 return new FreeBSDTargetInfo<AArch64beTargetInfo>(Triple, Opts);
8159 case llvm::Triple::Linux:
8160 return new LinuxTargetInfo<AArch64beTargetInfo>(Triple, Opts);
8161 case llvm::Triple::NetBSD:
8162 return new NetBSDTargetInfo<AArch64beTargetInfo>(Triple, Opts);
8164 return new AArch64beTargetInfo(Triple, Opts);
8167 case llvm::Triple::arm:
8168 case llvm::Triple::thumb:
8169 if (Triple.isOSBinFormatMachO())
8170 return new DarwinARMTargetInfo(Triple, Opts);
8173 case llvm::Triple::Linux:
8174 return new LinuxTargetInfo<ARMleTargetInfo>(Triple, Opts);
8175 case llvm::Triple::FreeBSD:
8176 return new FreeBSDTargetInfo<ARMleTargetInfo>(Triple, Opts);
8177 case llvm::Triple::NetBSD:
8178 return new NetBSDTargetInfo<ARMleTargetInfo>(Triple, Opts);
8179 case llvm::Triple::OpenBSD:
8180 return new OpenBSDTargetInfo<ARMleTargetInfo>(Triple, Opts);
8181 case llvm::Triple::Bitrig:
8182 return new BitrigTargetInfo<ARMleTargetInfo>(Triple, Opts);
8183 case llvm::Triple::RTEMS:
8184 return new RTEMSTargetInfo<ARMleTargetInfo>(Triple, Opts);
8185 case llvm::Triple::NaCl:
8186 return new NaClTargetInfo<ARMleTargetInfo>(Triple, Opts);
8187 case llvm::Triple::Win32:
8188 switch (Triple.getEnvironment()) {
8189 case llvm::Triple::Cygnus:
8190 return new CygwinARMTargetInfo(Triple, Opts);
8191 case llvm::Triple::GNU:
8192 return new MinGWARMTargetInfo(Triple, Opts);
8193 case llvm::Triple::Itanium:
8194 return new ItaniumWindowsARMleTargetInfo(Triple, Opts);
8195 case llvm::Triple::MSVC:
8197 return new MicrosoftARMleTargetInfo(Triple, Opts);
8200 return new ARMleTargetInfo(Triple, Opts);
8203 case llvm::Triple::armeb:
8204 case llvm::Triple::thumbeb:
8205 if (Triple.isOSDarwin())
8206 return new DarwinARMTargetInfo(Triple, Opts);
8209 case llvm::Triple::Linux:
8210 return new LinuxTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8211 case llvm::Triple::FreeBSD:
8212 return new FreeBSDTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8213 case llvm::Triple::NetBSD:
8214 return new NetBSDTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8215 case llvm::Triple::OpenBSD:
8216 return new OpenBSDTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8217 case llvm::Triple::Bitrig:
8218 return new BitrigTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8219 case llvm::Triple::RTEMS:
8220 return new RTEMSTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8221 case llvm::Triple::NaCl:
8222 return new NaClTargetInfo<ARMbeTargetInfo>(Triple, Opts);
8224 return new ARMbeTargetInfo(Triple, Opts);
8227 case llvm::Triple::bpfeb:
8228 case llvm::Triple::bpfel:
8229 return new BPFTargetInfo(Triple, Opts);
8231 case llvm::Triple::msp430:
8232 return new MSP430TargetInfo(Triple, Opts);
8234 case llvm::Triple::mips:
8236 case llvm::Triple::Linux:
8237 return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
8238 case llvm::Triple::RTEMS:
8239 return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
8240 case llvm::Triple::FreeBSD:
8241 return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8242 case llvm::Triple::NetBSD:
8243 return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8245 return new MipsTargetInfo(Triple, Opts);
8248 case llvm::Triple::mipsel:
8250 case llvm::Triple::Linux:
8251 return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
8252 case llvm::Triple::RTEMS:
8253 return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
8254 case llvm::Triple::FreeBSD:
8255 return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8256 case llvm::Triple::NetBSD:
8257 return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8258 case llvm::Triple::NaCl:
8259 return new NaClTargetInfo<NaClMips32TargetInfo>(Triple, Opts);
8261 return new MipsTargetInfo(Triple, Opts);
8264 case llvm::Triple::mips64:
8266 case llvm::Triple::Linux:
8267 return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
8268 case llvm::Triple::RTEMS:
8269 return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
8270 case llvm::Triple::FreeBSD:
8271 return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8272 case llvm::Triple::NetBSD:
8273 return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8274 case llvm::Triple::OpenBSD:
8275 return new OpenBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8277 return new MipsTargetInfo(Triple, Opts);
8280 case llvm::Triple::mips64el:
8282 case llvm::Triple::Linux:
8283 return new LinuxTargetInfo<MipsTargetInfo>(Triple, Opts);
8284 case llvm::Triple::RTEMS:
8285 return new RTEMSTargetInfo<MipsTargetInfo>(Triple, Opts);
8286 case llvm::Triple::FreeBSD:
8287 return new FreeBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8288 case llvm::Triple::NetBSD:
8289 return new NetBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8290 case llvm::Triple::OpenBSD:
8291 return new OpenBSDTargetInfo<MipsTargetInfo>(Triple, Opts);
8293 return new MipsTargetInfo(Triple, Opts);
8296 case llvm::Triple::le32:
8298 case llvm::Triple::NaCl:
8299 return new NaClTargetInfo<PNaClTargetInfo>(Triple, Opts);
8304 case llvm::Triple::le64:
8305 return new Le64TargetInfo(Triple, Opts);
8307 case llvm::Triple::ppc:
8308 if (Triple.isOSDarwin())
8309 return new DarwinPPC32TargetInfo(Triple, Opts);
8311 case llvm::Triple::Linux:
8312 return new LinuxTargetInfo<PPC32TargetInfo>(Triple, Opts);
8313 case llvm::Triple::FreeBSD:
8314 return new FreeBSDTargetInfo<PPC32TargetInfo>(Triple, Opts);
8315 case llvm::Triple::NetBSD:
8316 return new NetBSDTargetInfo<PPC32TargetInfo>(Triple, Opts);
8317 case llvm::Triple::OpenBSD:
8318 return new OpenBSDTargetInfo<PPC32TargetInfo>(Triple, Opts);
8319 case llvm::Triple::RTEMS:
8320 return new RTEMSTargetInfo<PPC32TargetInfo>(Triple, Opts);
8322 return new PPC32TargetInfo(Triple, Opts);
8325 case llvm::Triple::ppc64:
8326 if (Triple.isOSDarwin())
8327 return new DarwinPPC64TargetInfo(Triple, Opts);
8329 case llvm::Triple::Linux:
8330 return new LinuxTargetInfo<PPC64TargetInfo>(Triple, Opts);
8331 case llvm::Triple::Lv2:
8332 return new PS3PPUTargetInfo<PPC64TargetInfo>(Triple, Opts);
8333 case llvm::Triple::FreeBSD:
8334 return new FreeBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
8335 case llvm::Triple::NetBSD:
8336 return new NetBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
8338 return new PPC64TargetInfo(Triple, Opts);
8341 case llvm::Triple::ppc64le:
8343 case llvm::Triple::Linux:
8344 return new LinuxTargetInfo<PPC64TargetInfo>(Triple, Opts);
8345 case llvm::Triple::NetBSD:
8346 return new NetBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
8348 return new PPC64TargetInfo(Triple, Opts);
8351 case llvm::Triple::nvptx:
8352 return new NVPTX32TargetInfo(Triple, Opts);
8353 case llvm::Triple::nvptx64:
8354 return new NVPTX64TargetInfo(Triple, Opts);
8356 case llvm::Triple::amdgcn:
8357 case llvm::Triple::r600:
8358 return new AMDGPUTargetInfo(Triple, Opts);
8360 case llvm::Triple::sparc:
8362 case llvm::Triple::Linux:
8363 return new LinuxTargetInfo<SparcV8TargetInfo>(Triple, Opts);
8364 case llvm::Triple::Solaris:
8365 return new SolarisTargetInfo<SparcV8TargetInfo>(Triple, Opts);
8366 case llvm::Triple::NetBSD:
8367 return new NetBSDTargetInfo<SparcV8TargetInfo>(Triple, Opts);
8368 case llvm::Triple::OpenBSD:
8369 return new OpenBSDTargetInfo<SparcV8TargetInfo>(Triple, Opts);
8370 case llvm::Triple::RTEMS:
8371 return new RTEMSTargetInfo<SparcV8TargetInfo>(Triple, Opts);
8373 return new SparcV8TargetInfo(Triple, Opts);
8377 case llvm::Triple::sparcel:
8379 case llvm::Triple::Linux:
8380 return new LinuxTargetInfo<SparcV8elTargetInfo>(Triple, Opts);
8381 case llvm::Triple::NetBSD:
8382 return new NetBSDTargetInfo<SparcV8elTargetInfo>(Triple, Opts);
8383 case llvm::Triple::OpenBSD:
8384 return new OpenBSDTargetInfo<SparcV8elTargetInfo>(Triple, Opts);
8385 case llvm::Triple::RTEMS:
8386 return new RTEMSTargetInfo<SparcV8elTargetInfo>(Triple, Opts);
8388 return new SparcV8elTargetInfo(Triple, Opts);
8391 case llvm::Triple::sparcv9:
8393 case llvm::Triple::Linux:
8394 return new LinuxTargetInfo<SparcV9TargetInfo>(Triple, Opts);
8395 case llvm::Triple::Solaris:
8396 return new SolarisTargetInfo<SparcV9TargetInfo>(Triple, Opts);
8397 case llvm::Triple::NetBSD:
8398 return new NetBSDTargetInfo<SparcV9TargetInfo>(Triple, Opts);
8399 case llvm::Triple::OpenBSD:
8400 return new OpenBSDTargetInfo<SparcV9TargetInfo>(Triple, Opts);
8401 case llvm::Triple::FreeBSD:
8402 return new FreeBSDTargetInfo<SparcV9TargetInfo>(Triple, Opts);
8404 return new SparcV9TargetInfo(Triple, Opts);
8407 case llvm::Triple::systemz:
8409 case llvm::Triple::Linux:
8410 return new LinuxTargetInfo<SystemZTargetInfo>(Triple, Opts);
8412 return new SystemZTargetInfo(Triple, Opts);
8415 case llvm::Triple::tce:
8416 return new TCETargetInfo(Triple, Opts);
8418 case llvm::Triple::x86:
8419 if (Triple.isOSDarwin())
8420 return new DarwinI386TargetInfo(Triple, Opts);
8423 case llvm::Triple::CloudABI:
8424 return new CloudABITargetInfo<X86_32TargetInfo>(Triple, Opts);
8425 case llvm::Triple::Linux: {
8426 switch (Triple.getEnvironment()) {
8428 return new LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts);
8429 case llvm::Triple::Android:
8430 return new AndroidX86_32TargetInfo(Triple, Opts);
8433 case llvm::Triple::DragonFly:
8434 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(Triple, Opts);
8435 case llvm::Triple::NetBSD:
8436 return new NetBSDI386TargetInfo(Triple, Opts);
8437 case llvm::Triple::OpenBSD:
8438 return new OpenBSDI386TargetInfo(Triple, Opts);
8439 case llvm::Triple::Bitrig:
8440 return new BitrigI386TargetInfo(Triple, Opts);
8441 case llvm::Triple::FreeBSD:
8442 return new FreeBSDTargetInfo<X86_32TargetInfo>(Triple, Opts);
8443 case llvm::Triple::KFreeBSD:
8444 return new KFreeBSDTargetInfo<X86_32TargetInfo>(Triple, Opts);
8445 case llvm::Triple::Minix:
8446 return new MinixTargetInfo<X86_32TargetInfo>(Triple, Opts);
8447 case llvm::Triple::Solaris:
8448 return new SolarisTargetInfo<X86_32TargetInfo>(Triple, Opts);
8449 case llvm::Triple::Win32: {
8450 switch (Triple.getEnvironment()) {
8451 case llvm::Triple::Cygnus:
8452 return new CygwinX86_32TargetInfo(Triple, Opts);
8453 case llvm::Triple::GNU:
8454 return new MinGWX86_32TargetInfo(Triple, Opts);
8455 case llvm::Triple::Itanium:
8456 case llvm::Triple::MSVC:
8458 return new MicrosoftX86_32TargetInfo(Triple, Opts);
8461 case llvm::Triple::Haiku:
8462 return new HaikuX86_32TargetInfo(Triple, Opts);
8463 case llvm::Triple::RTEMS:
8464 return new RTEMSX86_32TargetInfo(Triple, Opts);
8465 case llvm::Triple::NaCl:
8466 return new NaClTargetInfo<X86_32TargetInfo>(Triple, Opts);
8467 case llvm::Triple::ELFIAMCU:
8468 return new MCUX86_32TargetInfo(Triple, Opts);
8470 return new X86_32TargetInfo(Triple, Opts);
8473 case llvm::Triple::x86_64:
8474 if (Triple.isOSDarwin() || Triple.isOSBinFormatMachO())
8475 return new DarwinX86_64TargetInfo(Triple, Opts);
8478 case llvm::Triple::CloudABI:
8479 return new CloudABITargetInfo<X86_64TargetInfo>(Triple, Opts);
8480 case llvm::Triple::Linux: {
8481 switch (Triple.getEnvironment()) {
8483 return new LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts);
8484 case llvm::Triple::Android:
8485 return new AndroidX86_64TargetInfo(Triple, Opts);
8488 case llvm::Triple::DragonFly:
8489 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(Triple, Opts);
8490 case llvm::Triple::NetBSD:
8491 return new NetBSDTargetInfo<X86_64TargetInfo>(Triple, Opts);
8492 case llvm::Triple::OpenBSD:
8493 return new OpenBSDX86_64TargetInfo(Triple, Opts);
8494 case llvm::Triple::Bitrig:
8495 return new BitrigX86_64TargetInfo(Triple, Opts);
8496 case llvm::Triple::FreeBSD:
8497 return new FreeBSDTargetInfo<X86_64TargetInfo>(Triple, Opts);
8498 case llvm::Triple::KFreeBSD:
8499 return new KFreeBSDTargetInfo<X86_64TargetInfo>(Triple, Opts);
8500 case llvm::Triple::Solaris:
8501 return new SolarisTargetInfo<X86_64TargetInfo>(Triple, Opts);
8502 case llvm::Triple::Win32: {
8503 switch (Triple.getEnvironment()) {
8504 case llvm::Triple::Cygnus:
8505 return new CygwinX86_64TargetInfo(Triple, Opts);
8506 case llvm::Triple::GNU:
8507 return new MinGWX86_64TargetInfo(Triple, Opts);
8508 case llvm::Triple::MSVC:
8510 return new MicrosoftX86_64TargetInfo(Triple, Opts);
8513 case llvm::Triple::Haiku:
8514 return new HaikuTargetInfo<X86_64TargetInfo>(Triple, Opts);
8515 case llvm::Triple::NaCl:
8516 return new NaClTargetInfo<X86_64TargetInfo>(Triple, Opts);
8517 case llvm::Triple::PS4:
8518 return new PS4OSTargetInfo<X86_64TargetInfo>(Triple, Opts);
8520 return new X86_64TargetInfo(Triple, Opts);
8523 case llvm::Triple::spir: {
8524 if (Triple.getOS() != llvm::Triple::UnknownOS ||
8525 Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
8527 return new SPIR32TargetInfo(Triple, Opts);
8529 case llvm::Triple::spir64: {
8530 if (Triple.getOS() != llvm::Triple::UnknownOS ||
8531 Triple.getEnvironment() != llvm::Triple::UnknownEnvironment)
8533 return new SPIR64TargetInfo(Triple, Opts);
8535 case llvm::Triple::wasm32:
8536 if (!(Triple == llvm::Triple(
"wasm32-unknown-unknown")))
8538 return new WebAssemblyOSTargetInfo<WebAssembly32TargetInfo>(Triple, Opts);
8539 case llvm::Triple::wasm64:
8540 if (!(Triple == llvm::Triple(
"wasm64-unknown-unknown")))
8542 return new WebAssemblyOSTargetInfo<WebAssembly64TargetInfo>(Triple, Opts);
8544 case llvm::Triple::renderscript32:
8545 return new LinuxTargetInfo<RenderScript32TargetInfo>(Triple, Opts);
8546 case llvm::Triple::renderscript64:
8547 return new LinuxTargetInfo<RenderScript64TargetInfo>(Triple, Opts);
8555 const std::shared_ptr<TargetOptions> &Opts) {
8556 llvm::Triple Triple(Opts->Triple);
8559 std::unique_ptr<TargetInfo> Target(
AllocateTarget(Triple, *Opts));
8561 Diags.
Report(diag::err_target_unknown_triple) << Triple.str();
8564 Target->TargetOpts = Opts;
8567 if (!Opts->CPU.empty() && !Target->setCPU(Opts->CPU)) {
8568 Diags.
Report(diag::err_target_unknown_cpu) << Opts->CPU;
8573 if (!Opts->ABI.empty() && !Target->setABI(Opts->ABI)) {
8574 Diags.
Report(diag::err_target_unknown_abi) << Opts->ABI;
8579 if (!Opts->FPMath.empty() && !Target->setFPMath(Opts->FPMath)) {
8580 Diags.
Report(diag::err_target_unknown_fpmath) << Opts->FPMath;
8586 llvm::StringMap<bool> Features;
8587 if (!Target->initFeatureMap(Features, Diags, Opts->CPU,
8588 Opts->FeaturesAsWritten))
8592 Opts->Features.clear();
8593 for (
const auto &F : Features)
8594 Opts->Features.push_back((F.getValue() ?
"+" :
"-") + F.getKey().str());
8596 if (!Target->handleTargetFeatures(Opts->Features, Diags))
8599 Target->setSupportedOpenCLOpts();
8601 if (!Target->validateTarget(Diags))
8604 return Target.release();
The generic AArch64 ABI is also a modified version of the Itanium ABI, but it has fewer divergences t...
Defines the clang::MacroBuilder utility class.
The iOS 64-bit ABI is follows ARM's published 64-bit ABI more closely, but we don't guarantee to foll...
Represents a version number in the form major[.minor[.subminor[.build]]].
SanitizerSet Sanitize
Set of enabled sanitizers.
__builtin_va_list as defined by the PNaCl ABI: http://www.chromium.org/nativeclient/pnacl/bitcode-abi...
static const Builtin::Info BuiltinInfo[]
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature...
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
__builtin_va_list as defined by the x86-64 ABI: http://www.x86-64.org/documentation/abi.pdf
CudaArch StringToCudaArch(llvm::StringRef S)
void setRequiresImmediate(int Min, int Max)
Options for controlling the target.
__builtin_va_list as defind by the AArch64 ABI http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055a/IHI0055A_aapcs64.pdf
std::string HostTriple
When compiling for the device side, contains the triple used to compile for the host.
class LLVM_ALIGNAS(8) DependentTemplateSpecializationType const IdentifierInfo * Name
Represents a template specialization type whose template cannot be resolved, e.g. ...
The generic Mips ABI is a modified version of the Itanium ABI.
virtual bool initFeatureMap(llvm::StringMap< bool > &Features, DiagnosticsEngine &Diags, StringRef CPU, const std::vector< std::string > &FeatureVec) const
Initialize the map with the default set of target features for the CPU this should include all legal ...
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
static void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
The Microsoft ABI is the ABI used by Microsoft Visual Studio (and compatible compilers).
Concrete class used by the front-end to report problems and issues.
detail::InMemoryDirectory::const_iterator I
The iOS ABI is a partial implementation of the ARM ABI.
The generic ARM ABI is a modified version of the Itanium ABI proposed by ARM for use on ARM-based pla...
virtual std::string convertConstraint(const char *&Constraint) const
typedef void* __builtin_va_list;
static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName, bool Tuning=true)
Exposes information about the current target.
Defines the clang::LangOptions interface.
std::string ConstraintStr
Defines version macros and version-related utility functions for Clang.
char __ovld __cnfn min(char x, char y)
Returns y if y < x, otherwise it returns x.
static TargetInfo * CreateTargetInfo(DiagnosticsEngine &Diags, const std::shared_ptr< TargetOptions > &Opts)
Construct a target for the given options.
std::string EABIVersion
The EABI version to use.
CallingConv
CallingConv - Specifies the calling convention that a function uses.
WatchOS is a modernisation of the iOS ABI, which roughly means it's the iOS64 ABI ported to 32-bits...
Enumerates target-specific builtins in their own namespaces within namespace clang.
OpenMPLinearClauseKind Modifier
Modifier of 'linear' clause.
Defines the clang::TargetOptions class.
__builtin_va_list as defined by the Power ABI: https://www.power.org /resources/downloads/Power-Arch-...
virtual IntType getIntTypeByWidth(unsigned BitWidth, bool IsSigned) const
Return integer type with specified width.
The WebAssembly ABI is a modified version of the Itanium ABI.
typedef char* __builtin_va_list;
static TargetInfo * AllocateTarget(const llvm::Triple &Triple, const TargetOptions &Opts)
virtual IntType getLeastIntTypeByWidth(unsigned BitWidth, bool IsSigned) const
Return the smallest integer type with at least the specified width.
Defines the Diagnostic-related interfaces.
#define FREEBSD_CC_VERSION
bool has(SanitizerMask K) const
Check if a certain (single) sanitizer is enabled.
char __ovld __cnfn max(char x, char y)
Returns y if x < y, otherwise it returns x.
bool isCompatibleWithMSVC(MSVCMajorVersion MajorVersion) const
BoundNodesTreeBuilder *const Builder
Defines the clang::TargetInfo interface.
void defineMacro(const Twine &Name, const Twine &Value="1")
Append a #define line for macro of the form "\#define Name Value\n".
Defines enum values for all the target-independent builtin functions.