LLVM  10.0.0svn
AArch64BaseInfo.cpp
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1 //===-- AArch64BaseInfo.cpp - AArch64 Base encoding information------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides basic encoding and assembly information for AArch64.
10 //
11 //===----------------------------------------------------------------------===//
12 #include "AArch64BaseInfo.h"
13 #include "llvm/ADT/ArrayRef.h"
14 #include "llvm/ADT/SmallVector.h"
15 #include "llvm/ADT/StringExtras.h"
16 #include "llvm/Support/Regex.h"
17 
18 using namespace llvm;
19 
20 namespace llvm {
21  namespace AArch64AT {
22 #define GET_AT_IMPL
23 #include "AArch64GenSystemOperands.inc"
24  }
25 }
26 
27 
28 namespace llvm {
29  namespace AArch64DB {
30 #define GET_DB_IMPL
31 #include "AArch64GenSystemOperands.inc"
32  }
33 }
34 
35 namespace llvm {
36  namespace AArch64DC {
37 #define GET_DC_IMPL
38 #include "AArch64GenSystemOperands.inc"
39  }
40 }
41 
42 namespace llvm {
43  namespace AArch64IC {
44 #define GET_IC_IMPL
45 #include "AArch64GenSystemOperands.inc"
46  }
47 }
48 
49 namespace llvm {
50  namespace AArch64ISB {
51 #define GET_ISB_IMPL
52 #include "AArch64GenSystemOperands.inc"
53  }
54 }
55 
56 namespace llvm {
57  namespace AArch64TSB {
58 #define GET_TSB_IMPL
59 #include "AArch64GenSystemOperands.inc"
60  }
61 }
62 
63 namespace llvm {
64  namespace AArch64PRCTX {
65 #define GET_PRCTX_IMPL
66 #include "AArch64GenSystemOperands.inc"
67  }
68 }
69 
70 namespace llvm {
71  namespace AArch64PRFM {
72 #define GET_PRFM_IMPL
73 #include "AArch64GenSystemOperands.inc"
74  }
75 }
76 
77 namespace llvm {
78  namespace AArch64SVEPRFM {
79 #define GET_SVEPRFM_IMPL
80 #include "AArch64GenSystemOperands.inc"
81  }
82 }
83 
84 namespace llvm {
85  namespace AArch64SVEPredPattern {
86 #define GET_SVEPREDPAT_IMPL
87 #include "AArch64GenSystemOperands.inc"
88  }
89 }
90 
91 namespace llvm {
92  namespace AArch64ExactFPImm {
93 #define GET_EXACTFPIMM_IMPL
94 #include "AArch64GenSystemOperands.inc"
95  }
96 }
97 
98 namespace llvm {
99  namespace AArch64PState {
100 #define GET_PSTATE_IMPL
101 #include "AArch64GenSystemOperands.inc"
102  }
103 }
104 
105 namespace llvm {
106  namespace AArch64PSBHint {
107 #define GET_PSB_IMPL
108 #include "AArch64GenSystemOperands.inc"
109  }
110 }
111 
112 namespace llvm {
113  namespace AArch64BTIHint {
114 #define GET_BTI_IMPL
115 #include "AArch64GenSystemOperands.inc"
116  }
117 }
118 
119 namespace llvm {
120  namespace AArch64SysReg {
121 #define GET_SYSREG_IMPL
122 #include "AArch64GenSystemOperands.inc"
123  }
124 }
125 
127  // Try to parse an S<op0>_<op1>_<Cn>_<Cm>_<op2> register name
128  Regex GenericRegPattern("^S([0-3])_([0-7])_C([0-9]|1[0-5])_C([0-9]|1[0-5])_([0-7])$");
129 
130  std::string UpperName = Name.upper();
132  if (!GenericRegPattern.match(UpperName, &Ops))
133  return -1;
134 
135  uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0;
136  uint32_t Bits;
137  Ops[1].getAsInteger(10, Op0);
138  Ops[2].getAsInteger(10, Op1);
139  Ops[3].getAsInteger(10, CRn);
140  Ops[4].getAsInteger(10, CRm);
141  Ops[5].getAsInteger(10, Op2);
142  Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2;
143 
144  return Bits;
145 }
146 
148  assert(Bits < 0x10000);
149  uint32_t Op0 = (Bits >> 14) & 0x3;
150  uint32_t Op1 = (Bits >> 11) & 0x7;
151  uint32_t CRn = (Bits >> 7) & 0xf;
152  uint32_t CRm = (Bits >> 3) & 0xf;
153  uint32_t Op2 = Bits & 0x7;
154 
155  return "S" + utostr(Op0) + "_" + utostr(Op1) + "_C" + utostr(CRn) + "_C" +
156  utostr(CRm) + "_" + utostr(Op2);
157 }
158 
159 namespace llvm {
160  namespace AArch64TLBI {
161 #define GET_TLBI_IMPL
162 #include "AArch64GenSystemOperands.inc"
163  }
164 }
This class represents lattice values for constants.
Definition: AllocatorList.h:23
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
LLVM_NODISCARD std::string upper() const
Convert the given ASCII string to uppercase.
Definition: StringRef.cpp:115
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
std::string utostr(uint64_t X, bool isNeg=false)
Definition: StringExtras.h:223
std::string genericRegisterString(uint32_t Bits)
uint32_t parseGenericRegister(StringRef Name)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool match(StringRef String, SmallVectorImpl< StringRef > *Matches=nullptr)
matches - Match the regex against a given String.
Definition: Regex.cpp:72
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48