LLVM  9.0.0svn
Macros | Functions
SIShrinkInstructions.cpp File Reference
#include "AMDGPU.h"
#include "AMDGPUSubtarget.h"
#include "SIInstrInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
Include dependency graph for SIShrinkInstructions.cpp:

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Macros

#define DEBUG_TYPE   "si-shrink-instructions"
 The pass tries to use the 32-bit encoding for instructions when possible. More...
 

Functions

 STATISTIC (NumInstructionsShrunk, "Number of 64-bit instruction reduced to 32-bit.")
 
 STATISTIC (NumLiteralConstantsFolded, "Number of literal constants folded into 32-bit instructions.")
 
static bool foldImmediates (MachineInstr &MI, const SIInstrInfo *TII, MachineRegisterInfo &MRI, bool TryToCommute=true)
 This function checks MI for operands defined by a move immediate instruction and then folds the literal constant into the instruction if it can. More...
 
static bool isKImmOperand (const SIInstrInfo *TII, const MachineOperand &Src)
 
static bool isKUImmOperand (const SIInstrInfo *TII, const MachineOperand &Src)
 
static bool isKImmOrKUImmOperand (const SIInstrInfo *TII, const MachineOperand &Src, bool &IsUnsigned)
 
static bool isReverseInlineImm (const SIInstrInfo *TII, const MachineOperand &Src, int32_t &ReverseImm)
 
static void copyExtraImplicitOps (MachineInstr &NewMI, MachineFunction &MF, const MachineInstr &MI)
 Copy implicit register operands from specified instruction to this instruction that are not part of the instruction definition. More...
 
static void shrinkScalarCompare (const SIInstrInfo *TII, MachineInstr &MI)
 
static bool shrinkScalarLogicOp (const GCNSubtarget &ST, MachineRegisterInfo &MRI, const SIInstrInfo *TII, MachineInstr &MI)
 Attempt to shink AND/OR/XOR operations requiring non-inlineable literals. More...
 
static bool instAccessReg (iterator_range< MachineInstr::const_mop_iterator > &&R, unsigned Reg, unsigned SubReg, const SIRegisterInfo &TRI)
 
static bool instReadsReg (const MachineInstr *MI, unsigned Reg, unsigned SubReg, const SIRegisterInfo &TRI)
 
static bool instModifiesReg (const MachineInstr *MI, unsigned Reg, unsigned SubReg, const SIRegisterInfo &TRI)
 
static TargetInstrInfo::RegSubRegPair getSubRegForIndex (unsigned Reg, unsigned Sub, unsigned I, const SIRegisterInfo &TRI, const MachineRegisterInfo &MRI)
 
static MachineInstrmatchSwap (MachineInstr &MovT, MachineRegisterInfo &MRI, const SIInstrInfo *TII)
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "si-shrink-instructions"

The pass tries to use the 32-bit encoding for instructions when possible.

Definition at line 26 of file SIShrinkInstructions.cpp.

Function Documentation

◆ copyExtraImplicitOps()

static void copyExtraImplicitOps ( MachineInstr NewMI,
MachineFunction MF,
const MachineInstr MI 
)
static

◆ foldImmediates()

static bool foldImmediates ( MachineInstr MI,
const SIInstrInfo TII,
MachineRegisterInfo MRI,
bool  TryToCommute = true 
)
static

◆ getSubRegForIndex()

static TargetInstrInfo::RegSubRegPair getSubRegForIndex ( unsigned  Reg,
unsigned  Sub,
unsigned  I,
const SIRegisterInfo TRI,
const MachineRegisterInfo MRI 
)
static

◆ instAccessReg()

static bool instAccessReg ( iterator_range< MachineInstr::const_mop_iterator > &&  R,
unsigned  Reg,
unsigned  SubReg,
const SIRegisterInfo TRI 
)
static

◆ instModifiesReg()

static bool instModifiesReg ( const MachineInstr MI,
unsigned  Reg,
unsigned  SubReg,
const SIRegisterInfo TRI 
)
static

Definition at line 418 of file SIShrinkInstructions.cpp.

References llvm::MachineInstr::defs(), instAccessReg(), Reg, SubReg, and TRI.

Referenced by matchSwap().

◆ instReadsReg()

static bool instReadsReg ( const MachineInstr MI,
unsigned  Reg,
unsigned  SubReg,
const SIRegisterInfo TRI 
)
static

Definition at line 412 of file SIShrinkInstructions.cpp.

References instAccessReg(), Reg, SubReg, TRI, and llvm::MachineInstr::uses().

Referenced by matchSwap().

◆ isKImmOperand()

static bool isKImmOperand ( const SIInstrInfo TII,
const MachineOperand Src 
)
static

◆ isKImmOrKUImmOperand()

static bool isKImmOrKUImmOperand ( const SIInstrInfo TII,
const MachineOperand Src,
bool IsUnsigned 
)
static

◆ isKUImmOperand()

static bool isKUImmOperand ( const SIInstrInfo TII,
const MachineOperand Src 
)
static

◆ isReverseInlineImm()

static bool isReverseInlineImm ( const SIInstrInfo TII,
const MachineOperand Src,
int32_t &  ReverseImm 
)
static
Returns
true if the constant in Src should be replaced with a bitreverse of an inline immediate.

Definition at line 158 of file SIShrinkInstructions.cpp.

References llvm::MachineOperand::getImm(), llvm::SIInstrInfo::isInlineConstant(), and llvm::isInt< 32 >().

Referenced by matchSwap().

◆ matchSwap()

static MachineInstr* matchSwap ( MachineInstr MovT,
MachineRegisterInfo MRI,
const SIInstrInfo TII 
)
static

Definition at line 457 of file SIShrinkInstructions.cpp.

References llvm::MachineInstrBuilder::addDef(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::MachineBasicBlock::begin(), llvm::MachineFunction::begin(), llvm::BuildMI(), copyExtraImplicitOps(), llvm::dbgs(), E, llvm::MachineBasicBlock::end(), llvm::MachineFunction::end(), llvm::MachineInstr::eraseFromParent(), foldImmediates(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFunction(), llvm::GCNSubtarget::getGeneration(), llvm::MachineOperand::getImm(), llvm::MachineInstrBuilder::getInstr(), llvm::GCNSubtarget::getInstrInfo(), llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::SIInstrInfo::getOpSize(), llvm::MachineInstr::getParent(), llvm::MachineFunction::getProperties(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::SIInstrInfo::getRegisterInfo(), llvm::MachineOperand::getSubReg(), getSubRegForIndex(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPU::getVOPe32(), llvm::AMDGPUSubtarget::GFX10, llvm::MachineFunctionProperties::hasProperty(), llvm::GCNSubtarget::hasSwap(), I, instModifiesReg(), llvm::MachineBasicBlock::instr_end(), instReadsReg(), llvm::MachineInstr::isCommutable(), llvm::MachineInstr::isCompare(), llvm::MachineOperand::isImm(), isKImmOperand(), llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::MachineOperand::isReg(), isReverseInlineImm(), llvm::SIRegisterInfo::isVGPR(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::GCNSubtarget::isWave32(), LLVM_DEBUG, MRI, llvm::MachineFunctionProperties::NoVRegs, llvm::TargetInstrInfo::RegSubRegPair::Reg, llvm::MachineInstr::setDesc(), llvm::MachineOperand::setImm(), llvm::MachineOperand::setIsKill(), llvm::MachineRegisterInfo::setRegAllocationHint(), shrinkScalarCompare(), shrinkScalarLogicOp(), Size, llvm::ARM_MB::ST, llvm::TargetInstrInfo::RegSubRegPair::SubReg, std::swap(), llvm::MachineInstr::tieOperands(), TII, TRI, llvm::MachineRegisterInfo::use_nodbg_empty(), llvm::MachineRegisterInfo::use_nodbg_operands(), X, and Y.

◆ shrinkScalarCompare()

static void shrinkScalarCompare ( const SIInstrInfo TII,
MachineInstr MI 
)
static

◆ shrinkScalarLogicOp()

static bool shrinkScalarLogicOp ( const GCNSubtarget ST,
MachineRegisterInfo MRI,
const SIInstrInfo TII,
MachineInstr MI 
)
static

◆ STATISTIC() [1/2]

STATISTIC ( NumInstructionsShrunk  ,
"Number of 64-bit instruction reduced to 32-bit."   
)

◆ STATISTIC() [2/2]

STATISTIC ( NumLiteralConstantsFolded  ,
"Number of literal constants folded into 32-bit instructions."   
)