LLVM 23.0.0git
SPIRVTypeInst.cpp
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1//===-- SPIRVTypeInst.cpp - SPIR-V Type Instruction -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Implementation associated to SPIRVTypeInst.h.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SPIRVTypeInst.h"
15#include "SPIRVInstrInfo.h"
16
17#include "SPIRV.h"
18
19namespace llvm {
20[[maybe_unused]] static bool definesATypeRegister(const MachineInstr &MI) {
21 const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
22 return MRI.getRegClass(MI.getOperand(0).getReg()) == &SPIRV::TYPERegClass;
23}
24
25SPIRVTypeInst::SPIRVTypeInst(const MachineInstr *MI) : MI(MI) {
26 // A SPIRV Type whose result is not a type is invalid.
27 assert(!MI || definesATypeRegister(*MI));
28}
29
30bool SPIRVTypeInst::isTypeIntN(unsigned N) const {
31 if (MI->getOpcode() != SPIRV::OpTypeInt)
32 return false;
33 if (N)
34 return MI->getOperand(1).getImm() == N;
35 return true;
36}
37
39 return MI->getOpcode() == SPIRV::OpTypeFloat;
40}
41} // namespace llvm
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
IRTranslator LLVM IR MI
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
const TargetRegisterClass * getRegClass(Register Reg) const
Return the register class of the specified virtual register.
bool isAnyTypeFloat() const
bool isTypeIntN(unsigned N=0) const
This is an optimization pass for GlobalISel generic memory operations.
static bool definesATypeRegister(const MachineInstr &MI)
#define N