LLVM 19.0.0git
AArch64TargetParser.h
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1//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise AArch64 hardware features
10// such as FPU/CPU/ARCH and extension names.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
15#define LLVM_TARGETPARSER_AARCH64TARGETPARSER_H
16
17#include "llvm/ADT/ArrayRef.h"
18#include "llvm/ADT/Bitset.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/ADT/StringRef.h"
21#include "llvm/Support/VersionTuple.h"
22#include <array>
23#include <vector>
24
25namespace llvm {
26
27class Triple;
28
29namespace AArch64 {
30
31struct ArchInfo;
32struct CpuInfo;
33
34// Function Multi Versioning CPU features. They must be kept in sync with
35// compiler-rt enum CPUFeatures in lib/builtins/cpu_model/aarch64.c with
36// FEAT_MAX as sentinel.
37enum CPUFeatures {
38 FEAT_RNG,
39 FEAT_FLAGM,
40 FEAT_FLAGM2,
41 FEAT_FP16FML,
42 FEAT_DOTPROD,
43 FEAT_SM4,
44 FEAT_RDM,
45 FEAT_LSE,
46 FEAT_FP,
47 FEAT_SIMD,
48 FEAT_CRC,
49 FEAT_SHA1,
50 FEAT_SHA2,
51 FEAT_SHA3,
52 FEAT_AES,
53 FEAT_PMULL,
54 FEAT_FP16,
55 FEAT_DIT,
56 FEAT_DPB,
57 FEAT_DPB2,
58 FEAT_JSCVT,
59 FEAT_FCMA,
60 FEAT_RCPC,
61 FEAT_RCPC2,
62 FEAT_FRINTTS,
63 FEAT_DGH,
64 FEAT_I8MM,
65 FEAT_BF16,
66 FEAT_EBF16,
67 FEAT_RPRES,
68 FEAT_SVE,
69 FEAT_SVE_BF16,
70 FEAT_SVE_EBF16,
71 FEAT_SVE_I8MM,
72 FEAT_SVE_F32MM,
73 FEAT_SVE_F64MM,
74 FEAT_SVE2,
75 FEAT_SVE_AES,
76 FEAT_SVE_PMULL128,
77 FEAT_SVE_BITPERM,
78 FEAT_SVE_SHA3,
79 FEAT_SVE_SM4,
80 FEAT_SME,
81 FEAT_MEMTAG,
82 FEAT_MEMTAG2,
83 FEAT_MEMTAG3,
84 FEAT_SB,
85 FEAT_PREDRES,
86 FEAT_SSBS,
87 FEAT_SSBS2,
88 FEAT_BTI,
89 FEAT_LS64,
90 FEAT_LS64_V,
91 FEAT_LS64_ACCDATA,
92 FEAT_WFXT,
93 FEAT_SME_F64,
94 FEAT_SME_I64,
95 FEAT_SME2,
96 FEAT_RCPC3,
97 FEAT_MOPS,
98 FEAT_MAX,
99 FEAT_EXT = 62,
100 FEAT_INIT
101};
102
103static_assert(FEAT_MAX < 62,
104 "Number of features in CPUFeatures are limited to 62 entries");
105
106// Each ArchExtKind correponds directly to a possible -target-feature.
107#define EMIT_ARCHEXTKIND_ENUM
108#include "llvm/TargetParser/AArch64TargetParserDef.inc"
109
110using ExtensionBitset = Bitset<AEK_NUM_EXTENSIONS>;
111
112// Represents an extension that can be enabled with -march=<arch>+<extension>.
113// Typically these correspond to Arm Architecture extensions, unlike
114// SubtargetFeature which may represent either an actual extension or some
115// internal LLVM property.
116struct ExtensionInfo {
117 StringRef Name; // Human readable name, e.g. "profile".
118 std::optional<StringRef> Alias; // An alias for this extension, if one exists.
119 ArchExtKind ID; // Corresponding to the ArchExtKind, this
120 // extensions representation in the bitfield.
121 StringRef Feature; // -mattr enable string, e.g. "+spe"
122 StringRef NegFeature; // -mattr disable string, e.g. "-spe"
123 CPUFeatures CPUFeature; // Function Multi Versioning (FMV) bitfield value
124 // set in __aarch64_cpu_features
125 StringRef DependentFeatures; // FMV enabled features string,
126 // e.g. "+dotprod,+fp-armv8,+neon"
127 unsigned FmvPriority; // FMV feature priority
128 static constexpr unsigned MaxFMVPriority =
129 1000; // Maximum priority for FMV feature
130};
131
132#define EMIT_EXTENSIONS
133#include "llvm/TargetParser/AArch64TargetParserDef.inc"
134
135struct ExtensionSet {
136 // Set of extensions which are currently enabled.
137 ExtensionBitset Enabled;
138 // Set of extensions which have been enabled or disabled at any point. Used
139 // to avoid cluttering the cc1 command-line with lots of unneeded features.
140 ExtensionBitset Touched;
141 // Base architecture version, which we need to know because some feature
142 // dependencies change depending on this.
143 const ArchInfo *BaseArch;
144
145 ExtensionSet() : Enabled(), Touched(), BaseArch(nullptr) {}
146
147 // Enable the given architecture extension, and any other extensions it
148 // depends on. Does not change the base architecture, or follow dependencies
149 // between features which are only related by required arcitecture versions.
150 void enable(ArchExtKind E);
151
152 // Disable the given architecture extension, and any other extensions which
153 // depend on it. Does not change the base architecture, or follow
154 // dependencies between features which are only related by required
155 // arcitecture versions.
156 void disable(ArchExtKind E);
157
158 // Add default extensions for the given CPU. Records the base architecture,
159 // to later resolve dependencies which depend on it.
160 void addCPUDefaults(const CpuInfo &CPU);
161
162 // Add default extensions for the given architecture version. Records the
163 // base architecture, to later resolve dependencies which depend on it.
164 void addArchDefaults(const ArchInfo &Arch);
165
166 // Add or remove a feature based on a modifier string. The string must be of
167 // the form "<name>" to enable a feature or "no<name>" to disable it. This
168 // will also enable or disable any features as required by the dependencies
169 // between them.
170 bool parseModifier(StringRef Modifier);
171
172 // Convert the set of enabled extension to an LLVM feature list, appending
173 // them to Features.
174 void toLLVMFeatureList(std::vector<StringRef> &Features) const;
175};
176
177// Represents a dependency between two architecture extensions. Later is the
178// feature which was added to the architecture after Earlier, and expands the
179// functionality provided by it. If Later is enabled, then Earlier will also be
180// enabled. If Earlier is disabled, then Later will also be disabled.
181struct ExtensionDependency {
182 ArchExtKind Earlier;
183 ArchExtKind Later;
184};
185
186// clang-format off
187// Each entry here is a link in the dependency chain starting from the
188// extension that was added to the architecture first.
189inline constexpr ExtensionDependency ExtensionDependencies[] = {
190 {AEK_FP, AEK_FP16},
191 {AEK_FP, AEK_SIMD},
192 {AEK_FP, AEK_JSCVT},
193 {AEK_FP, AEK_FP8},
194 {AEK_SIMD, AEK_CRYPTO},
195 {AEK_SIMD, AEK_AES},
196 {AEK_SIMD, AEK_SHA2},
197 {AEK_SIMD, AEK_SHA3},
198 {AEK_SIMD, AEK_SM4},
199 {AEK_SIMD, AEK_RDM},
200 {AEK_SIMD, AEK_DOTPROD},
201 {AEK_SIMD, AEK_FCMA},
202 {AEK_FP16, AEK_FP16FML},
203 {AEK_FP16, AEK_SVE},
204 {AEK_BF16, AEK_SME},
205 {AEK_BF16, AEK_B16B16},
206 {AEK_SVE, AEK_SVE2},
207 {AEK_SVE, AEK_F32MM},
208 {AEK_SVE, AEK_F64MM},
209 {AEK_SVE2, AEK_SVE2P1},
210 {AEK_SVE2, AEK_SVE2BITPERM},
211 {AEK_SVE2, AEK_SVE2AES},
212 {AEK_SVE2, AEK_SVE2SHA3},
213 {AEK_SVE2, AEK_SVE2SM4},
214 {AEK_SVE2, AEK_SMEFA64},
215 {AEK_SVE2, AEK_SMEFA64},
216 {AEK_SME, AEK_SME2},
217 {AEK_SME, AEK_SMEF16F16},
218 {AEK_SME, AEK_SMEF64F64},
219 {AEK_SME, AEK_SMEI16I64},
220 {AEK_SME, AEK_SMEFA64},
221 {AEK_SME2, AEK_SME2P1},
222 {AEK_SME2, AEK_SSVE_FP8FMA},
223 {AEK_SME2, AEK_SSVE_FP8DOT2},
224 {AEK_SME2, AEK_SSVE_FP8DOT4},
225 {AEK_SME2, AEK_SMEF8F16},
226 {AEK_SME2, AEK_SMEF8F32},
227 {AEK_FP8, AEK_SMEF8F16},
228 {AEK_FP8, AEK_SMEF8F32},
229 {AEK_LSE, AEK_LSE128},
230 {AEK_PREDRES, AEK_SPECRES2},
231 {AEK_RAS, AEK_RASV2},
232 {AEK_RCPC, AEK_RCPC3},
233};
234// clang-format on
235
236enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
237
238// Information about a specific architecture, e.g. V8.1-A
239struct ArchInfo {
240 VersionTuple Version; // Architecture version, major + minor.
241 ArchProfile Profile; // Architecuture profile
242 StringRef Name; // Name as supplied to -march e.g. "armv8.1-a"
243 StringRef ArchFeature; // Name as supplied to -target-feature, e.g. "+v8a"
244 AArch64::ExtensionBitset
245 DefaultExts; // bitfield of default extensions ArchExtKind
246
247 bool operator==(const ArchInfo &Other) const {
248 return this->Name == Other.Name;
249 }
250 bool operator!=(const ArchInfo &Other) const {
251 return this->Name != Other.Name;
252 }
253
254 // Defines the following partial order, indicating when an architecture is
255 // a superset of another:
256 //
257 // v9.5a > v9.4a > v9.3a > v9.2a > v9.1a > v9a;
258 // v v v v v
259 // v8.9a > v8.8a > v8.7a > v8.6a > v8.5a > v8.4a > ... > v8a;
260 //
261 // v8r has no relation to anything. This is used to determine which
262 // features to enable for a given architecture. See
263 // AArch64TargetInfo::setFeatureEnabled.
264 bool implies(const ArchInfo &Other) const {
265 if (this->Profile != Other.Profile)
266 return false; // ARMV8R
267 if (this->Version.getMajor() == Other.Version.getMajor()) {
268 return this->Version > Other.Version;
269 }
270 if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
271 assert(this->Version.getMinor() && Other.Version.getMinor() &&
272 "AArch64::ArchInfo should have a minor version.");
273 return this->Version.getMinor().value_or(0) + 5 >=
274 Other.Version.getMinor().value_or(0);
275 }
276 return false;
277 }
278
279 // True if this architecture is a superset of Other (including being equal to
280 // it).
281 bool is_superset(const ArchInfo &Other) const {
282 return (*this == Other) || implies(Other);
283 }
284
285 // Return ArchFeature without the leading "+".
286 StringRef getSubArch() const { return ArchFeature.substr(1); }
287
288 // Search for ArchInfo by SubArch name
289 static std::optional<ArchInfo> findBySubArch(StringRef SubArch);
290};
291
292#define EMIT_ARCHITECTURES
293#include "llvm/TargetParser/AArch64TargetParserDef.inc"
294
295// Details of a specific CPU.
296struct CpuInfo {
297 StringRef Name; // Name, as written for -mcpu.
298 const ArchInfo &Arch;
299 AArch64::ExtensionBitset
300 DefaultExtensions; // Default extensions for this CPU. These will be
301 // ORd with the architecture defaults.
302
303 AArch64::ExtensionBitset getImpliedExtensions() const {
304 AArch64::ExtensionBitset ImpliedExts;
305 ImpliedExts |= DefaultExtensions;
306 ImpliedExts |= Arch.DefaultExts;
307 return ImpliedExts;
308 }
309};
310
311inline constexpr CpuInfo CpuInfos[] = {
312 {"cortex-a34", ARMV8A,
313 AArch64::ExtensionBitset(
314 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
315 {"cortex-a35", ARMV8A,
316 AArch64::ExtensionBitset(
317 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
318 {"cortex-a53", ARMV8A,
319 AArch64::ExtensionBitset(
320 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
321 {"cortex-a55", ARMV8_2A,
322 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
323 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
324 AArch64::AEK_RCPC})},
325 {"cortex-a510", ARMV9A,
326 AArch64::ExtensionBitset(
327 {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SB,
328 AArch64::AEK_PAUTH, AArch64::AEK_MTE, AArch64::AEK_SSBS,
329 AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM,
330 AArch64::AEK_FP16FML})},
331 {"cortex-a520", ARMV9_2A,
332 AArch64::ExtensionBitset(
333 {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE,
334 AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
335 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
336 {"cortex-a520ae", ARMV9_2A,
337 AArch64::ExtensionBitset(
338 {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE,
339 AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
340 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
341 {"cortex-a57", ARMV8A,
342 AArch64::ExtensionBitset(
343 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
344 {"cortex-a65", ARMV8_2A,
345 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
346 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
347 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
348 {"cortex-a65ae", ARMV8_2A,
349 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
350 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
351 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
352 {"cortex-a72", ARMV8A,
353 AArch64::ExtensionBitset(
354 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
355 {"cortex-a73", ARMV8A,
356 AArch64::ExtensionBitset(
357 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
358 {"cortex-a75", ARMV8_2A,
359 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
360 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
361 AArch64::AEK_RCPC})},
362 {"cortex-a76", ARMV8_2A,
363 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
364 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
365 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
366 {"cortex-a76ae", ARMV8_2A,
367 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
368 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
369 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
370 {"cortex-a77", ARMV8_2A,
371 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
372 AArch64::AEK_FP16, AArch64::AEK_RCPC,
373 AArch64::AEK_DOTPROD, AArch64::AEK_SSBS})},
374 {"cortex-a78", ARMV8_2A,
375 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
376 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
377 AArch64::AEK_RCPC, AArch64::AEK_SSBS,
378 AArch64::AEK_PROFILE})},
379 {"cortex-a78ae", ARMV8_2A,
380 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
381 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
382 AArch64::AEK_RCPC, AArch64::AEK_SSBS,
383 AArch64::AEK_PROFILE})},
384 {"cortex-a78c", ARMV8_2A,
385 AArch64::ExtensionBitset(
386 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
387 AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
388 AArch64::AEK_PROFILE, AArch64::AEK_FLAGM, AArch64::AEK_PAUTH})},
389 {"cortex-a710", ARMV9A,
390 AArch64::ExtensionBitset({AArch64::AEK_MTE, AArch64::AEK_PAUTH,
391 AArch64::AEK_FLAGM, AArch64::AEK_SB,
392 AArch64::AEK_I8MM, AArch64::AEK_FP16FML,
393 AArch64::AEK_SVE, AArch64::AEK_SVE2,
394 AArch64::AEK_SVE2BITPERM, AArch64::AEK_BF16})},
395 {"cortex-a715", ARMV9A,
396 AArch64::ExtensionBitset(
397 {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE,
398 AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH,
399 AArch64::AEK_I8MM, AArch64::AEK_PREDRES, AArch64::AEK_PERFMON,
400 AArch64::AEK_PROFILE, AArch64::AEK_SVE, AArch64::AEK_SVE2BITPERM,
401 AArch64::AEK_BF16, AArch64::AEK_FLAGM})},
402 {"cortex-a720", ARMV9_2A,
403 AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS,
404 AArch64::AEK_MTE, AArch64::AEK_FP16FML,
405 AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
406 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
407 AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})},
408 {"cortex-a720ae", ARMV9_2A,
409 AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS,
410 AArch64::AEK_MTE, AArch64::AEK_FP16FML,
411 AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
412 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
413 AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})},
414 {"cortex-r82", ARMV8R,
415 AArch64::ExtensionBitset({AArch64::AEK_LSE, AArch64::AEK_FLAGM,
416 AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
417 {"cortex-r82ae", ARMV8R,
418 AArch64::ExtensionBitset({AArch64::AEK_LSE, AArch64::AEK_FLAGM,
419 AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})},
420 {"cortex-x1", ARMV8_2A,
421 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
422 AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
423 AArch64::AEK_RCPC, AArch64::AEK_SSBS,
424 AArch64::AEK_PROFILE})},
425 {"cortex-x1c", ARMV8_2A,
426 AArch64::ExtensionBitset(
427 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,
428 AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
429 AArch64::AEK_PAUTH, AArch64::AEK_PROFILE, AArch64::AEK_FLAGM})},
430 {"cortex-x2", ARMV9A,
431 AArch64::ExtensionBitset(
432 {AArch64::AEK_MTE, AArch64::AEK_BF16, AArch64::AEK_I8MM,
433 AArch64::AEK_PAUTH, AArch64::AEK_SSBS, AArch64::AEK_SB,
434 AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM,
435 AArch64::AEK_FP16FML, AArch64::AEK_FLAGM})},
436 {"cortex-x3", ARMV9A,
437 AArch64::ExtensionBitset(
438 {AArch64::AEK_SVE, AArch64::AEK_PERFMON, AArch64::AEK_PROFILE,
439 AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_MTE,
440 AArch64::AEK_SVE2BITPERM, AArch64::AEK_SB, AArch64::AEK_PAUTH,
441 AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PREDRES,
442 AArch64::AEK_FLAGM, AArch64::AEK_SSBS})},
443 {"cortex-x4", ARMV9_2A,
444 AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS,
445 AArch64::AEK_MTE, AArch64::AEK_FP16FML,
446 AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM,
447 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
448 AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})},
449 {"neoverse-e1", ARMV8_2A,
450 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
451 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
452 AArch64::AEK_RCPC, AArch64::AEK_SSBS})},
453 {"neoverse-n1", ARMV8_2A,
454 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
455 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
456 AArch64::AEK_PROFILE, AArch64::AEK_RCPC,
457 AArch64::AEK_SSBS})},
458 {"neoverse-n2", ARMV9A,
459 AArch64::ExtensionBitset(
460 {AArch64::AEK_BF16, AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
461 AArch64::AEK_FP16FML, AArch64::AEK_I8MM, AArch64::AEK_MTE,
462 AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_SVE,
463 AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM})},
464 {"neoverse-n3", ARMV9_2A,
465 AArch64::ExtensionBitset({AArch64::AEK_MTE, AArch64::AEK_SSBS,
466 AArch64::AEK_SB, AArch64::AEK_PREDRES,
467 AArch64::AEK_FP16FML, AArch64::AEK_PAUTH,
468 AArch64::AEK_FLAGM, AArch64::AEK_PERFMON,
469 AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM,
470 AArch64::AEK_PROFILE, AArch64::AEK_PERFMON})},
471 {"neoverse-512tvb", ARMV8_4A,
472 AArch64::ExtensionBitset(
473 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3,
474 AArch64::AEK_SM4, AArch64::AEK_SVE, AArch64::AEK_SSBS,
475 AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD,
476 AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML,
477 AArch64::AEK_I8MM})},
478 {"neoverse-v1", ARMV8_4A,
479 AArch64::ExtensionBitset(
480 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3,
481 AArch64::AEK_SM4, AArch64::AEK_SVE, AArch64::AEK_SSBS,
482 AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD,
483 AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML,
484 AArch64::AEK_I8MM})},
485 {"neoverse-v2", ARMV9A,
486 AArch64::ExtensionBitset(
487 {AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SSBS,
488 AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_RAND,
489 AArch64::AEK_DOTPROD, AArch64::AEK_PROFILE, AArch64::AEK_SVE2BITPERM,
490 AArch64::AEK_FP16FML, AArch64::AEK_I8MM, AArch64::AEK_MTE})},
491 {"neoverse-v3", ARMV9_2A,
492 AArch64::ExtensionBitset(
493 {AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS,
494 AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64,
495 AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM,
496 AArch64::AEK_PERFMON, AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM,
497 AArch64::AEK_FP16FML})},
498 {"neoverse-v3ae", ARMV9_2A,
499 (AArch64::ExtensionBitset(
500 {AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS,
501 AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64,
502 AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM,
503 AArch64::AEK_PERFMON, AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM,
504 AArch64::AEK_FP16FML}))},
505 {"cyclone", ARMV8A,
506 AArch64::ExtensionBitset(
507 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
508 {"apple-a7", ARMV8A,
509 AArch64::ExtensionBitset(
510 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
511 {"apple-a8", ARMV8A,
512 AArch64::ExtensionBitset(
513 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
514 {"apple-a9", ARMV8A,
515 AArch64::ExtensionBitset(
516 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_NONE})},
517 {"apple-a10", ARMV8A,
518 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
519 AArch64::AEK_CRC, AArch64::AEK_RDM})},
520 {"apple-a11", ARMV8_2A,
521 AArch64::ExtensionBitset(
522 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
523 {"apple-a12", ARMV8_3A,
524 AArch64::ExtensionBitset(
525 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
526 {"apple-a13", ARMV8_4A,
527 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
528 AArch64::AEK_SHA3, AArch64::AEK_FP16,
529 AArch64::AEK_FP16FML})},
530 {"apple-a14", ARMV8_5A,
531 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
532 AArch64::AEK_SHA3, AArch64::AEK_FP16,
533 AArch64::AEK_FP16FML})},
534 {"apple-a15", ARMV8_6A,
535 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
536 AArch64::AEK_SHA3, AArch64::AEK_FP16,
537 AArch64::AEK_FP16FML})},
538 {"apple-a16", ARMV8_6A,
539 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
540 AArch64::AEK_SHA3, AArch64::AEK_FP16,
541 AArch64::AEK_FP16FML})},
542 {"apple-a17", ARMV8_6A,
543 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
544 AArch64::AEK_SHA3, AArch64::AEK_FP16,
545 AArch64::AEK_FP16FML})},
546
547 {"apple-m1", ARMV8_5A,
548 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
549 AArch64::AEK_SHA3, AArch64::AEK_FP16,
550 AArch64::AEK_FP16FML})},
551 {"apple-m2", ARMV8_6A,
552 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
553 AArch64::AEK_SHA3, AArch64::AEK_FP16,
554 AArch64::AEK_FP16FML})},
555 {"apple-m3", ARMV8_6A,
556 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
557 AArch64::AEK_SHA3, AArch64::AEK_FP16,
558 AArch64::AEK_FP16FML})},
559
560 {"apple-s4", ARMV8_3A,
561 AArch64::ExtensionBitset(
562 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
563 {"apple-s5", ARMV8_3A,
564 AArch64::ExtensionBitset(
565 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
566 {"exynos-m3", ARMV8A,
567 AArch64::ExtensionBitset(
568 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
569 {"exynos-m4", ARMV8_2A,
570 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
571 AArch64::AEK_DOTPROD, AArch64::AEK_FP16})},
572 {"exynos-m5", ARMV8_2A,
573 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
574 AArch64::AEK_DOTPROD, AArch64::AEK_FP16})},
575 {"falkor", ARMV8A,
576 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
577 AArch64::AEK_CRC, AArch64::AEK_RDM})},
578 {"saphira", ARMV8_3A,
579 AArch64::ExtensionBitset(
580 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_PROFILE})},
581 {"kryo", ARMV8A,
582 AArch64::ExtensionBitset(
583 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
584 {"thunderx2t99", ARMV8_1A,
585 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2})},
586 {"thunderx3t110", ARMV8_3A,
587 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2})},
588 {"thunderx", ARMV8A,
589 AArch64::ExtensionBitset(
590 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
591 {"thunderxt88", ARMV8A,
592 AArch64::ExtensionBitset(
593 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
594 {"thunderxt81", ARMV8A,
595 AArch64::ExtensionBitset(
596 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
597 {"thunderxt83", ARMV8A,
598 AArch64::ExtensionBitset(
599 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})},
600 {"tsv110", ARMV8_2A,
601 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
602 AArch64::AEK_DOTPROD, AArch64::AEK_FP16,
603 AArch64::AEK_FP16FML, AArch64::AEK_PROFILE,
604 AArch64::AEK_JSCVT, AArch64::AEK_FCMA})},
605 {"a64fx", ARMV8_2A,
606 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
607 AArch64::AEK_FP16, AArch64::AEK_SVE})},
608 {"carmel", ARMV8_2A,
609 AArch64::ExtensionBitset(
610 {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})},
611 {"ampere1", ARMV8_6A,
612 AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
613 AArch64::AEK_SHA3, AArch64::AEK_FP16,
614 AArch64::AEK_SB, AArch64::AEK_SSBS,
615 AArch64::AEK_RAND})},
616 {"ampere1a", ARMV8_6A,
617 AArch64::ExtensionBitset(
618 {AArch64::AEK_FP16, AArch64::AEK_RAND, AArch64::AEK_SM4,
619 AArch64::AEK_SHA3, AArch64::AEK_SHA2, AArch64::AEK_AES,
620 AArch64::AEK_MTE, AArch64::AEK_SB, AArch64::AEK_SSBS})},
621 {"ampere1b", ARMV8_7A,
622 AArch64::ExtensionBitset({AArch64::AEK_FP16, AArch64::AEK_RAND,
623 AArch64::AEK_SM4, AArch64::AEK_SHA3,
624 AArch64::AEK_SHA2, AArch64::AEK_AES,
625 AArch64::AEK_MTE, AArch64::AEK_SB,
626 AArch64::AEK_SSBS, AArch64::AEK_CSSC})},
627};
628
629// Name alias.
630struct Alias {
631 StringRef AltName;
632 StringRef Name;
633};
634
635inline constexpr Alias CpuAliases[] = {{"cobalt-100", "neoverse-n2"},
636 {"grace", "neoverse-v2"}};
637
638const ExtensionInfo &getExtensionByID(ArchExtKind(ExtID));
639
640bool getExtensionFeatures(
641 const AArch64::ExtensionBitset &Extensions,
642 std::vector<StringRef> &Features);
643
644StringRef getArchExtFeature(StringRef ArchExt);
645StringRef resolveCPUAlias(StringRef CPU);
646
647// Information by Name
648const ArchInfo *getArchForCpu(StringRef CPU);
649
650// Parser
651const ArchInfo *parseArch(StringRef Arch);
652std::optional<ExtensionInfo> parseArchExtension(StringRef Extension);
653// Given the name of a CPU or alias, return the correponding CpuInfo.
654std::optional<CpuInfo> parseCpu(StringRef Name);
655// Used by target parser tests
656void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
657
658bool isX18ReservedByDefault(const Triple &TT);
659
660// For given feature names, return a bitmask corresponding to the entries of
661// AArch64::CPUFeatures. The values in CPUFeatures are not bitmasks
662// themselves, they are sequential (0, 1, 2, 3, ...).
663uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
664
665void PrintSupportedExtensions(StringMap<StringRef> DescMap);
666
667} // namespace AArch64
668} // namespace llvm
669
670#endif
StringMap.h
This file defines the StringMap class.
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Name
std::string Name
Definition: ELFObjHandler.cpp:77
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Extensions
static cl::opt< std::set< SPIRV::Extension::Extension >, false, SPIRVExtensionsParser > Extensions("spirv-ext", cl::desc("Specify list of enabled SPIR-V extensions"))
VersionTuple.h
Defines the llvm::VersionTuple class, which represents a version in the form major[....
llvm::ArrayRef
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
llvm::StringMap
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:128
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm::StringRef::substr
constexpr StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
Definition: StringRef.h:564
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::VersionTuple
Represents a version number in the form major[.minor[.subminor[.build]]].
Definition: VersionTuple.h:29
llvm::VersionTuple::getMajor
unsigned getMajor() const
Retrieve the major version number.
Definition: VersionTuple.h:71
llvm::VersionTuple::getMinor
std::optional< unsigned > getMinor() const
Retrieve the minor version number, if provided.
Definition: VersionTuple.h:74
uint64_t
llvm::AArch64::PrintSupportedExtensions
void PrintSupportedExtensions(StringMap< StringRef > DescMap)
Definition: AArch64TargetParser.cpp:137
llvm::AArch64::isX18ReservedByDefault
bool isX18ReservedByDefault(const Triple &TT)
Definition: AArch64TargetParser.cpp:97
llvm::AArch64::getArchExtFeature
StringRef getArchExtFeature(StringRef ArchExt)
Definition: AArch64TargetParser.cpp:77
llvm::AArch64::parseArchExtension
std::optional< ExtensionInfo > parseArchExtension(StringRef Extension)
Definition: AArch64TargetParser.cpp:117
llvm::AArch64::CpuInfos
constexpr CpuInfo CpuInfos[]
Definition: AArch64TargetParser.h:311
llvm::AArch64::parseCpu
std::optional< CpuInfo > parseCpu(StringRef Name)
Definition: AArch64TargetParser.cpp:125
llvm::AArch64::getCpuSupportsMask
uint64_t getCpuSupportsMask(ArrayRef< StringRef > FeatureStrs)
Definition: AArch64TargetParser.cpp:50
llvm::AArch64::parseArch
const ArchInfo * parseArch(StringRef Arch)
Definition: AArch64TargetParser.cpp:103
llvm::AArch64::getArchForCpu
const ArchInfo * getArchForCpu(StringRef CPU)
Definition: AArch64TargetParser.cpp:32
llvm::AArch64::fillValidCPUArchList
void fillValidCPUArchList(SmallVectorImpl< StringRef > &Values)
Definition: AArch64TargetParser.cpp:89
llvm::AArch64::ExtensionDependencies
constexpr ExtensionDependency ExtensionDependencies[]
Definition: AArch64TargetParser.h:189
llvm::AArch64::getExtensionByID
const ExtensionInfo & getExtensionByID(ArchExtKind(ExtID))
llvm::AArch64::CpuAliases
constexpr Alias CpuAliases[]
Definition: AArch64TargetParser.h:635
llvm::AArch64::resolveCPUAlias
StringRef resolveCPUAlias(StringRef CPU)
Definition: AArch64TargetParser.cpp:70
llvm::AArch64::getExtensionFeatures
bool getExtensionFeatures(const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)
Definition: AArch64TargetParser.cpp:59
llvm::AArch64::ExtensionBitset
Bitset< AEK_NUM_EXTENSIONS > ExtensionBitset
Definition: AArch64TargetParser.h:110
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::IRMemLocation::Other
@ Other
Any other memory.
llvm::AArch64::ArchInfo::is_superset
bool is_superset(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:281
llvm::AArch64::ArchInfo::getSubArch
StringRef getSubArch() const
Definition: AArch64TargetParser.h:286
llvm::AArch64::ArchInfo::implies
bool implies(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:264
llvm::AArch64::ArchInfo::DefaultExts
AArch64::ExtensionBitset DefaultExts
Definition: AArch64TargetParser.h:245
llvm::AArch64::ArchInfo::findBySubArch
static std::optional< ArchInfo > findBySubArch(StringRef SubArch)
Definition: AArch64TargetParser.cpp:43
llvm::AArch64::ArchInfo::operator==
bool operator==(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:247
llvm::AArch64::ArchInfo::operator!=
bool operator!=(const ArchInfo &Other) const
Definition: AArch64TargetParser.h:250
llvm::AArch64::CpuInfo::getImpliedExtensions
AArch64::ExtensionBitset getImpliedExtensions() const
Definition: AArch64TargetParser.h:303
llvm::AArch64::CpuInfo::DefaultExtensions
AArch64::ExtensionBitset DefaultExtensions
Definition: AArch64TargetParser.h:300
llvm::AArch64::ExtensionInfo::Alias
std::optional< StringRef > Alias
Definition: AArch64TargetParser.h:118
llvm::AArch64::ExtensionInfo::MaxFMVPriority
static constexpr unsigned MaxFMVPriority
Definition: AArch64TargetParser.h:128
llvm::AArch64::ExtensionSet::addCPUDefaults
void addCPUDefaults(const CpuInfo &CPU)
Definition: AArch64TargetParser.cpp:237
llvm::AArch64::ExtensionSet::toLLVMFeatureList
void toLLVMFeatureList(std::vector< StringRef > &Features) const
Definition: AArch64TargetParser.cpp:222
llvm::AArch64::ExtensionSet::parseModifier
bool parseModifier(StringRef Modifier)
Definition: AArch64TargetParser.cpp:256
llvm::AArch64::ExtensionSet::addArchDefaults
void addArchDefaults(const ArchInfo &Arch)
Definition: AArch64TargetParser.cpp:247
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