LLVM 19.0.0git
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#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveDebugVariables.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveStacks.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include <queue>
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "riscv-insert-vsetvli" |
#define | RISCV_INSERT_VSETVLI_NAME "RISC-V Insert VSETVLI pass" |
#define | RISCV_COALESCE_VSETVLI_NAME "RISC-V Coalesce VSETVLI pass" |
Functions | |
STATISTIC (NumInsertedVSETVL, "Number of VSETVL inst inserted") | |
STATISTIC (NumCoalescedVSETVL, "Number of VSETVL inst coalesced") | |
INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI | INITIALIZE_PASS (RISCVCoalesceVSETVLI, "riscv-coalesce-vsetvli", RISCV_COALESCE_VSETVLI_NAME, false, false) static VSETVLIInfo getInfoForVSETVLI(const MachineInstr &MI |
if (MI.getOpcode()==RISCV::PseudoVSETIVLI) | |
assert ((AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle X0, X0 vsetvli yet") | |
if (AVLReg==RISCV::X0) NewInfo.setAVLVLMAX() | |
else | if (VNInfo *VNI=getVNInfoFromReg(AVLReg, MI, LIS)) NewInfo.setAVLRegDef(VNI |
NewInfo | setAVLIgnored () |
NewInfo | setVTYPE (MI.getOperand(2).getImm()) |
static unsigned | computeVLMAX (unsigned VLEN, unsigned SEW, RISCVII::VLMUL VLMul) |
static VSETVLIInfo | computeInfoForInstr (const MachineInstr &MI, uint64_t TSFlags, const RISCVSubtarget &ST, const LiveIntervals *LIS) |
static bool | isLMUL1OrSmaller (RISCVII::VLMUL LMUL) |
static VSETVLIInfo | adjustIncoming (VSETVLIInfo PrevInfo, VSETVLIInfo NewInfo, DemandedFields &Demanded) |
static bool | canMutatePriorConfig (const MachineInstr &PrevMI, const MachineInstr &MI, const DemandedFields &Used, const MachineRegisterInfo &MRI, const LiveIntervals *LIS) |
Variables | |
static cl::opt< bool > | DisableInsertVSETVLPHIOpt ("riscv-disable-insert-vsetvl-phi-opt", cl::init(false), cl::Hidden, cl::desc("Disable looking through phis when inserting vsetvlis.")) |
INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI const LiveIntervals * | LIS |
else | |
Register | AVLReg = MI.getOperand(1).getReg() |
return | NewInfo |
#define DEBUG_TYPE "riscv-insert-vsetvli" |
Definition at line 37 of file RISCVInsertVSETVLI.cpp.
#define RISCV_COALESCE_VSETVLI_NAME "RISC-V Coalesce VSETVLI pass" |
Definition at line 39 of file RISCVInsertVSETVLI.cpp.
#define RISCV_INSERT_VSETVLI_NAME "RISC-V Insert VSETVLI pass" |
Definition at line 38 of file RISCVInsertVSETVLI.cpp.
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Definition at line 1183 of file RISCVInsertVSETVLI.cpp.
References llvm::RISCVVType::getSameRatioLMUL(), Info, and NewInfo.
assert | ( | (AVLReg !=RISCV::X0||MI.getOperand(0).getReg() !=RISCV::X0) &&"Can't handle | X0, |
X0 vsetvli yet" | |||
) |
Referenced by canMutatePriorConfig(), computeInfoForInstr(), and if().
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Definition at line 1591 of file RISCVInsertVSETVLI.cpp.
References assert(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::isImm(), LIS, MI, and MRI.
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Definition at line 918 of file RISCVInsertVSETVLI.cpp.
References assert(), computeVLMAX(), DefMI, llvm::RISCVII::doesForceTailAgnostic(), llvm::MachineOperand::getImm(), llvm::RISCVII::getLMul(), llvm::MachineOperand::getReg(), llvm::RISCVII::hasVecPolicyOp(), llvm::RISCVII::hasVLOp(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isUndef(), llvm::RISCVVType::isValidSEW(), LIS, llvm::RISCVII::MASK_AGNOSTIC, MI, llvm::RISCVII::TAIL_AGNOSTIC, llvm::RISCVII::usesMaskPolicy(), and llvm::RISCV::VLMaxSentinel.
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Definition at line 908 of file RISCVInsertVSETVLI.cpp.
References llvm::RISCVVType::decodeVLMUL().
Referenced by computeInfoForInstr().
if | ( | AVLReg | = =RISCV::X0 | ) |
if | ( | MI. | getOpcode() = = RISCV::PseudoVSETIVLI | ) |
Definition at line 886 of file RISCVInsertVSETVLI.cpp.
INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI INITIALIZE_PASS | ( | RISCVCoalesceVSETVLI | , |
"riscv-coalesce-vsetvli" | , | ||
RISCV_COALESCE_VSETVLI_NAME | , | ||
false | , | ||
false | |||
) | const & |
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static |
Definition at line 1110 of file RISCVInsertVSETVLI.cpp.
References llvm::RISCVVType::decodeVLMUL().
NewInfo setAVLIgnored | ( | ) |
NewInfo setVTYPE | ( | MI. | getOperand2).getImm( | ) |
STATISTIC | ( | NumCoalescedVSETVL | , |
"Number of VSETVL inst coalesced" | |||
) |
STATISTIC | ( | NumInsertedVSETVL | , |
"Number of VSETVL inst inserted" | |||
) |
Definition at line 891 of file RISCVInsertVSETVLI.cpp.
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else |
Definition at line 888 of file RISCVInsertVSETVLI.cpp.
INITIALIZE_PASS(RISCVInsertVSETVLI, DEBUG_TYPE, RISCV_INSERT_VSETVLI_NAME, false, false) char RISCVCoalesceVSETVLI const LiveIntervals* LIS |
Definition at line 884 of file RISCVInsertVSETVLI.cpp.
Referenced by llvm::RegisterOperands::adjustLaneLiveness(), llvm::RegPressureTracker::advance(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::RegPressureTracker::bumpDownwardPressure(), llvm::RegPressureTracker::bumpUpwardPressure(), canMutatePriorConfig(), llvm::ConnectedVNInfoEqClasses::Classify(), llvm::X86InstrInfo::classifyLEAReg(), collectVirtualRegUses(), computeInfoForInstr(), llvm::ConnectedVNInfoEqClasses::ConnectedVNInfoEqClasses(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::RegisterOperands::detectDeadDefs(), llvm::ConnectedVNInfoEqClasses::Distribute(), dumpMachineInstrRangeWithSlotIndex(), llvm::SIRegisterInfo::eliminateSGPRToVGPRSpillFrameIndex(), findInsertLocation(), findNextInsertLocation(), llvm::SIRegisterInfo::findReachingDef(), findUseBetween(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::InsertPointAnalysis::getFirstInsertPoint(), getLanesWithProperty(), llvm::RegPressureTracker::getLastUsedLanes(), llvm::RAGreedy::getLiveIntervals(), llvm::getLiveLaneMask(), getLiveLanesAt(), llvm::RegPressureTracker::getLiveLanesAt(), getLiveRange(), llvm::getLiveRegMap(), llvm::getLiveRegs(), llvm::getLiveRegsAfter(), llvm::getLiveRegsBefore(), llvm::RegPressureTracker::getLiveThroughAt(), getRegLiveThroughMask(), llvm::LiveIntervals::HMEditor::getRegUnitLI(), getVDefInterval(), getVRegDef(), hasOneNonDBGUse(), llvm::LiveIntervals::HMEditor::HMEditor(), insertCSRRestores(), insertCSRSaves(), isDefBetween(), isLocalCopy(), llvm::VirtRegAuxInfo::isRematerializable(), llvm::LiveRangeEdit::LiveRangeEdit(), llvm::ModuloScheduleExpander::ModuloScheduleExpander(), moveAndTeeForMultiUse(), moveForSingleUse(), oneUseDominatesOtherUses(), optimizeCall(), printLivenessInfo(), printRegion(), llvm::RegPressureTracker::recede(), llvm::RegPressureTracker::recedeSkipDebugValues(), rematerializeCheapDef(), replaceDominatedUses(), replaceRegUsesAfterLoop(), llvm::SIRegisterInfo::restoreSGPR(), llvm::GCNRegPressurePrinter::runOnMachineFunction(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), llvm::AVRRegisterInfo::shouldCoalesce(), llvm::HexagonRegisterInfo::shouldCoalesce(), llvm::SystemZRegisterInfo::shouldCoalesce(), shrinkToUses(), llvm::SIRegisterInfo::spillSGPR(), llvm::MachineBasicBlock::splitAt(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::SwingSchedulerDAG::SwingSchedulerDAG(), llvm::LiveIntervals::HMEditor::updateAllRanges(), and llvm::VirtRegAuxInfo::VirtRegAuxInfo().
return NewInfo |
Definition at line 905 of file RISCVInsertVSETVLI.cpp.
Referenced by adjustIncoming(), llvm::AMDGPU::getMaskedMIMGOp(), and if().