28using namespace PatternMatch;
30#define DEBUG_TYPE "tti"
34 cl::desc(
"Recognize reduction patterns."));
38 cl::desc(
"Use this to override the target cache line size when "
39 "specified by the user."));
43 cl::desc(
"Use this to override the target's minimum page size."));
48 "Use this to override the target's predictable branch threshold (%)."));
66 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
75 ScalarizationCost(ScalarizationCost) {
77 if (
const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
78 FMF = FPMO->getFastMathFlags();
91 : II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
92 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
97 :
RetTy(Ty), IID(Id) {
99 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
100 ParamTys.reserve(Arguments.size());
102 ParamTys.push_back(Arguments[
Idx]->
getType());
111 : II(
I),
RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
112 ParamTys.insert(ParamTys.begin(), Tys.
begin(), Tys.
end());
113 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
140 if (isa<SCEVCouldNotCompute>(EC))
142 if (
const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
143 if (ConstEC->getValue()->isZero())
164 bool NotAlways =
false;
183 if (
BranchInst *BI = dyn_cast<BranchInst>(TI)) {
184 if (!BI->isConditional())
204 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(
DL))) {}
209 : TTIImpl(
std::
move(Arg.TTIImpl)) {}
212 TTIImpl = std::move(
RHS.TTIImpl);
217 return TTIImpl->getInliningThresholdMultiplier();
222 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
228 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
233 return TTIImpl->adjustInliningThreshold(CB);
238 return TTIImpl->getCallerAllocaCost(CB, AI);
242 return TTIImpl->getInlinerVectorBonusPercent();
256 "If pointers have same base address it has to be provided.");
263 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
272 "TTI should not produce negative costs!");
279 : TTIImpl->getPredictableBranchThreshold();
283 return TTIImpl->hasBranchDivergence(
F);
287 return TTIImpl->isSourceOfDivergence(V);
291 return TTIImpl->isAlwaysUniform(V);
295 unsigned ToAS)
const {
296 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
300 unsigned ToAS)
const {
301 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
305 return TTIImpl->getFlatAddressSpace();
310 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
314 unsigned ToAS)
const {
315 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
320 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
324 return TTIImpl->getAssumedAddrSpace(V);
328 return TTIImpl->isSingleThreaded();
331std::pair<const Value *, unsigned>
333 return TTIImpl->getPredicatedAddrSpace(V);
338 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
342 return TTIImpl->isLoweredToCall(
F);
348 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
353 return TTIImpl->preferPredicateOverEpilogue(TFI);
357 bool IVUpdateMayOverflow)
const {
358 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
361std::optional<Instruction *>
364 return TTIImpl->instCombineIntrinsic(IC, II);
369 bool &KnownBitsComputed)
const {
370 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
378 SimplifyAndSetOp)
const {
379 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
380 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
387 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
392 return TTIImpl->getPeelingPreferences(L, SE, PP);
396 return TTIImpl->isLegalAddImmediate(Imm);
400 return TTIImpl->isLegalAddScalableImmediate(Imm);
404 return TTIImpl->isLegalICmpImmediate(Imm);
409 bool HasBaseReg, int64_t Scale,
412 int64_t ScalableOffset)
const {
413 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
414 Scale, AddrSpace,
I, ScalableOffset);
419 return TTIImpl->isLSRCostLess(C1, C2);
423 return TTIImpl->isNumRegsMajorCostOfLSR();
427 return TTIImpl->shouldFoldTerminatingConditionAfterLSR();
431 return TTIImpl->isProfitableLSRChainElement(
I);
435 return TTIImpl->canMacroFuseCmp();
442 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
448 return TTIImpl->getPreferredAddressingMode(L, SE);
452 Align Alignment)
const {
453 return TTIImpl->isLegalMaskedStore(DataType, Alignment);
457 Align Alignment)
const {
458 return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
462 Align Alignment)
const {
463 return TTIImpl->isLegalNTStore(DataType, Alignment);
467 return TTIImpl->isLegalNTLoad(DataType, Alignment);
472 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
476 Align Alignment)
const {
477 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
481 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
483 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
487 Align Alignment)
const {
488 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
492 Align Alignment)
const {
493 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
497 Align Alignment)
const {
498 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
502 Align Alignment)
const {
503 return TTIImpl->isLegalMaskedCompressStore(DataType, Alignment);
507 Align Alignment)
const {
508 return TTIImpl->isLegalMaskedExpandLoad(DataType, Alignment);
512 Align Alignment)
const {
513 return TTIImpl->isLegalStridedLoadStore(DataType, Alignment);
517 Type *DataType)
const {
518 return TTIImpl->isLegalMaskedVectorHistogram(AddrType, DataType);
522 return TTIImpl->enableOrderedReductions();
526 return TTIImpl->hasDivRemOp(DataType, IsSigned);
530 unsigned AddrSpace)
const {
531 return TTIImpl->hasVolatileVariant(
I, AddrSpace);
535 return TTIImpl->prefersVectorizedAddressing();
540 int64_t Scale,
unsigned AddrSpace)
const {
542 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
543 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
548 return TTIImpl->LSRWithInstrQueries();
552 return TTIImpl->isTruncateFree(Ty1, Ty2);
556 return TTIImpl->isProfitableToHoist(
I);
562 return TTIImpl->isTypeLegal(Ty);
566 return TTIImpl->getRegUsageForType(Ty);
570 return TTIImpl->shouldBuildLookupTables();
575 return TTIImpl->shouldBuildLookupTablesForConstant(
C);
579 return TTIImpl->shouldBuildRelLookupTables();
583 return TTIImpl->useColdCCForColdCall(
F);
589 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
596 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys,
CostKind);
600 return TTIImpl->supportsEfficientVectorElementLoadStore();
604 return TTIImpl->supportsTailCalls();
608 return TTIImpl->supportsTailCallFor(CB);
612 bool LoopHasReductions)
const {
613 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
618 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
622 return TTIImpl->enableSelectOptimize();
627 return TTIImpl->shouldTreatInstructionLikeSelect(
I);
631 return TTIImpl->enableInterleavedAccessVectorization();
635 return TTIImpl->enableMaskedInterleavedAccessVectorization();
639 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
647 unsigned *
Fast)
const {
654 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
658 return TTIImpl->haveFastSqrt(Ty);
663 return TTIImpl->isExpensiveToSpeculativelyExecute(
I);
667 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
672 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
681 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
689 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
694 unsigned Opcode,
unsigned Idx,
const APInt &Imm,
Type *Ty,
697 TTIImpl->getIntImmCostInst(Opcode,
Idx, Imm, Ty,
CostKind, Inst);
698 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
707 TTIImpl->getIntImmCostIntrin(IID,
Idx, Imm, Ty,
CostKind);
708 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
714 return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
718 return TTIImpl->getNumberOfRegisters(ClassID);
723 return TTIImpl->getRegisterClassForType(
Vector, Ty);
727 return TTIImpl->getRegisterClassName(ClassID);
732 return TTIImpl->getRegisterBitWidth(K);
736 return TTIImpl->getMinVectorRegisterBitWidth();
740 return TTIImpl->getMaxVScale();
744 return TTIImpl->getVScaleForTuning();
748 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
753 return TTIImpl->shouldMaximizeVectorBandwidth(K);
757 bool IsScalable)
const {
758 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
762 unsigned Opcode)
const {
763 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
767 Type *ScalarValTy)
const {
768 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
772 const Instruction &
I,
bool &AllowPromotionWithoutCommonHeader)
const {
773 return TTIImpl->shouldConsiderAddressTypePromotion(
774 I, AllowPromotionWithoutCommonHeader);
779 : TTIImpl->getCacheLineSize();
782std::optional<unsigned>
784 return TTIImpl->getCacheSize(Level);
787std::optional<unsigned>
789 return TTIImpl->getCacheAssociativity(Level);
794 : TTIImpl->getMinPageSize();
798 return TTIImpl->getPrefetchDistance();
802 unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
803 unsigned NumPrefetches,
bool HasCall)
const {
804 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
805 NumPrefetches, HasCall);
809 return TTIImpl->getMaxPrefetchIterationsAhead();
813 return TTIImpl->enableWritePrefetching();
817 return TTIImpl->shouldPrefetchAddressSpace(AS);
821 return TTIImpl->getMaxInterleaveFactor(VF);
829 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
830 if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
831 if (CI->getValue().isPowerOf2())
833 else if (CI->getValue().isNegatedPowerOf2())
842 if (
const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
843 if (ShuffleInst->isZeroEltSplat())
850 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
854 if (
auto *CI = dyn_cast<ConstantInt>(
Splat)) {
855 if (CI->getValue().isPowerOf2())
857 else if (CI->getValue().isNegatedPowerOf2())
860 }
else if (
const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
861 bool AllPow2 =
true, AllNegPow2 =
true;
862 for (
unsigned I = 0, E = CDS->getNumElements();
I != E; ++
I) {
863 if (
auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(
I))) {
864 AllPow2 &= CI->getValue().isPowerOf2();
865 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
866 if (AllPow2 || AllNegPow2)
869 AllPow2 = AllNegPow2 =
false;
882 return {OpInfo, OpProps};
894 if (TLibInfo && Opcode == Instruction::FRem) {
905 TTIImpl->getArithmeticInstrCost(Opcode, Ty,
CostKind,
908 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
913 VectorType *VecTy,
unsigned Opcode0,
unsigned Opcode1,
916 TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask,
CostKind);
917 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
926 Index, SubTp, Args, CxtI);
927 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
936 auto getLoadStoreKind = [](
const Value *V,
unsigned LdStOp,
unsigned MaskedOp,
937 unsigned GatScatOp) {
942 if (
I->getOpcode() == LdStOp)
955 switch (
I->getOpcode()) {
956 case Instruction::ZExt:
957 case Instruction::SExt:
958 case Instruction::FPExt:
959 return getLoadStoreKind(
I->getOperand(0), Instruction::Load,
960 Intrinsic::masked_load, Intrinsic::masked_gather);
961 case Instruction::Trunc:
962 case Instruction::FPTrunc:
964 return getLoadStoreKind(*
I->user_begin(), Instruction::Store,
965 Intrinsic::masked_store,
966 Intrinsic::masked_scatter);
978 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
979 "Opcode should reflect passed instruction.");
981 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH,
CostKind,
I);
982 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
989 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy,
Index);
990 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
996 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
997 "Opcode should reflect passed instruction.");
999 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1006 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1007 "Opcode should reflect passed instruction.");
1009 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred,
CostKind,
I);
1010 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1021 TTIImpl->getVectorInstrCost(Opcode, Val,
CostKind,
Index, Op0, Op1);
1022 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1029 unsigned Index)
const {
1034 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1039 Type *EltTy,
int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
1042 EltTy, ReplicationFactor, VF, DemandedDstElts,
CostKind);
1043 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1051 assert((
I ==
nullptr ||
I->getOpcode() == Opcode) &&
1052 "Opcode should reflect passed instruction.");
1055 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1064 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1069 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1072 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
1074 "TTI should not produce negative costs!");
1079 unsigned Opcode,
Type *DataTy,
const Value *
Ptr,
bool VariableMask,
1082 Opcode, DataTy,
Ptr, VariableMask, Alignment,
CostKind,
I);
1083 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1090 bool UseMaskForCond,
bool UseMaskForGaps)
const {
1093 UseMaskForCond, UseMaskForGaps);
1094 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1102 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1111 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1116 return TTIImpl->getNumberOfParts(Tp);
1123 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1129 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1134 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1138 unsigned Opcode,
VectorType *Ty, std::optional<FastMathFlags> FMF,
1141 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF,
CostKind);
1142 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1150 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF,
CostKind);
1151 assert(
Cost >= 0 &&
"TTI should not produce negative costs!");
1158 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1165 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty,
CostKind);
1170 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1175 return TTIImpl->getTgtMemIntrinsic(Inst,
Info);
1179 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1184 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1189 unsigned DestAddrSpace,
unsigned SrcAlign,
unsigned DestAlign,
1190 std::optional<uint32_t> AtomicElementSize)
const {
1191 return TTIImpl->getMemcpyLoopLoweringType(
Context,
Length, SrcAddrSpace,
1192 DestAddrSpace, SrcAlign, DestAlign,
1198 unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
1199 unsigned SrcAlign,
unsigned DestAlign,
1200 std::optional<uint32_t> AtomicCpySize)
const {
1201 TTIImpl->getMemcpyLoopResidualLoweringType(
1202 OpsOut,
Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1203 DestAlign, AtomicCpySize);
1208 return TTIImpl->areInlineCompatible(Caller, Callee);
1214 unsigned DefaultCallPenalty)
const {
1215 return TTIImpl->getInlineCallPenalty(
F, Call, DefaultCallPenalty);
1221 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1226 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1231 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1235 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1239 return TTIImpl->isLegalToVectorizeLoad(LI);
1243 return TTIImpl->isLegalToVectorizeStore(SI);
1247 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1248 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1253 unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace)
const {
1254 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1260 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1264 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1269 unsigned ChainSizeInBytes,
1271 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1276 unsigned ChainSizeInBytes,
1278 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1283 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1288 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1292 return TTIImpl->preferEpilogueVectorization();
1297 return TTIImpl->getVPLegalizationStrategy(VPI);
1301 return TTIImpl->hasArmWideBranch(Thumb);
1305 return TTIImpl->getMaxNumArgs();
1309 return TTIImpl->shouldExpandReduction(II);
1313 return TTIImpl->getGISelRematGlobalCost();
1317 return TTIImpl->getMinTripCountTailFoldingThreshold();
1321 return TTIImpl->supportsScalableVectors();
1325 return TTIImpl->enableScalableVectorization();
1329 Align Alignment)
const {
1330 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1339 : TTICallback(
std::
move(TTICallback)) {}
1343 return TTICallback(
F);
1349 return Result(
F.getParent()->getDataLayout());
1354 "Target Transform Information",
false,
true)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static cl::opt< bool > ForceNestedLoop("force-nested-hardware-loop", cl::Hidden, cl::init(false), cl::desc("Force allowance of nested hardware loops"))
static cl::opt< bool > ForceHardwareLoopPHI("force-hardware-loop-phi", cl::Hidden, cl::init(false), cl::desc("Force hardware loop counter to be updated through a phi"))
This file provides various utilities for inspecting and working with the control flow graph in LLVM I...
mir Rename Register Operands
Module.h This file contains the declarations for the Module class.
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static SymbolRef::Type getType(const Symbol *Sym)
Class for arbitrary precision integers.
an instruction to allocate memory on the stack
A container for analyses that lazily runs them and caches their results.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
LLVMContext & getContext() const
Get the context in which this basic block lives.
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Conditional or Unconditional Branch instruction.
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Function * getCalledFunction() const
Returns the function called, or null if this is an indirect function invocation or the function signa...
User::op_iterator arg_begin()
Return the iterator pointing to the beginning of the argument list.
User::op_iterator arg_end()
Return the iterator pointing to the end of the argument list.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
This is an important base class in LLVM.
A parsed version of the target data layout string in and methods for querying it.
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
bool dominates(const BasicBlock *BB, const Use &U) const
Return true if the (end of the) basic block BB dominates the use U.
Convenience struct for specifying and reasoning about fast-math flags.
Class to represent function types.
param_iterator param_begin() const
param_iterator param_end() const
FunctionType * getFunctionType() const
Returns the FunctionType for me.
ImmutablePass class - This class is used to provide information that does not need to be run.
The core instruction combiner logic.
unsigned getBitWidth() const
Get the number of bits in this IntegerType.
IntrinsicCostAttributes(Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarCost=InstructionCost::getInvalid(), bool TypeBasedOnly=false)
A wrapper class for inspecting calls to intrinsic functions.
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
This is an important class for using LLVM in a threaded context.
An instruction for reading from memory.
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
BlockT * getHeader() const
bool isLoopLatch(const BlockT *BB) const
Wrapper class to LoopBlocksDFS that provides a standard begin()/end() interface for the DFS reverse p...
void perform(const LoopInfo *LI)
Traverse the loop blocks and store the DFS result.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
Represents a single loop in the control flow graph.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Analysis providing profile information.
The RecurrenceDescriptor is used to identify recurrences variables in a loop.
This class represents a constant integer value.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
uint64_t getTypeSizeInBits(Type *Ty) const
Return the size in bits of the specified type, for which isSCEVable must return true.
bool isLoopInvariant(const SCEV *S, const Loop *L)
Return true if the value of the given SCEV is unchanging in the specified loop.
const SCEV * getExitCount(const Loop *L, const BasicBlock *ExitingBlock, ExitCountKind Kind=Exact)
Return the number of times the backedge executes before the given exit would be taken; if not exactly...
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
An instruction for storing to memory.
Analysis pass providing the TargetTransformInfo.
Result run(const Function &F, FunctionAnalysisManager &)
TargetTransformInfo Result
TargetIRAnalysis()
Default construct a target IR analysis.
Provides information about what library functions are available for the current target.
bool getLibFunc(StringRef funcName, LibFunc &F) const
Searches for a particular function name.
StringRef getName(LibFunc F) const
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const
The instances of the Type class are immutable: once they are created, they are never changed.
static IntegerType * getInt32Ty(LLVMContext &C)
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
This is the common base class for vector predication intrinsics.
LLVM Value Representation.
Base class of all SIMD vector types.
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
@ Fast
Attempts to make calls as fast as possible (e.g.
@ C
The default llvm calling convention, compatible with C.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
void initializeTargetTransformInfoWrapperPassPass(PassRegistry &)
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
ImmutablePass * createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA)
Create an analysis pass wrapper around a TTI object.
constexpr unsigned BitWidth
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
auto predecessors(const MachineBasicBlock *BB)
Implement std::hash so that hash_code can be used in STL containers.
This struct is a compact representation of a valid (non-zero power of two) alignment.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Attributes of a target dependent hardware loop.
bool canAnalyze(LoopInfo &LI)
HardwareLoopInfo()=delete
bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI, DominatorTree &DT, bool ForceNestedLoop=false, bool ForceHardwareLoopPHI=false)
Information about a load/store intrinsic defined by the target.