LLVM 22.0.0git
llvm::SIRegisterInfo::SpilledReg Struct Reference

#include "Target/AMDGPU/SIRegisterInfo.h"

Public Member Functions

 SpilledReg ()=default
 SpilledReg (Register R, int L)
bool hasLane ()
bool hasReg ()

Public Attributes

Register VGPR
int Lane = -1

Detailed Description

Definition at line 64 of file SIRegisterInfo.h.

Constructor & Destructor Documentation

◆ SpilledReg() [1/2]

llvm::SIRegisterInfo::SpilledReg::SpilledReg ( )
default

◆ SpilledReg() [2/2]

llvm::SIRegisterInfo::SpilledReg::SpilledReg ( Register R,
int L )
inline

Definition at line 69 of file SIRegisterInfo.h.

References Lane, and VGPR.

Member Function Documentation

◆ hasLane()

bool llvm::SIRegisterInfo::SpilledReg::hasLane ( )
inline

Definition at line 71 of file SIRegisterInfo.h.

References Lane.

◆ hasReg()

bool llvm::SIRegisterInfo::SpilledReg::hasReg ( )
inline

Definition at line 72 of file SIRegisterInfo.h.

References VGPR.

Member Data Documentation

◆ Lane

int llvm::SIRegisterInfo::SpilledReg::Lane = -1

Definition at line 66 of file SIRegisterInfo.h.

Referenced by hasLane(), and SpilledReg().

◆ VGPR

Register llvm::SIRegisterInfo::SpilledReg::VGPR

Definition at line 65 of file SIRegisterInfo.h.

Referenced by hasReg(), and SpilledReg().


The documentation for this struct was generated from the following file: