LLVM 19.0.0git
llvm::AMDGPUCallLowering Member List

This is the complete list of members for llvm::AMDGPUCallLowering, including all inherited members.

addArgFlagsFromAttributes(ISD::ArgFlagsTy &Flags, const AttributeList &Attrs, unsigned OpIdx) constllvm::CallLoweringprotected
AMDGPUCallLowering(const AMDGPUTargetLowering &TLI)llvm::AMDGPUCallLowering
areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &OutArgs) constllvm::AMDGPUCallLowering
CallLowering(const TargetLowering *TLI)llvm::CallLoweringinline
CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg)llvm::AMDGPUCallLoweringstatic
CCAssignFnForReturn(CallingConv::ID CC, bool IsVarArg)llvm::AMDGPUCallLoweringstatic
checkReturn(CCState &CCInfo, SmallVectorImpl< BaseArgInfo > &Outs, CCAssignFn *Fn) constllvm::CallLowering
checkReturnTypeForCallConv(MachineFunction &MF) constllvm::CallLowering
determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool IsVarArg, ArrayRef< Register > ThisReturnRegs=std::nullopt) constllvm::CallLoweringprotected
determineAssignments(ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) constllvm::CallLoweringprotected
doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs) constllvm::AMDGPUCallLowering
enableBigEndian() constllvm::CallLoweringinlinevirtual
fallBackToDAGISel(const MachineFunction &MF) constllvm::CallLoweringinlinevirtual
getAttributesForArgIdx(const CallBase &Call, unsigned ArgIdx) constllvm::CallLoweringprotected
getAttributesForReturn(const CallBase &Call) constllvm::CallLoweringprotected
getReturnInfo(CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs, SmallVectorImpl< BaseArgInfo > &Outs, const DataLayout &DL) constllvm::CallLowering
getTLI() constllvm::CallLoweringinlineprotected
getTLI() constllvm::CallLoweringinlineprotected
handleAssignments(ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs=std::nullopt) constllvm::CallLoweringprotected
handleImplicitCallArguments(MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI, CallingConv::ID CalleeCC, ArrayRef< std::pair< MCRegister, Register > > ImplicitArgRegs) constllvm::AMDGPUCallLowering
insertSRetIncomingArgument(const Function &F, SmallVectorImpl< ArgInfo > &SplitArgs, Register &DemoteReg, MachineRegisterInfo &MRI, const DataLayout &DL) constllvm::CallLowering
insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg, int FI) constllvm::CallLowering
insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder, const CallBase &CB, CallLoweringInfo &Info) constllvm::CallLowering
insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg) constllvm::CallLowering
isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &InArgs, SmallVectorImpl< ArgInfo > &OutArgs) constllvm::AMDGPUCallLowering
isTypeIsValidForThisReturn(EVT Ty) constllvm::CallLoweringinlinevirtual
lowerCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const overridellvm::AMDGPUCallLoweringvirtual
llvm::CallLowering::lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &Call, ArrayRef< Register > ResRegs, ArrayRef< ArrayRef< Register > > ArgRegs, Register SwiftErrorVReg, std::function< unsigned()> GetCalleeReg) constllvm::CallLowering
lowerChainCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) constllvm::AMDGPUCallLowering
lowerFormalArguments(MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register > > VRegs, FunctionLoweringInfo &FLI) const overridellvm::AMDGPUCallLoweringvirtual
lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register > > VRegs) constllvm::AMDGPUCallLowering
lowerReturn(MachineIRBuilder &B, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const overridellvm::AMDGPUCallLoweringvirtual
llvm::CallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI, Register SwiftErrorVReg) constllvm::CallLoweringinlinevirtual
lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &OutArgs) constllvm::AMDGPUCallLowering
parametersInCSRMatch(const MachineRegisterInfo &MRI, const uint32_t *CallerPreservedMask, const SmallVectorImpl< CCValAssign > &ArgLocs, const SmallVectorImpl< ArgInfo > &OutVals) constllvm::CallLoweringprotected
passSpecialInputs(MachineIRBuilder &MIRBuilder, CCState &CCInfo, SmallVectorImpl< std::pair< MCRegister, Register > > &ArgRegs, CallLoweringInfo &Info) constllvm::AMDGPUCallLowering
resultsCompatible(CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs, ValueAssigner &CalleeAssigner, ValueAssigner &CallerAssigner) constllvm::CallLoweringprotected
setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) constllvm::CallLoweringprotected
splitToValueTypes(const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) constllvm::CallLoweringprotected
supportSwiftError() constllvm::CallLoweringinlinevirtual
~CallLowering()=defaultllvm::CallLoweringvirtual