LLVM  16.0.0git
Public Member Functions | Static Public Member Functions | List of all members
llvm::AMDGPUCallLowering Class Referencefinal

#include "Target/AMDGPU/AMDGPUCallLowering.h"

Inheritance diagram for llvm::AMDGPUCallLowering:
Inheritance graph
Collaboration diagram for llvm::AMDGPUCallLowering:
Collaboration graph

Public Member Functions

 AMDGPUCallLowering (const AMDGPUTargetLowering &TLI)
bool lowerReturn (MachineIRBuilder &B, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI) const override
 This hook behaves as the extended lowerReturn function, but for targets that do not support swifterror value promotion. More...
bool lowerFormalArgumentsKernel (MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register >> VRegs) const
bool lowerFormalArguments (MachineIRBuilder &B, const Function &F, ArrayRef< ArrayRef< Register >> VRegs, FunctionLoweringInfo &FLI) const override
 This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel. More...
bool passSpecialInputs (MachineIRBuilder &MIRBuilder, CCState &CCInfo, SmallVectorImpl< std::pair< MCRegister, Register >> &ArgRegs, CallLoweringInfo &Info) const
bool doCallerAndCalleePassArgsTheSameWay (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs) const
bool areCalleeOutgoingArgsTailCallable (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &OutArgs) const
bool isEligibleForTailCallOptimization (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &InArgs, SmallVectorImpl< ArgInfo > &OutArgs) const
 Returns true if the call can be lowered as a tail call. More...
void handleImplicitCallArguments (MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst, const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI, ArrayRef< std::pair< MCRegister, Register >> ImplicitArgRegs) const
bool lowerTailCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, SmallVectorImpl< ArgInfo > &OutArgs) const
bool lowerCall (MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info) const override
 This hook must be implemented to lower the given call instruction, including argument and return value marshalling. More...
- Public Member Functions inherited from llvm::CallLowering
 CallLowering (const TargetLowering *TLI)
virtual ~CallLowering ()=default
virtual bool supportSwiftError () const
void insertSRetLoads (MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg, int FI) const
 Load the returned value from the stack into virtual registers in VRegs. More...
void insertSRetStores (MachineIRBuilder &MIRBuilder, Type *RetTy, ArrayRef< Register > VRegs, Register DemoteReg) const
 Store the return value given by VRegs into stack starting at the offset specified in DemoteReg. More...
void insertSRetIncomingArgument (const Function &F, SmallVectorImpl< ArgInfo > &SplitArgs, Register &DemoteReg, MachineRegisterInfo &MRI, const DataLayout &DL) const
 Insert the hidden sret ArgInfo to the beginning of SplitArgs. More...
void insertSRetOutgoingArgument (MachineIRBuilder &MIRBuilder, const CallBase &CB, CallLoweringInfo &Info) const
 For the call-base described by CB, insert the hidden sret ArgInfo to the OrigArgs field of Info. More...
bool checkReturn (CCState &CCInfo, SmallVectorImpl< BaseArgInfo > &Outs, CCAssignFn *Fn) const
void getReturnInfo (CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs, SmallVectorImpl< BaseArgInfo > &Outs, const DataLayout &DL) const
 Get the type and the ArgFlags for the split components of RetTy as returned by ComputeValueVTs. More...
bool checkReturnTypeForCallConv (MachineFunction &MF) const
 Toplevel function to check the return type based on the target calling convention. More...
virtual bool lowerReturn (MachineIRBuilder &MIRBuilder, const Value *Val, ArrayRef< Register > VRegs, FunctionLoweringInfo &FLI, Register SwiftErrorVReg) const
 This hook must be implemented to lower outgoing return values, described by Val, into the specified virtual registers VRegs. More...
virtual bool fallBackToDAGISel (const MachineFunction &MF) const
bool lowerCall (MachineIRBuilder &MIRBuilder, const CallBase &Call, ArrayRef< Register > ResRegs, ArrayRef< ArrayRef< Register >> ArgRegs, Register SwiftErrorVReg, std::function< unsigned()> GetCalleeReg) const
 Lower the given call instruction, including argument and return value marshalling. More...
virtual bool enableBigEndian () const
 For targets which want to use big-endian can enable it with enableBigEndian() hook. More...
virtual bool isTypeIsValidForThisReturn (EVT Ty) const
 For targets which support the "returned" parameter attribute, returns true if the given type is a valid one to use with "returned". More...

Static Public Member Functions

static CCAssignFnCCAssignFnForCall (CallingConv::ID CC, bool IsVarArg)
static CCAssignFnCCAssignFnForReturn (CallingConv::ID CC, bool IsVarArg)

Additional Inherited Members

- Protected Member Functions inherited from llvm::CallLowering
const TargetLoweringgetTLI () const
 Getter for generic TargetLowering class. More...
template<class XXXTargetLowering >
const XXXTargetLowering * getTLI () const
 Getter for target specific TargetLowering class. More...
ISD::ArgFlagsTy getAttributesForArgIdx (const CallBase &Call, unsigned ArgIdx) const
void addArgFlagsFromAttributes (ISD::ArgFlagsTy &Flags, const AttributeList &Attrs, unsigned OpIdx) const
 Adds flags to Flags based off of the attributes in Attrs. More...
template<typename FuncInfoTy >
void setArgFlags (ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
void splitToValueTypes (const ArgInfo &OrigArgInfo, SmallVectorImpl< ArgInfo > &SplitArgs, const DataLayout &DL, CallingConv::ID CallConv, SmallVectorImpl< uint64_t > *Offsets=nullptr) const
 Break OrigArgInfo into one or more pieces the calling convention can process, returned in SplitArgs. More...
bool determineAssignments (ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, CCState &CCInfo) const
 Analyze the argument list in Args, using Assigner to populate CCInfo. More...
bool determineAndHandleAssignments (ValueHandler &Handler, ValueAssigner &Assigner, SmallVectorImpl< ArgInfo > &Args, MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, bool IsVarArg, ArrayRef< Register > ThisReturnRegs=None) const
 Invoke ValueAssigner::assignArg on each of the given Args and then use Handler to move them to the assigned locations. More...
bool handleAssignments (ValueHandler &Handler, SmallVectorImpl< ArgInfo > &Args, CCState &CCState, SmallVectorImpl< CCValAssign > &ArgLocs, MachineIRBuilder &MIRBuilder, ArrayRef< Register > ThisReturnRegs=None) const
 Use Handler to insert code to handle the argument/return values represented by Args. More...
bool parametersInCSRMatch (const MachineRegisterInfo &MRI, const uint32_t *CallerPreservedMask, const SmallVectorImpl< CCValAssign > &ArgLocs, const SmallVectorImpl< ArgInfo > &OutVals) const
 Check whether parameters to a call that are passed in callee saved registers are the same as from the calling function. More...
bool resultsCompatible (CallLoweringInfo &Info, MachineFunction &MF, SmallVectorImpl< ArgInfo > &InArgs, ValueAssigner &CalleeAssigner, ValueAssigner &CallerAssigner) const

Detailed Description

Definition at line 26 of file AMDGPUCallLowering.h.

Constructor & Destructor Documentation

◆ AMDGPUCallLowering()

AMDGPUCallLowering::AMDGPUCallLowering ( const AMDGPUTargetLowering TLI)

Definition at line 248 of file AMDGPUCallLowering.cpp.

Member Function Documentation

◆ areCalleeOutgoingArgsTailCallable()

bool AMDGPUCallLowering::areCalleeOutgoingArgsTailCallable ( CallLoweringInfo Info,
MachineFunction MF,
SmallVectorImpl< ArgInfo > &  OutArgs 
) const

◆ CCAssignFnForCall()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForCall ( CallingConv::ID  CC,
bool  IsVarArg 

◆ CCAssignFnForReturn()

CCAssignFn * AMDGPUCallLowering::CCAssignFnForReturn ( CallingConv::ID  CC,
bool  IsVarArg 

◆ doCallerAndCalleePassArgsTheSameWay()

bool AMDGPUCallLowering::doCallerAndCalleePassArgsTheSameWay ( CallLoweringInfo Info,
MachineFunction MF,
SmallVectorImpl< ArgInfo > &  InArgs 
) const

◆ handleImplicitCallArguments()

void AMDGPUCallLowering::handleImplicitCallArguments ( MachineIRBuilder MIRBuilder,
MachineInstrBuilder CallInst,
const GCNSubtarget ST,
const SIMachineFunctionInfo MFI,
ArrayRef< std::pair< MCRegister, Register >>  ImplicitArgRegs 
) const

◆ isEligibleForTailCallOptimization()

bool AMDGPUCallLowering::isEligibleForTailCallOptimization ( MachineIRBuilder MIRBuilder,
CallLoweringInfo Info,
SmallVectorImpl< ArgInfo > &  InArgs,
SmallVectorImpl< ArgInfo > &  OutArgs 
) const

◆ lowerCall()

bool AMDGPUCallLowering::lowerCall ( MachineIRBuilder MIRBuilder,
CallLoweringInfo Info 
) const

◆ lowerFormalArguments()

bool AMDGPUCallLowering::lowerFormalArguments ( MachineIRBuilder MIRBuilder,
const Function F,
ArrayRef< ArrayRef< Register >>  VRegs,
FunctionLoweringInfo FLI 
) const

This hook must be implemented to lower the incoming (formal) arguments, described by VRegs, for GlobalISel.

Each argument must end up in the related virtual registers described by VRegs. In other words, the first argument should end up in VRegs[0], the second in VRegs[1], and so on. For each argument, there will be one register for each non-aggregate type, as returned by computeValueLLTs. MIRBuilder is set to the proper insertion for the argument lowering. FLI is required for sret demotion.

True if the lowering succeeded, false otherwise.

Reimplemented from llvm::CallLowering.

Definition at line 563 of file AMDGPUCallLowering.cpp.

References llvm::MachineFunction::addLiveIn(), llvm::CCState::AllocateReg(), llvm::SITargetLowering::allocateSpecialInputSGPRs(), llvm::SITargetLowering::allocateSpecialInputVGPRsFixed(), llvm::SITargetLowering::allocateSystemSGPRs(), llvm::CallingConv::AMDGPU_KERNEL, llvm::CallingConv::AMDGPU_PS, Arg, B, llvm::MachineBasicBlock::begin(), llvm::FunctionLoweringInfo::CanLowerReturn, CC, llvm::AMDGPUTargetLowering::CCAssignFnForCall(), llvm::countTrailingZeros(), llvm::FunctionLoweringInfo::DemoteRegister, llvm::CallLowering::determineAssignments(), DL, llvm::MachineBasicBlock::empty(), F, llvm::AttributeList::FirstArgIndex, llvm::MachineFunction::getInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::CallLowering::handleAssignments(), Info, llvm::CallLowering::insertSRetIncomingArgument(), llvm::AMDGPU::isEntryFunctionCC(), llvm::AMDGPU::isGraphics(), lowerFormalArgumentsKernel(), MBB, MRI, llvm::CallLowering::setArgFlags(), llvm::CallLowering::splitToValueTypes(), llvm::CallLowering::ValueAssigner::StackOffset, TRI, and llvm::ZB_Undefined.

◆ lowerFormalArgumentsKernel()

bool AMDGPUCallLowering::lowerFormalArgumentsKernel ( MachineIRBuilder B,
const Function F,
ArrayRef< ArrayRef< Register >>  VRegs 
) const

◆ lowerReturn()

bool AMDGPUCallLowering::lowerReturn ( MachineIRBuilder MIRBuilder,
const Value Val,
ArrayRef< Register VRegs,
FunctionLoweringInfo FLI 
) const

◆ lowerTailCall()

bool AMDGPUCallLowering::lowerTailCall ( MachineIRBuilder MIRBuilder,
CallLoweringInfo Info,
SmallVectorImpl< ArgInfo > &  OutArgs 
) const

◆ passSpecialInputs()

bool AMDGPUCallLowering::passSpecialInputs ( MachineIRBuilder MIRBuilder,
CCState CCInfo,
SmallVectorImpl< std::pair< MCRegister, Register >> &  ArgRegs,
CallLoweringInfo Info 
) const

Definition at line 739 of file AMDGPUCallLowering.cpp.

References llvm::CCState::AllocateReg(), assert(), llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildOr(), llvm::MachineIRBuilder::buildShl(), llvm::MachineIRBuilder::buildUndef(), llvm::ArgDescriptor::createArg(), llvm::MachineRegisterInfo::createGenericVirtualRegister(), llvm::dbgs(), llvm::AMDGPUFunctionArgInfo::DISPATCH_ID, llvm::AMDGPUFunctionArgInfo::DISPATCH_PTR, llvm::AMDGPUArgumentUsageInfo::FixedABIFunctionInfo, llvm::SIMachineFunctionInfo::getArgInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPUMachineFunction::getLDSKernelIdMetadata(), llvm::MachineIRBuilder::getMF(), llvm::AMDGPUFunctionArgInfo::getPreloadedValue(), llvm::MachineInstrBuilder::getReg(), llvm::MachineFunction::getRegInfo(), llvm::ArgDescriptor::getRegister(), llvm::MachineFunction::getSubtarget(), I, llvm::AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR, Info, llvm::ArgDescriptor::isMasked(), llvm::ArgDescriptor::isRegister(), llvm::AMDGPUFunctionArgInfo::LDS_KERNEL_ID, LLVM_DEBUG, MRI, llvm::AMDGPUFunctionArgInfo::QUEUE_PTR, llvm::report_fatal_error(), llvm::LLT::scalar(), llvm::ARM_MB::ST, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_X, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKGROUP_ID_Z, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_X, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Y, llvm::AMDGPUFunctionArgInfo::WORKITEM_ID_Z, llvm::AMDGPUFunctionArgInfo::WorkItemIDX, llvm::AMDGPUFunctionArgInfo::WorkItemIDY, llvm::AMDGPUFunctionArgInfo::WorkItemIDZ, Y, and llvm::ARCCC::Z.

Referenced by lowerCall(), and lowerTailCall().

The documentation for this class was generated from the following files: