LLVM  16.0.0git
llvm::ARMBankConflictHazardRecognizer Member List

This is the complete list of members for llvm::ARMBankConflictHazardRecognizer, including all inherited members.

AdvanceCycle() overridellvm::ARMBankConflictHazardRecognizervirtual
ARMBankConflictHazardRecognizer(const ScheduleDAG *DAG, int64_t DDM, bool ABC)llvm::ARMBankConflictHazardRecognizer
atIssueLimit() constllvm::ScheduleHazardRecognizerinlinevirtual
EmitInstruction(SUnit *SU) overridellvm::ARMBankConflictHazardRecognizervirtual
llvm::ScheduleHazardRecognizer::EmitInstruction(MachineInstr *)llvm::ScheduleHazardRecognizerinlinevirtual
EmitNoop()llvm::ScheduleHazardRecognizerinlinevirtual
EmitNoops(unsigned Quantity)llvm::ScheduleHazardRecognizerinlinevirtual
getHazardType(SUnit *SU, int Stalls) overridellvm::ARMBankConflictHazardRecognizervirtual
getMaxLookAhead() constllvm::ScheduleHazardRecognizerinline
Hazard enum valuellvm::ScheduleHazardRecognizer
HazardType enum namellvm::ScheduleHazardRecognizer
isEnabled() constllvm::ScheduleHazardRecognizerinline
MaxLookAheadllvm::ScheduleHazardRecognizerprotected
NoHazard enum valuellvm::ScheduleHazardRecognizer
NoopHazard enum valuellvm::ScheduleHazardRecognizer
PreEmitNoops(SUnit *)llvm::ScheduleHazardRecognizerinlinevirtual
PreEmitNoops(MachineInstr *)llvm::ScheduleHazardRecognizerinlinevirtual
RecedeCycle() overridellvm::ARMBankConflictHazardRecognizervirtual
Reset() overridellvm::ARMBankConflictHazardRecognizervirtual
ScheduleHazardRecognizer()=defaultllvm::ScheduleHazardRecognizer
ShouldPreferAnother(SUnit *)llvm::ScheduleHazardRecognizerinlinevirtual
~ScheduleHazardRecognizer()llvm::ScheduleHazardRecognizervirtual