#include "Target/ARM/ARMHazardRecognizer.h"
Public Member Functions | |
| ARMBankConflictHazardRecognizer (const ScheduleDAG *DAG, int64_t DDM, bool ABC) | |
| HazardType | getHazardType (SUnit *SU, int Stalls) override |
| getHazardType - Return the hazard type of emitting this node. | |
| void | Reset () override |
| Reset - This callback is invoked when a new block of instructions is about to be schedule. | |
| void | EmitInstruction (SUnit *SU) override |
| EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard state. | |
| void | AdvanceCycle () override |
| AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. | |
| void | RecedeCycle () override |
| RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. | |
 Public Member Functions inherited from llvm::ScheduleHazardRecognizer | |
| ScheduleHazardRecognizer ()=default | |
| virtual | ~ScheduleHazardRecognizer () |
| unsigned | getMaxLookAhead () const |
| bool | isEnabled () const |
| virtual bool | atIssueLimit () const |
| atIssueLimit - Return true if no more instructions may be issued in this cycle. | |
| virtual HazardType | getHazardType (SUnit *, int Stalls=0) |
| getHazardType - Return the hazard type of emitting this node. | |
| virtual void | Reset () |
| Reset - This callback is invoked when a new block of instructions is about to be schedule. | |
| virtual void | EmitInstruction (SUnit *) |
| EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard state. | |
| virtual void | EmitInstruction (MachineInstr *) |
| This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits. | |
| virtual unsigned | PreEmitNoops (SUnit *) |
| PreEmitNoops - This callback is invoked prior to emitting an instruction. | |
| virtual unsigned | PreEmitNoops (MachineInstr *) |
| This overload will be used when the hazard recognizer is being used by a non-scheduling pass, which does not use SUnits. | |
| virtual bool | ShouldPreferAnother (SUnit *) |
| ShouldPreferAnother - This callback may be invoked if getHazardType returns NoHazard. | |
| virtual void | AdvanceCycle () |
| AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. | |
| virtual void | RecedeCycle () |
| RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts. | |
| virtual void | EmitNoop () |
| EmitNoop - This callback is invoked when a noop was added to the instruction stream. | |
| virtual void | EmitNoops (unsigned Quantity) |
| EmitNoops - This callback is invoked when noops were added to the instruction stream. | |
Additional Inherited Members | |
| Public Types inherited from llvm::ScheduleHazardRecognizer | |
| enum | HazardType { NoHazard , Hazard , NoopHazard } |
| Protected Attributes inherited from llvm::ScheduleHazardRecognizer | |
| unsigned | MaxLookAhead = 0 |
| MaxLookAhead - Indicate the number of cycles in the scoreboard state. | |
Detailed Description
Definition at line 46 of file ARMHazardRecognizer.h.
Constructor & Destructor Documentation
◆ ARMBankConflictHazardRecognizer()
| ARMBankConflictHazardRecognizer::ARMBankConflictHazardRecognizer | ( | const ScheduleDAG * | DAG, |
| int64_t | DDM, | ||
| bool | ABC | ||
| ) |
Definition at line 167 of file ARMHazardRecognizer.cpp.
References llvm::ScheduleHazardRecognizer::MaxLookAhead.
Member Function Documentation
◆ AdvanceCycle()
|
overridevirtual |
AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.
This should increment the internal state of the hazard recognizer so that previously "Hazard" instructions will now not be hazards.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 268 of file ARMHazardRecognizer.cpp.
◆ EmitInstruction()
|
overridevirtual |
EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard state.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 256 of file ARMHazardRecognizer.cpp.
References llvm::SUnit::getInstr(), llvm::LocationSize::getValue(), llvm::LocationSize::hasValue(), and MI.
◆ getHazardType()
|
overridevirtual |
getHazardType - Return the hazard type of emitting this node.
There are three possible results. Either:
- NoHazard: it is legal to issue this instruction on this cycle.
- Hazard: issuing this instruction would stall the machine. If some other instruction is available, issue it first.
- NoopHazard: issuing this instruction would break the program. If some other instruction can be issued, do so, otherwise issue a noop.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 184 of file ARMHazardRecognizer.cpp.
References llvm::PseudoSourceValue::FixedStack, getBaseOffset(), llvm::MachineFunction::getFrameInfo(), llvm::SUnit::getInstr(), llvm::MachineInstr::getNumMemOperands(), llvm::MachineFrameInfo::getObjectOffset(), llvm::GetPointerBaseWithConstantOffset(), llvm::MachineOperand::getReg(), llvm::ScheduleHazardRecognizer::Hazard, llvm::Register::id(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::MachineInstr::memoperands(), and llvm::ScheduleHazardRecognizer::NoHazard.
◆ RecedeCycle()
|
overridevirtual |
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot issue in the current cycle, either because of latency or resource conflicts.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 270 of file ARMHazardRecognizer.cpp.
◆ Reset()
|
overridevirtual |
Reset - This callback is invoked when a new block of instructions is about to be schedule.
The hazard state should be set to an initialized state.
Reimplemented from llvm::ScheduleHazardRecognizer.
Definition at line 254 of file ARMHazardRecognizer.cpp.
The documentation for this class was generated from the following files:
- lib/Target/ARM/ARMHazardRecognizer.h
- lib/Target/ARM/ARMHazardRecognizer.cpp
