LLVM 20.0.0git
llvm::HexagonConvergingVLIWScheduler Member List

This is the complete list of members for llvm::HexagonConvergingVLIWScheduler, including all inherited members.

BestCost enum valuellvm::ConvergingVLIWSchedulerprotected
Botllvm::ConvergingVLIWSchedulerprotected
BotQID enum valuellvm::ConvergingVLIWScheduler
CandResult enum namellvm::ConvergingVLIWSchedulerprotected
ConvergingVLIWScheduler()llvm::ConvergingVLIWSchedulerinline
createVLIWResourceModel(const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const overridellvm::HexagonConvergingVLIWSchedulerprotectedvirtual
DAGllvm::ConvergingVLIWSchedulerprotected
doMBBSchedRegionsTopDown() constllvm::MachineSchedStrategyinlinevirtual
dumpPolicy() constllvm::MachineSchedStrategyinlinevirtual
enterMBB(MachineBasicBlock *MBB)llvm::MachineSchedStrategyinlinevirtual
HighPressureSetsllvm::ConvergingVLIWSchedulerprotected
initialize(ScheduleDAGMI *dag) overridellvm::ConvergingVLIWSchedulervirtual
initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)llvm::MachineSchedStrategyinlinevirtual
leaveMBB()llvm::MachineSchedStrategyinlinevirtual
LogMaxQID enum valuellvm::ConvergingVLIWScheduler
MultiPressure enum valuellvm::ConvergingVLIWSchedulerprotected
NoCand enum valuellvm::ConvergingVLIWSchedulerprotected
NodeOrder enum valuellvm::ConvergingVLIWSchedulerprotected
pickNode(bool &IsTopNode) overridellvm::ConvergingVLIWSchedulervirtual
pickNodeBidrectional(bool &IsTopNode)llvm::ConvergingVLIWSchedulerprotected
pickNodeFromQueue(VLIWSchedBoundary &Zone, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)llvm::ConvergingVLIWSchedulerprotected
pressureChange(const SUnit *SU, bool isBotUp)llvm::ConvergingVLIWSchedulerprotected
PriorityOnellvm::ConvergingVLIWSchedulerprotectedstatic
PriorityThreellvm::ConvergingVLIWSchedulerprotectedstatic
PriorityTwollvm::ConvergingVLIWSchedulerprotectedstatic
readyQueueVerboseDump(const RegPressureTracker &RPTracker, SchedCandidate &Candidate, ReadyQueue &Q)llvm::ConvergingVLIWSchedulerprotected
registerRoots()llvm::MachineSchedStrategyinlinevirtual
releaseBottomNode(SUnit *SU) overridellvm::ConvergingVLIWSchedulervirtual
releaseTopNode(SUnit *SU) overridellvm::ConvergingVLIWSchedulervirtual
reportPackets()llvm::ConvergingVLIWSchedulerinline
ScaleTwollvm::ConvergingVLIWSchedulerprotectedstatic
SchedModelllvm::ConvergingVLIWSchedulerprotected
schedNode(SUnit *SU, bool IsTopNode) overridellvm::ConvergingVLIWSchedulervirtual
scheduleTree(unsigned SubtreeID)llvm::MachineSchedStrategyinlinevirtual
SchedulingCost(ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate, RegPressureDelta &Delta, bool verbose) overridellvm::HexagonConvergingVLIWSchedulerprotectedvirtual
shouldTrackLaneMasks() constllvm::MachineSchedStrategyinlinevirtual
shouldTrackPressure() constllvm::MachineSchedStrategyinlinevirtual
SingleCritical enum valuellvm::ConvergingVLIWSchedulerprotected
SingleExcess enum valuellvm::ConvergingVLIWSchedulerprotected
SingleMax enum valuellvm::ConvergingVLIWSchedulerprotected
Topllvm::ConvergingVLIWSchedulerprotected
TopQID enum valuellvm::ConvergingVLIWScheduler
traceCandidate(const char *Label, const ReadyQueue &Q, SUnit *SU, int Cost, PressureChange P=PressureChange())llvm::ConvergingVLIWSchedulerprotected
Weak enum valuellvm::ConvergingVLIWSchedulerprotected
~ConvergingVLIWScheduler()=defaultllvm::ConvergingVLIWSchedulervirtual
~MachineSchedStrategy()=defaultllvm::MachineSchedStrategyvirtual