LLVM  13.0.0git
llvm::MipsSEInstrInfo Member List

This is the complete list of members for llvm::MipsSEInstrInfo, including all inherited members.

adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const overridellvm::MipsSEInstrInfovirtual
analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const overridellvm::MipsInstrInfo
analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) constllvm::MipsInstrInfo
BranchType enum namellvm::MipsInstrInfo
BT_Cond enum valuellvm::MipsInstrInfo
BT_CondUncond enum valuellvm::MipsInstrInfo
BT_Indirect enum valuellvm::MipsInstrInfo
BT_NoBranch enum valuellvm::MipsInstrInfo
BT_None enum valuellvm::MipsInstrInfo
BT_Uncond enum valuellvm::MipsInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const overridellvm::MipsSEInstrInfo
create(MipsSubtarget &STI)llvm::MipsInstrInfostatic
decomposeMachineOperandsTargetFlags(unsigned TF) const overridellvm::MipsInstrInfo
describeLoadedValue(const MachineInstr &MI, Register Reg) const overridellvm::MipsInstrInfo
expandPostRAPseudo(MachineInstr &MI) const overridellvm::MipsSEInstrInfo
findCommutedOpIndices(const MachineInstr &MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const overridellvm::MipsInstrInfo
genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) constllvm::MipsInstrInfo
getEquivalentCompactForm(const MachineBasicBlock::iterator I) constllvm::MipsInstrInfo
getInstSizeInBytes(const MachineInstr &MI) const overridellvm::MipsInstrInfo
GetMemOperand(MachineBasicBlock &MBB, int FI, MachineMemOperand::Flags Flags) constllvm::MipsInstrInfoprotected
getOppositeBranchOpc(unsigned Opc) const overridellvm::MipsSEInstrInfovirtual
getRegisterInfo() const overridellvm::MipsSEInstrInfovirtual
getSerializableDirectMachineOperandTargetFlags() const overridellvm::MipsInstrInfo
HasForbiddenSlot(const MachineInstr &MI) constllvm::MipsInstrInfo
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const overridellvm::MipsInstrInfo
insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const overridellvm::MipsInstrInfo
isAddImmediate(const MachineInstr &MI, Register Reg) const overridellvm::MipsInstrInfo
isBranchOffsetInRange(unsigned BranchOpc, int64_t BrOffset) const overridellvm::MipsInstrInfo
isBranchWithImm(unsigned Opc) const overridellvm::MipsSEInstrInfovirtual
isCopyInstrImpl(const MachineInstr &MI) const overridellvm::MipsSEInstrInfoprotected
isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const overridellvm::MipsSEInstrInfo
isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const overridellvm::MipsSEInstrInfo
isZeroImm(const MachineOperand &op) constllvm::MipsInstrInfoprotected
loadImmediate(int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, unsigned *NewImm) constllvm::MipsSEInstrInfo
loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const overridellvm::MipsSEInstrInfovirtual
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const overridellvm::MipsInstrInfoinline
MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc)llvm::MipsInstrInfoexplicit
MipsSEInstrInfo(const MipsSubtarget &STI)llvm::MipsSEInstrInfoexplicit
removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const overridellvm::MipsInstrInfo
reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const overridellvm::MipsInstrInfo
SafeInForbiddenSlot(const MachineInstr &MI) constllvm::MipsInstrInfo
storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const overridellvm::MipsSEInstrInfovirtual
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const overridellvm::MipsInstrInfoinline
Subtargetllvm::MipsInstrInfoprotected
UncondBrOpcllvm::MipsInstrInfoprotected
verifyInstruction(const MachineInstr &MI, StringRef &ErrInfo) const overridellvm::MipsInstrInfo