LLVM  13.0.0git
Public Types | Public Member Functions | Static Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
llvm::MipsInstrInfo Class Referenceabstract

#include "Target/Mips/MipsInstrInfo.h"

Inheritance diagram for llvm::MipsInstrInfo:
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Collaboration diagram for llvm::MipsInstrInfo:
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Public Types

enum  BranchType {
  BT_None, BT_NoBranch, BT_Uncond, BT_Cond,
  BT_CondUncond, BT_Indirect
}
 

Public Member Functions

 MipsInstrInfo (const MipsSubtarget &STI, unsigned UncondBrOpc)
 
bool analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
 Branch Analysis. More...
 
unsigned removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
 
unsigned insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
 
bool reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
 reverseBranchCondition - Return the inverse opcode of the specified Branch instruction. More...
 
BranchType analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const
 
unsigned getEquivalentCompactForm (const MachineBasicBlock::iterator I) const
 Determine the opcode of a non-delay slot form for a branch if one exists. More...
 
bool isBranchOffsetInRange (unsigned BranchOpc, int64_t BrOffset) const override
 Determine if the branch target is in range. More...
 
bool SafeInForbiddenSlot (const MachineInstr &MI) const
 Predicate to determine if an instruction can go in a forbidden slot. More...
 
bool HasForbiddenSlot (const MachineInstr &MI) const
 Predicate to determine if an instruction has a forbidden slot. More...
 
void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
 Insert nop instruction when hazard condition is found. More...
 
virtual const MipsRegisterInfogetRegisterInfo () const =0
 getRegisterInfo - TargetInstrInfo is a superset of MRegister info. More...
 
virtual unsigned getOppositeBranchOpc (unsigned Opc) const =0
 
virtual bool isBranchWithImm (unsigned Opc) const
 
unsigned getInstSizeInBytes (const MachineInstr &MI) const override
 Return the number of bytes of code the specified instruction may be. More...
 
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
 
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
 
virtual void storeRegToStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const =0
 
virtual void loadRegFromStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const =0
 
virtual void adjustStackPtr (unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const =0
 
MachineInstrBuilder genInstrWithNewOpc (unsigned NewOpc, MachineBasicBlock::iterator I) const
 Create an instruction which has the same operands and memory operands as MI but has a new opcode. More...
 
bool findCommutedOpIndices (const MachineInstr &MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override
 
bool verifyInstruction (const MachineInstr &MI, StringRef &ErrInfo) const override
 Perform target specific instruction verification. More...
 
std::pair< unsigned, unsigned > decomposeMachineOperandsTargetFlags (unsigned TF) const override
 
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags () const override
 
Optional< RegImmPairisAddImmediate (const MachineInstr &MI, Register Reg) const override
 
Optional< ParamLoadedValuedescribeLoadedValue (const MachineInstr &MI, Register Reg) const override
 

Static Public Member Functions

static const MipsInstrInfocreate (MipsSubtarget &STI)
 

Protected Member Functions

bool isZeroImm (const MachineOperand &op) const
 
MachineMemOperandGetMemOperand (MachineBasicBlock &MBB, int FI, MachineMemOperand::Flags Flags) const
 

Protected Attributes

const MipsSubtargetSubtarget
 
unsigned UncondBrOpc
 

Detailed Description

Definition at line 41 of file MipsInstrInfo.h.

Member Enumeration Documentation

◆ BranchType

Enumerator
BT_None 
BT_NoBranch 
BT_Uncond 
BT_Cond 
BT_CondUncond 
BT_Indirect 

Definition at line 49 of file MipsInstrInfo.h.

Constructor & Destructor Documentation

◆ MipsInstrInfo()

MipsInstrInfo::MipsInstrInfo ( const MipsSubtarget STI,
unsigned  UncondBrOpc 
)
explicit

Definition at line 40 of file MipsInstrInfo.cpp.

Member Function Documentation

◆ adjustStackPtr()

virtual void llvm::MipsInstrInfo::adjustStackPtr ( unsigned  SP,
int64_t  Amount,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  I 
) const
pure virtual

◆ analyzeBranch() [1/2]

bool MipsInstrInfo::analyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const
override

Branch Analysis.

Definition at line 95 of file MipsInstrInfo.cpp.

References BT_Indirect, BT_None, Cond, and MBB.

◆ analyzeBranch() [2/2]

MipsInstrInfo::BranchType MipsInstrInfo::analyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify,
SmallVectorImpl< MachineInstr * > &  BranchInstrs 
) const

◆ create()

const MipsInstrInfo * MipsInstrInfo::create ( MipsSubtarget STI)
static

◆ decomposeMachineOperandsTargetFlags()

std::pair< unsigned, unsigned > MipsInstrInfo::decomposeMachineOperandsTargetFlags ( unsigned  TF) const
override

Definition at line 809 of file MipsInstrInfo.cpp.

◆ describeLoadedValue()

Optional< ParamLoadedValue > MipsInstrInfo::describeLoadedValue ( const MachineInstr MI,
Register  Reg 
) const
override

◆ findCommutedOpIndices()

bool MipsInstrInfo::findCommutedOpIndices ( const MachineInstr MI,
unsigned &  SrcOpIdx1,
unsigned &  SrcOpIdx2 
) const
override

◆ genInstrWithNewOpc()

MachineInstrBuilder MipsInstrInfo::genInstrWithNewOpc ( unsigned  NewOpc,
MachineBasicBlock::iterator  I 
) const

◆ getEquivalentCompactForm()

unsigned MipsInstrInfo::getEquivalentCompactForm ( const MachineBasicBlock::iterator  I) const

Determine the opcode of a non-delay slot form for a branch if one exists.

Return the corresponding compact (no delay slot) form of a branch.

Definition at line 439 of file MipsInstrInfo.cpp.

References B, llvm::MipsSubtarget::getABI(), llvm::MipsABIInfo::GetZeroReg(), llvm::MipsSubtarget::hasMips32r6(), I, llvm::MipsSubtarget::inMicroMipsMode(), and Subtarget.

◆ getInstSizeInBytes()

unsigned MipsInstrInfo::getInstSizeInBytes ( const MachineInstr MI) const
override

Return the number of bytes of code the specified instruction may be.

Definition at line 577 of file MipsInstrInfo.cpp.

References llvm::TargetMachine::getMCAsmInfo(), llvm::MachineFunction::getTarget(), llvm::ISD::INLINEASM, llvm::ISD::INLINEASM_BR, and MI.

◆ GetMemOperand()

MachineMemOperand * MipsInstrInfo::GetMemOperand ( MachineBasicBlock MBB,
int  FI,
MachineMemOperand::Flags  Flags 
) const
protected

◆ getOppositeBranchOpc()

virtual unsigned llvm::MipsInstrInfo::getOppositeBranchOpc ( unsigned  Opc) const
pure virtual

◆ getRegisterInfo()

virtual const MipsRegisterInfo& llvm::MipsInstrInfo::getRegisterInfo ( ) const
pure virtual

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Implemented in llvm::Mips16InstrInfo, and llvm::MipsSEInstrInfo.

◆ getSerializableDirectMachineOperandTargetFlags()

ArrayRef< std::pair< unsigned, const char * > > MipsInstrInfo::getSerializableDirectMachineOperandTargetFlags ( ) const
override

◆ HasForbiddenSlot()

bool MipsInstrInfo::HasForbiddenSlot ( const MachineInstr MI) const

Predicate to determine if an instruction has a forbidden slot.

Predicate for distingushing instructions that have forbidden slots.

Definition at line 572 of file MipsInstrInfo.cpp.

References llvm::MipsII::HasForbiddenSlot, and MI.

◆ insertBranch()

unsigned MipsInstrInfo::insertBranch ( MachineBasicBlock MBB,
MachineBasicBlock TBB,
MachineBasicBlock FBB,
ArrayRef< MachineOperand Cond,
const DebugLoc DL,
int BytesAdded = nullptr 
) const
override

◆ insertNoop()

void MipsInstrInfo::insertNoop ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI 
) const
override

Insert nop instruction when hazard condition is found.

insertNoop - If data hazard condition is found insert the target nop instruction.

Definition at line 59 of file MipsInstrInfo.cpp.

References llvm::BuildMI(), DL, get, MBB, and MI.

◆ isAddImmediate()

Optional< RegImmPair > MipsInstrInfo::isAddImmediate ( const MachineInstr MI,
Register  Reg 
) const
override

◆ isBranchOffsetInRange()

bool MipsInstrInfo::isBranchOffsetInRange ( unsigned  BranchOpc,
int64_t  BrOffset 
) const
override

Determine if the branch target is in range.

Definition at line 279 of file MipsInstrInfo.cpp.

References B, llvm::isInt< 8 >(), and llvm_unreachable.

◆ isBranchWithImm()

virtual bool llvm::MipsInstrInfo::isBranchWithImm ( unsigned  Opc) const
inlinevirtual

Reimplemented in llvm::MipsSEInstrInfo.

Definition at line 109 of file MipsInstrInfo.h.

◆ isZeroImm()

bool MipsInstrInfo::isZeroImm ( const MachineOperand op) const
protected

◆ loadRegFromStack()

virtual void llvm::MipsInstrInfo::loadRegFromStack ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
Register  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
int64_t  Offset 
) const
pure virtual

◆ loadRegFromStackSlot()

void llvm::MipsInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
Register  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const
inlineoverride

Definition at line 124 of file MipsInstrInfo.h.

References llvm::ISD::FrameIndex, loadRegFromStack(), MBB, MBBI, and TRI.

◆ removeBranch()

unsigned MipsInstrInfo::removeBranch ( MachineBasicBlock MBB,
int BytesRemoved = nullptr 
) const
override

◆ reverseBranchCondition()

bool MipsInstrInfo::reverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond) const
override

reverseBranchCondition - Return the inverse opcode of the specified Branch instruction.

Definition at line 183 of file MipsInstrInfo.cpp.

References assert(), Cond, and getOppositeBranchOpc().

◆ SafeInForbiddenSlot()

bool MipsInstrInfo::SafeInForbiddenSlot ( const MachineInstr MI) const

Predicate to determine if an instruction can go in a forbidden slot.

Predicate for distingushing between control transfer instructions and all other instructions for handling forbidden slots.

Consider inline assembly as unsafe as well.

Definition at line 564 of file MipsInstrInfo.cpp.

References llvm::MipsII::IsCTI, and MI.

◆ storeRegToStack()

virtual void llvm::MipsInstrInfo::storeRegToStack ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
Register  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
int64_t  Offset 
) const
pure virtual

◆ storeRegToStackSlot()

void llvm::MipsInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
Register  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const
inlineoverride

Definition at line 116 of file MipsInstrInfo.h.

References llvm::ISD::FrameIndex, MBB, MBBI, storeRegToStack(), and TRI.

◆ verifyInstruction()

bool MipsInstrInfo::verifyInstruction ( const MachineInstr MI,
StringRef ErrInfo 
) const
override

Perform target specific instruction verification.

Definition at line 760 of file MipsInstrInfo.cpp.

References llvm::AArch64ISD::EXT, MI, Subtarget, llvm::MipsSubtarget::useIndirectJumpsHazard(), and verifyInsExtInstruction().

Member Data Documentation

◆ Subtarget

const MipsSubtarget& llvm::MipsInstrInfo::Subtarget
protected

◆ UncondBrOpc

unsigned llvm::MipsInstrInfo::UncondBrOpc
protected

Definition at line 46 of file MipsInstrInfo.h.

Referenced by insertBranch().


The documentation for this class was generated from the following files: