LLVM  14.0.0git
Classes
llvm::TrailingObjects< BaseTy, TrailingTys >::FixedSizeStorage< Tys > Struct Template Reference

A type where its ::with_counts template member has a type member suitable for use as uninitialized storage for an object with the given trailing object counts. More...

#include "llvm/Support/TrailingObjects.h"

Classes

struct  with_counts
 

Detailed Description

template<typename BaseTy, typename... TrailingTys>
template<typename... Tys>
struct llvm::TrailingObjects< BaseTy, TrailingTys >::FixedSizeStorage< Tys >

A type where its ::with_counts template member has a type member suitable for use as uninitialized storage for an object with the given trailing object counts.

The template arguments are similar to those of additionalSizeToAlloc.

Use with FixedSizeStorageOwner, e.g.:

MyObj::FixedSizeStorage<void *>::with_counts<1u>::type myStackObjStorage;
MyObj::FixedSizeStorageOwner
myStackObjOwner(new ((void *)&myStackObjStorage) MyObj);
MyObj *const myStackObjPtr = myStackObjOwner.get();

Definition at line 352 of file TrailingObjects.h.


The documentation for this struct was generated from the following file:
type
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx rax ret instead of xmm1 cvttss2siq rcx movaps xmm2 subss xmm2 cvttss2siq rax rdx xorq rax ucomiss xmm0 cmovb rax ret Seems like the jb branch has high likelihood of being taken It would have saved a few instructions It s not possible to reference and DH registers in an instruction requiring REX prefix divb and mulb both produce results in AH If isel emits a CopyFromReg which gets turned into a movb and that can be allocated a r8b r15b To get around isel emits a CopyFromReg from AX and then right shift it down by and truncate it It s not pretty but it works We need some register allocation magic to make the hack go which would often require a callee saved register Callees usually need to keep this value live for most of their body so it doesn t add a significant burden on them We currently implement this in however this is suboptimal because it means that it would be quite awkward to implement the optimization for callers A better implementation would be to relax the LLVM IR rules for sret arguments to allow a function with an sret argument to have a non void return type
Definition: README-X86-64.txt:70