LLVM  10.0.0svn
HexagonInstPrinter.cpp
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1 //===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class prints an Hexagon MCInst to a .s file.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "HexagonInstPrinter.h"
16 #include "llvm/MC/MCAsmInfo.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/Support/Debug.h"
21 
22 using namespace llvm;
23 
24 #define DEBUG_TYPE "asm-printer"
25 
26 #define GET_INSTRUCTION_NAME
27 #include "HexagonGenAsmWriter.inc"
28 
29 void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
30  O << getRegisterName(RegNo);
31 }
32 
34  StringRef Annot, const MCSubtargetInfo &STI) {
38  HasExtender = false;
39  for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) {
40  MCInst const &MCI = *I.getInst();
41  if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
42  printInstruction(MCI.getOperand(1).getInst(), OS);
43  OS << '\v';
44  HasExtender = false;
45  printInstruction(MCI.getOperand(0).getInst(), OS);
46  } else
47  printInstruction(&MCI, OS);
48  HasExtender = HexagonMCInstrInfo::isImmext(MCI);
49  OS << "\n";
50  }
51 
52  bool IsLoop0 = HexagonMCInstrInfo::isInnerLoop(*MI);
53  bool IsLoop1 = HexagonMCInstrInfo::isOuterLoop(*MI);
54  if (IsLoop0) {
55  OS << (IsLoop1 ? " :endloop01" : " :endloop0");
56  } else if (IsLoop1) {
57  OS << " :endloop1";
58  }
59 }
60 
61 void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,
62  raw_ostream &O) const {
63  if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo &&
64  (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI)))
65  O << "#";
66  MCOperand const &MO = MI->getOperand(OpNo);
67  if (MO.isReg()) {
68  O << getRegisterName(MO.getReg());
69  } else if (MO.isExpr()) {
70  int64_t Value;
71  if (MO.getExpr()->evaluateAsAbsolute(Value))
72  O << formatImm(Value);
73  else
74  O << *MO.getExpr();
75  } else {
76  llvm_unreachable("Unknown operand");
77  }
78 }
79 
80 void HexagonInstPrinter::printBrtarget(MCInst const *MI, unsigned OpNo,
81  raw_ostream &O) const {
82  MCOperand const &MO = MI->getOperand(OpNo);
83  assert (MO.isExpr());
84  MCExpr const &Expr = *MO.getExpr();
85  int64_t Value;
86  if (Expr.evaluateAsAbsolute(Value))
87  O << format("0x%" PRIx64, Value);
88  else {
89  if (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI))
90  if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo)
91  O << "##";
92  O << Expr;
93  }
94 }
bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
void printRegName(raw_ostream &O, unsigned RegNo) const override
Print the assembler register name.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void printBrtarget(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:123
bool isBundle(MCInst const &MCI)
bool isReg() const
Definition: MCInst.h:57
bool isOuterLoop(MCInst const &MCI)
void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
bool isImmext(MCInst const &MCI)
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
iterator_range< Hexagon::PacketIterator > bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:64
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
Definition: MCInstPrinter.h:99
const MCInst * getInst() const
Definition: MCInst.h:105
const MCExpr * getExpr() const
Definition: MCInst.h:95
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
bool isExpr() const
Definition: MCInst.h:60
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:179
void printInstruction(MCInst const *MI, raw_ostream &O)
#define I(x, y, z)
Definition: MD5.cpp:58
Generic base class for all target subtargets.
size_t bundleSize(MCInst const &MCI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isInnerLoop(MCInst const &MCI)
#define HEXAGON_PACKET_SIZE
static char const * getRegisterName(unsigned RegNo)
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34
void printOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const